Implementation notes: aarch64, pi3bplus, crypto_hash/lane256

Computer: pi3bplus
Microarchitecture: aarch64; Cortex-A53 (410fd034)
Architecture: aarch64
CPU ID: 410fd034
SUPERCOP version: 20230530
Operation: crypto_hash
Primitive: lane256
TimeObject sizeTest sizeImplementationCompilerBenchmark dateSUPERCOP version
9162579344 0 092912 824 752T:cclang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023060320230530
97500103876 0 0115535 896 744T:cgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023060320230530
98000104080 0 0116967 896 760T:cgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023060320230530
11462580888 0 091615 880 736T:cgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023060320230530
15175082748 0 094327 896 744T:cgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023060320230530

Namespace violations

Implementation: T:c
Security model: timingleaks
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
lane.o Final T
lane.o Hash T
lane.o Init T
lane.o Update T
lane.o lane256_compress T
lane.o lane512_compress T

Number of similar (compiler,implementation) pairs: 5, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:c
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:c
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:c
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE T:c
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE T:c