Implementation notes: x86, hydra9, crypto_aead/tiaoxinv2

Computer: hydra9
Architecture: x86
CPU ID: AuthenticAMD-00610f01-178bfbff
SUPERCOP version: 20171218
Operation: crypto_aead
Primitive: tiaoxinv2
TimeObject sizeTest sizeImplementationCompilerBenchmark dateSUPERCOP version
3091? ? ?? ? ?nimgcc_-m32_-march=core-avx-i_-O3_-fomit-frame-pointer2017091520170725
3098? ? ?? ? ?nimgcc_-m32_-march=core-avx-i_-O2_-fomit-frame-pointer2017091520170725
3174? ? ?? ? ?nimgcc_-m32_-march=corei7-avx_-O_-fomit-frame-pointer2017091520170725
3178? ? ?? ? ?nimgcc_-m32_-march=corei7-avx_-O2_-fomit-frame-pointer2017091520170725
3195? ? ?? ? ?nimgcc_-m32_-march=native_-mtune=native_-Os_-fomit-frame-pointer2017091520170725
3199? ? ?? ? ?nimgcc_-m32_-march=corei7-avx_-O3_-fomit-frame-pointer2017091520170725
3252? ? ?? ? ?nimgcc_-m32_-march=native_-mtune=native_-O2_-fomit-frame-pointer2017091520170725
3262? ? ?? ? ?nimgcc_-m32_-march=core-avx-i_-Os_-fomit-frame-pointer2017091520170725
3264? ? ?? ? ?nimgcc_-m32_-march=corei7-avx_-Os_-fomit-frame-pointer2017091520170725
3313? ? ?? ? ?nimgcc_-m32_-march=native_-mtune=native_-O_-fomit-frame-pointer2017091520170725
3316? ? ?? ? ?nimgcc_-m32_-march=native_-mtune=native_-O3_-fomit-frame-pointer2017091520170725
3355? ? ?? ? ?nimgcc_-m32_-march=core-avx-i_-O_-fomit-frame-pointer2017091520170725
52642? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium4_-O_-fomit-frame-pointer2017091520170725
52709? ? ?? ? ?refgcc_-m32_-march=pentium4_-O_-fomit-frame-pointer2017091520170725
54802? ? ?? ? ?refgcc_-m32_-march=native_-mtune=native_-O_-fomit-frame-pointer2017091520170725
55446? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=barcelona_-O_-fomit-frame-pointer2017091520170725
55769? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=prescott_-O_-fomit-frame-pointer2017091520170725
55786? ? ?? ? ?refgcc_-m32_-march=nocona_-O_-fomit-frame-pointer2017091520170725
55807? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=athlon_-O_-fomit-frame-pointer2017091520170725
55877? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=k8_-O_-fomit-frame-pointer2017091520170725
55914? ? ?? ? ?refgcc_-m32_-march=k8_-O_-fomit-frame-pointer2017091520170725
55928? ? ?? ? ?refgcc_-m32_-march=corei7_-O_-fomit-frame-pointer2017091520170725
55946? ? ?? ? ?refgcc_-m32_-march=prescott_-O_-fomit-frame-pointer2017091520170725
55968? ? ?? ? ?refgcc_-m32_-march=barcelona_-O_-fomit-frame-pointer2017091520170725
56032? ? ?? ? ?refgcc_-m32_-march=corei7-avx_-O_-fomit-frame-pointer2017091520170725
56040? ? ?? ? ?refgcc_-m32_-march=core2_-O_-fomit-frame-pointer2017091520170725
56053? ? ?? ? ?refgcc_-m32_-O_-fomit-frame-pointer2017091520170725
56133? ? ?? ? ?refgcc_-m32_-march=core2_-msse4_-O_-fomit-frame-pointer2017091520170725
56188? ? ?? ? ?refgcc_-m32_-march=core-avx-i_-O_-fomit-frame-pointer2017091520170725
56583? ? ?? ? ?refgcc_-m32_-march=athlon_-O_-fomit-frame-pointer2017091520170725
57091? ? ?? ? ?refgcc_-m32_-march=core2_-msse4.1_-O_-fomit-frame-pointer2017091520170725
57238? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=nocona_-O_-fomit-frame-pointer2017091520170725
57417? ? ?? ? ?refgcc_-funroll-loops_-m32_-O_-fomit-frame-pointer2017091520170725
62102? ? ?? ? ?refgcc_-m32_-march=pentium_-O_-fomit-frame-pointer2017091520170725
62245? ? ?? ? ?refgcc_-m32_-march=pentium-mmx_-O_-fomit-frame-pointer2017091520170725
62373? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium2_-O_-fomit-frame-pointer2017091520170725
62438? ? ?? ? ?refgcc_-m32_-march=pentium2_-O_-fomit-frame-pointer2017091520170725
62474? ? ?? ? ?refgcc_-m32_-march=pentium3_-O_-fomit-frame-pointer2017091520170725
62501? ? ?? ? ?refgcc_-m32_-march=pentium-m_-O_-fomit-frame-pointer2017091520170725
62509? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium3_-O_-fomit-frame-pointer2017091520170725
62513? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium-m_-O_-fomit-frame-pointer2017091520170725
62611? ? ?? ? ?refgcc_-m32_-march=pentiumpro_-O_-fomit-frame-pointer2017091520170725
62647? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentiumpro_-O_-fomit-frame-pointer2017091520170725
62703? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium-mmx_-O_-fomit-frame-pointer2017091520170725
62777? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium_-O_-fomit-frame-pointer2017091520170725
73842? ? ?? ? ?refgcc_-m32_-march=native_-mtune=native_-O3_-fomit-frame-pointer2017091520170725
74865? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium4_-O3_-fomit-frame-pointer2017091520170725
74994? ? ?? ? ?refgcc_-m32_-march=native_-mtune=native_-O2_-fomit-frame-pointer2017091520170725
75073? ? ?? ? ?refgcc_-m32_-march=pentium4_-O3_-fomit-frame-pointer2017091520170725
75404? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium4_-O2_-fomit-frame-pointer2017091520170725
75540? ? ?? ? ?refgcc_-m32_-march=pentium4_-O2_-fomit-frame-pointer2017091520170725
77370? ? ?? ? ?refgcc_-m32_-march=corei7-avx_-O3_-fomit-frame-pointer2017091520170725
77618? ? ?? ? ?refgcc_-m32_-march=core-avx-i_-O3_-fomit-frame-pointer2017091520170725
78117? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=k8_-O3_-fomit-frame-pointer2017091520170725
78153? ? ?? ? ?refgcc_-m32_-march=core2_-O3_-fomit-frame-pointer2017091520170725
78166? ? ?? ? ?refgcc_-m32_-march=barcelona_-O3_-fomit-frame-pointer2017091520170725
78263? ? ?? ? ?refgcc_-m32_-march=core2_-msse4.1_-O3_-fomit-frame-pointer2017091520170725
78294? ? ?? ? ?refgcc_-m32_-march=core2_-msse4_-O3_-fomit-frame-pointer2017091520170725
78330? ? ?? ? ?refgcc_-m32_-march=k8_-O3_-fomit-frame-pointer2017091520170725
78348? ? ?? ? ?refgcc_-m32_-march=k8_-O2_-fomit-frame-pointer2017091520170725
78349? ? ?? ? ?refgcc_-m32_-march=athlon_-O2_-fomit-frame-pointer2017091520170725
78350? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=barcelona_-O3_-fomit-frame-pointer2017091520170725
78350? ? ?? ? ?refgcc_-m32_-march=corei7_-O3_-fomit-frame-pointer2017091520170725
78433? ? ?? ? ?refgcc_-m32_-march=barcelona_-O2_-fomit-frame-pointer2017091520170725
78609? ? ?? ? ?refgcc_-m32_-march=athlon_-O3_-fomit-frame-pointer2017091520170725
78749? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=athlon_-O3_-fomit-frame-pointer2017091520170725
78768? ? ?? ? ?refgcc_-m32_-march=corei7_-O2_-fomit-frame-pointer2017091520170725
78804? ? ?? ? ?refgcc_-m32_-march=core2_-msse4_-O2_-fomit-frame-pointer2017091520170725
78814? ? ?? ? ?refgcc_-m32_-march=core2_-msse4.1_-O2_-fomit-frame-pointer2017091520170725
78893? ? ?? ? ?refgcc_-m32_-march=corei7-avx_-O2_-fomit-frame-pointer2017091520170725
78912? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=k8_-O2_-fomit-frame-pointer2017091520170725
78920? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=athlon_-O2_-fomit-frame-pointer2017091520170725
78924? ? ?? ? ?refgcc_-m32_-O2_-fomit-frame-pointer2017091520170725
78974? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=barcelona_-O2_-fomit-frame-pointer2017091520170725
78975? ? ?? ? ?refgcc_-m32_-march=core2_-O2_-fomit-frame-pointer2017091520170725
78994? ? ?? ? ?refgcc_-m32_-O3_-fomit-frame-pointer2017091520170725
79023? ? ?? ? ?refgcc_-m32_-march=core-avx-i_-O2_-fomit-frame-pointer2017091520170725
79449? ? ?? ? ?refgcc_-funroll-loops_-m32_-O3_-fomit-frame-pointer2017091520170725
79925? ? ?? ? ?refgcc_-funroll-loops_-m32_-O2_-fomit-frame-pointer2017091520170725
81929? ? ?? ? ?refgcc_-m32_-march=nocona_-O3_-fomit-frame-pointer2017091520170725
82048? ? ?? ? ?refgcc_-m32_-march=prescott_-O3_-fomit-frame-pointer2017091520170725
82138? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=prescott_-O3_-fomit-frame-pointer2017091520170725
82162? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=prescott_-O2_-fomit-frame-pointer2017091520170725
82165? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=nocona_-O3_-fomit-frame-pointer2017091520170725
82184? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=nocona_-O2_-fomit-frame-pointer2017091520170725
82234? ? ?? ? ?refgcc_-m32_-march=prescott_-O2_-fomit-frame-pointer2017091520170725
82460? ? ?? ? ?refgcc_-m32_-march=nocona_-O2_-fomit-frame-pointer2017091520170725
83887? ? ?? ? ?refgcc_-m32_-march=pentium-m_-O3_-fomit-frame-pointer2017091520170725
84065? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium3_-O3_-fomit-frame-pointer2017091520170725
84196? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium-m_-O3_-fomit-frame-pointer2017091520170725
84394? ? ?? ? ?refgcc_-m32_-march=pentium3_-O3_-fomit-frame-pointer2017091520170725
84433? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentiumpro_-O2_-fomit-frame-pointer2017091520170725
84476? ? ?? ? ?refgcc_-m32_-march=pentiumpro_-O3_-fomit-frame-pointer2017091520170725
84515? ? ?? ? ?refgcc_-m32_-march=pentium2_-O3_-fomit-frame-pointer2017091520170725
84520? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium2_-O2_-fomit-frame-pointer2017091520170725
84631? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium-m_-O2_-fomit-frame-pointer2017091520170725
84640? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium3_-O2_-fomit-frame-pointer2017091520170725
84761? ? ?? ? ?refgcc_-m32_-march=pentium2_-O2_-fomit-frame-pointer2017091520170725
84773? ? ?? ? ?refgcc_-m32_-march=pentiumpro_-O2_-fomit-frame-pointer2017091520170725
84805? ? ?? ? ?refgcc_-m32_-march=pentium3_-O2_-fomit-frame-pointer2017091520170725
84840? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentiumpro_-O3_-fomit-frame-pointer2017091520170725
84971? ? ?? ? ?refgcc_-m32_-march=pentium-m_-O2_-fomit-frame-pointer2017091520170725
86060? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium_-O2_-fomit-frame-pointer2017091520170725
86298? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium-mmx_-O2_-fomit-frame-pointer2017091520170725
86364? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium-mmx_-O3_-fomit-frame-pointer2017091520170725
86372? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium_-O3_-fomit-frame-pointer2017091520170725
86996? ? ?? ? ?refgcc_-m32_-march=pentium-mmx_-O3_-fomit-frame-pointer2017091520170725
87282? ? ?? ? ?refgcc_-m32_-march=pentium_-O3_-fomit-frame-pointer2017091520170725
87963? ? ?? ? ?refgcc_-m32_-march=pentium_-O2_-fomit-frame-pointer2017091520170725
88062? ? ?? ? ?refgcc_-m32_-march=pentium-mmx_-O2_-fomit-frame-pointer2017091520170725
93143? ? ?? ? ?refgcc_-m32_-march=k6-3_-O_-fomit-frame-pointer2017091520170725
93491? ? ?? ? ?refgcc_-m32_-march=i386_-O_-fomit-frame-pointer2017091520170725
93575? ? ?? ? ?refgcc_-m32_-march=k6-2_-O_-fomit-frame-pointer2017091520170725
93772? ? ?? ? ?refgcc_-m32_-march=k6_-O_-fomit-frame-pointer2017091520170725
94637? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=k6-2_-O_-fomit-frame-pointer2017091520170725
94646? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=i386_-O_-fomit-frame-pointer2017091520170725
94827? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=k6-3_-O_-fomit-frame-pointer2017091520170725
95019? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=k6_-O_-fomit-frame-pointer2017091520170725
100978? ? ?? ? ?refgcc_-m32_-march=core2_-Os_-fomit-frame-pointer2017091520170725
101093? ? ?? ? ?refgcc_-m32_-march=corei7_-Os_-fomit-frame-pointer2017091520170725
101159? ? ?? ? ?refgcc_-m32_-march=core2_-msse4_-Os_-fomit-frame-pointer2017091520170725
101241? ? ?? ? ?refgcc_-m32_-march=native_-mtune=native_-Os_-fomit-frame-pointer2017091520170725
101338? ? ?? ? ?refgcc_-m32_-march=corei7-avx_-Os_-fomit-frame-pointer2017091520170725
101360? ? ?? ? ?refgcc_-m32_-march=core-avx-i_-Os_-fomit-frame-pointer2017091520170725
101377? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=barcelona_-Os_-fomit-frame-pointer2017091520170725
101511? ? ?? ? ?refgcc_-m32_-march=k8_-Os_-fomit-frame-pointer2017091520170725
101593? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=k8_-Os_-fomit-frame-pointer2017091520170725
101622? ? ?? ? ?refgcc_-m32_-march=pentium2_-Os_-fomit-frame-pointer2017091520170725
101623? ? ?? ? ?refgcc_-m32_-march=core2_-msse4.1_-Os_-fomit-frame-pointer2017091520170725
101658? ? ?? ? ?refgcc_-m32_-march=athlon_-Os_-fomit-frame-pointer2017091520170725
101695? ? ?? ? ?refgcc_-m32_-march=pentium3_-Os_-fomit-frame-pointer2017091520170725
101790? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=athlon_-Os_-fomit-frame-pointer2017091520170725
101820? ? ?? ? ?refgcc_-m32_-march=barcelona_-Os_-fomit-frame-pointer2017091520170725
101858? ? ?? ? ?refgcc_-m32_-march=pentiumpro_-Os_-fomit-frame-pointer2017091520170725
101901? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentiumpro_-Os_-fomit-frame-pointer2017091520170725
101971? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium3_-Os_-fomit-frame-pointer2017091520170725
102023? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=k6_-Os_-fomit-frame-pointer2017091520170725
102048? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium-m_-Os_-fomit-frame-pointer2017091520170725
102063? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium_-Os_-fomit-frame-pointer2017091520170725
102173? ? ?? ? ?refgcc_-m32_-march=k6-3_-Os_-fomit-frame-pointer2017091520170725
102197? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium-mmx_-Os_-fomit-frame-pointer2017091520170725
102235? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=k6-3_-Os_-fomit-frame-pointer2017091520170725
102313? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=k6-2_-Os_-fomit-frame-pointer2017091520170725
102344? ? ?? ? ?refgcc_-m32_-march=pentium-mmx_-Os_-fomit-frame-pointer2017091520170725
102355? ? ?? ? ?refgcc_-m32_-march=pentium_-Os_-fomit-frame-pointer2017091520170725
102397? ? ?? ? ?refgcc_-funroll-loops_-m32_-Os_-fomit-frame-pointer2017091520170725
102504? ? ?? ? ?refgcc_-m32_-march=k6_-Os_-fomit-frame-pointer2017091520170725
102903? ? ?? ? ?refgcc_-m32_-Os_-fomit-frame-pointer2017091520170725
103399? ? ?? ? ?refgcc_-m32_-march=nocona_-Os_-fomit-frame-pointer2017091520170725
103446? ? ?? ? ?refgcc_-m32_-march=k6_-O3_-fomit-frame-pointer2017091520170725
103555? ? ?? ? ?refgcc_-m32_-march=k6-3_-O3_-fomit-frame-pointer2017091520170725
103666? ? ?? ? ?refgcc_-m32_-march=i486_-Os_-fomit-frame-pointer2017091520170725
103670? ? ?? ? ?refgcc_-m32_-march=k6-2_-O2_-fomit-frame-pointer2017091520170725
103754? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=k6-2_-O3_-fomit-frame-pointer2017091520170725
103954? ? ?? ? ?refgcc_-m32_-march=i386_-Os_-fomit-frame-pointer2017091520170725
103954? ? ?? ? ?refgcc_-m32_-march=k6_-O2_-fomit-frame-pointer2017091520170725
104024? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=k6_-O3_-fomit-frame-pointer2017091520170725
104069? ? ?? ? ?refgcc_-m32_-march=k6-3_-O2_-fomit-frame-pointer2017091520170725
104099? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=k6-3_-O3_-fomit-frame-pointer2017091520170725
104174? ? ?? ? ?refgcc_-m32_-march=k6-2_-Os_-fomit-frame-pointer2017091520170725
104188? ? ?? ? ?refgcc_-m32_-march=pentium4_-Os_-fomit-frame-pointer2017091520170725
104250? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=k6-2_-O2_-fomit-frame-pointer2017091520170725
104310? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=i486_-Os_-fomit-frame-pointer2017091520170725
104453? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium4_-Os_-fomit-frame-pointer2017091520170725
104498? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=k6_-O2_-fomit-frame-pointer2017091520170725
104642? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=prescott_-Os_-fomit-frame-pointer2017091520170725
104680? ? ?? ? ?refgcc_-m32_-march=i486_-O_-fomit-frame-pointer2017091520170725
104689? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=nocona_-Os_-fomit-frame-pointer2017091520170725
104873? ? ?? ? ?refgcc_-m32_-march=prescott_-Os_-fomit-frame-pointer2017091520170725
105295? ? ?? ? ?refgcc_-m32_-march=pentium-m_-Os_-fomit-frame-pointer2017091520170725
105492? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=k6-3_-O2_-fomit-frame-pointer2017091520170725
106679? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium2_-Os_-fomit-frame-pointer2017091520170725
106962? ? ?? ? ?refgcc_-m32_-march=k6-2_-O3_-fomit-frame-pointer2017091520170725
107467? ? ?? ? ?refgcc_-m32_-march=i386_-O3_-fomit-frame-pointer2017091520170725
107595? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=i386_-O3_-fomit-frame-pointer2017091520170725
107611? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=i386_-Os_-fomit-frame-pointer2017091520170725
108079? ? ?? ? ?refgcc_-m32_-march=i386_-O2_-fomit-frame-pointer2017091520170725
108092? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=i486_-O_-fomit-frame-pointer2017091520170725
108126? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=i386_-O2_-fomit-frame-pointer2017091520170725
118899? ? ?? ? ?refgcc_-m32_-march=i486_-O2_-fomit-frame-pointer2017091520170725
119715? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=pentium2_-O3_-fomit-frame-pointer2017091520170725
120133? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=i486_-O3_-fomit-frame-pointer2017091520170725
120254? ? ?? ? ?refgcc_-funroll-loops_-m32_-march=i486_-O2_-fomit-frame-pointer2017091520170725
122771? ? ?? ? ?refgcc_-m32_-march=i486_-O3_-fomit-frame-pointer2017091520170725

Test failure

Implementation: crypto_aead/tiaoxinv2/nim
Compiler: gcc -m32 -march=core-avx2 -O2 -fomit-frame-pointer
error 111

Number of similar (compiler,implementation) pairs: 6, namely:
CompilerImplementations
gcc -m32 -march=core-avx2 -O2 -fomit-frame-pointer nim ref
gcc -m32 -march=core-avx2 -O -fomit-frame-pointer nim ref
gcc -m32 -march=core-avx2 -Os -fomit-frame-pointer nim ref

Compiler output

Implementation: crypto_aead/tiaoxinv2/nim
Compiler: gcc -funroll-loops -m32 -O2 -fomit-frame-pointer
tiaoxin-optimized.c: In file included from tiaoxin-optimized.c:20:0:
tiaoxin-optimized.c: /usr/lib/gcc/x86_64-linux-gnu/4.8/include/xmmintrin.h:31:3: error: #error "SSE instruction set not enabled"
tiaoxin-optimized.c: # error "SSE instruction set not enabled"
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: In file included from tiaoxin-optimized.c:21:0:
tiaoxin-optimized.c: /usr/lib/gcc/x86_64-linux-gnu/4.8/include/emmintrin.h:31:3: error: #error "SSE2 instruction set not enabled"
tiaoxin-optimized.c: # error "SSE2 instruction set not enabled"
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: In file included from tiaoxin-optimized.c:22:0:
tiaoxin-optimized.c: /usr/lib/gcc/x86_64-linux-gnu/4.8/include/wmmintrin.h:34:3: error: #error "AES/PCLMUL instructions not enabled"
tiaoxin-optimized.c: # error "AES/PCLMUL instructions not enabled"
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: In file included from tiaoxin-optimized.c:23:0:
tiaoxin-optimized.c: /usr/lib/gcc/x86_64-linux-gnu/4.8/include/tmmintrin.h:31:3: error: #error "SSSE3 instruction set not enabled"
tiaoxin-optimized.c: # error "SSSE3 instruction set not enabled"
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c: In function 'tiaoxin_optimized_encrypt':
tiaoxin-optimized.c: tiaoxin-optimized.c:104:2: error: unknown type name '__m128i'
tiaoxin-optimized.c: __m128i T3[3];
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:105:2: error: unknown type name '__m128i'
tiaoxin-optimized.c: __m128i T4[4];
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:106:2: error: unknown type name '__m128i'
tiaoxin-optimized.c: __m128i T6[6];
tiaoxin-optimized.c: ...

Number of similar (compiler,implementation) pairs: 88, namely:
CompilerImplementations
gcc -funroll-loops -m32 -O2 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -O3 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -O -fomit-frame-pointer nim
gcc -funroll-loops -m32 -Os -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=athlon -O2 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=athlon -O3 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=athlon -O -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=athlon -Os -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=i386 -O2 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=i386 -O3 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=i386 -O -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=i386 -Os -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=i486 -O2 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=i486 -O3 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=i486 -O -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=i486 -Os -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=k6-2 -O2 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=k6-2 -O3 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=k6-2 -O -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=k6-2 -Os -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=k6-3 -O2 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=k6-3 -O3 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=k6-3 -O -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=k6-3 -Os -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=k6 -O2 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=k6 -O3 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=k6 -O -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=k6 -Os -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium-mmx -O2 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium-mmx -O3 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium-mmx -O -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium-mmx -Os -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium2 -O2 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium2 -O3 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium2 -O -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium2 -Os -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium -O2 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium -O3 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium -O -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium -Os -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentiumpro -O2 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentiumpro -O3 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentiumpro -O -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentiumpro -Os -fomit-frame-pointer nim
gcc -m32 -O2 -fomit-frame-pointer nim
gcc -m32 -O3 -fomit-frame-pointer nim
gcc -m32 -O -fomit-frame-pointer nim
gcc -m32 -Os -fomit-frame-pointer nim
gcc -m32 -march=athlon -O2 -fomit-frame-pointer nim
gcc -m32 -march=athlon -O3 -fomit-frame-pointer nim
gcc -m32 -march=athlon -O -fomit-frame-pointer nim
gcc -m32 -march=athlon -Os -fomit-frame-pointer nim
gcc -m32 -march=i386 -O2 -fomit-frame-pointer nim
gcc -m32 -march=i386 -O3 -fomit-frame-pointer nim
gcc -m32 -march=i386 -O -fomit-frame-pointer nim
gcc -m32 -march=i386 -Os -fomit-frame-pointer nim
gcc -m32 -march=i486 -O2 -fomit-frame-pointer nim
gcc -m32 -march=i486 -O3 -fomit-frame-pointer nim
gcc -m32 -march=i486 -O -fomit-frame-pointer nim
gcc -m32 -march=i486 -Os -fomit-frame-pointer nim
gcc -m32 -march=k6-2 -O2 -fomit-frame-pointer nim
gcc -m32 -march=k6-2 -O3 -fomit-frame-pointer nim
gcc -m32 -march=k6-2 -O -fomit-frame-pointer nim
gcc -m32 -march=k6-2 -Os -fomit-frame-pointer nim
gcc -m32 -march=k6-3 -O2 -fomit-frame-pointer nim
gcc -m32 -march=k6-3 -O3 -fomit-frame-pointer nim
gcc -m32 -march=k6-3 -O -fomit-frame-pointer nim
gcc -m32 -march=k6-3 -Os -fomit-frame-pointer nim
gcc -m32 -march=k6 -O2 -fomit-frame-pointer nim
gcc -m32 -march=k6 -O3 -fomit-frame-pointer nim
gcc -m32 -march=k6 -O -fomit-frame-pointer nim
gcc -m32 -march=k6 -Os -fomit-frame-pointer nim
gcc -m32 -march=pentium-mmx -O2 -fomit-frame-pointer nim
gcc -m32 -march=pentium-mmx -O3 -fomit-frame-pointer nim
gcc -m32 -march=pentium-mmx -O -fomit-frame-pointer nim
gcc -m32 -march=pentium-mmx -Os -fomit-frame-pointer nim
gcc -m32 -march=pentium2 -O2 -fomit-frame-pointer nim
gcc -m32 -march=pentium2 -O3 -fomit-frame-pointer nim
gcc -m32 -march=pentium2 -O -fomit-frame-pointer nim
gcc -m32 -march=pentium2 -Os -fomit-frame-pointer nim
gcc -m32 -march=pentium -O2 -fomit-frame-pointer nim
gcc -m32 -march=pentium -O3 -fomit-frame-pointer nim
gcc -m32 -march=pentium -O -fomit-frame-pointer nim
gcc -m32 -march=pentium -Os -fomit-frame-pointer nim
gcc -m32 -march=pentiumpro -O2 -fomit-frame-pointer nim
gcc -m32 -march=pentiumpro -O3 -fomit-frame-pointer nim
gcc -m32 -march=pentiumpro -O -fomit-frame-pointer nim
gcc -m32 -march=pentiumpro -Os -fomit-frame-pointer nim

Compiler output

Implementation: crypto_aead/tiaoxinv2/nim
Compiler: gcc -funroll-loops -m32 -march=barcelona -O2 -fomit-frame-pointer
tiaoxin-optimized.c: In file included from tiaoxin-optimized.c:22:0:
tiaoxin-optimized.c: /usr/lib/gcc/x86_64-linux-gnu/4.8/include/wmmintrin.h:34:3: error: #error "AES/PCLMUL instructions not enabled"
tiaoxin-optimized.c: # error "AES/PCLMUL instructions not enabled"
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: In file included from tiaoxin-optimized.c:23:0:
tiaoxin-optimized.c: /usr/lib/gcc/x86_64-linux-gnu/4.8/include/tmmintrin.h:31:3: error: #error "SSSE3 instruction set not enabled"
tiaoxin-optimized.c: # error "SSSE3 instruction set not enabled"
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c: In function 'tiaoxin_optimized_encrypt':
tiaoxin-optimized.c: tiaoxin-optimized.c:126:5: error: incompatible types when assigning to type '__m128i' from type 'int'
tiaoxin-optimized.c: W0 = _mm_shuffle_epi8( W0 , perm );
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:127:5: error: incompatible types when assigning to type '__m128i' from type 'int'
tiaoxin-optimized.c: W1 = _mm_shuffle_epi8( W1 , perm );
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:40:39: error: incompatible types when assigning to type '__m128i' from type 'int'
tiaoxin-optimized.c: #define RT3( T , M ) tmp = T[0];T[0] = enc(T[2],M);T[2] = T[1];T[1] = enc(tmp,Z0);T[0] = xor(T[0], tmp);
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:48:1: note: in expansion of macro 'RT3'
tiaoxin-optimized.c: RT3( T3, M0 );\
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:137:2: note: in expansion of macro 'UPDATE'
tiaoxin-optimized.c: UPDATE( T3 , T4 , T6, Z0 , Z1 , Z0 );
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:40:70: error: incompatible types when assigning to type '__m128i' from type 'int'
tiaoxin-optimized.c: ...

Number of similar (compiler,implementation) pairs: 44, namely:
CompilerImplementations
gcc -funroll-loops -m32 -march=barcelona -O2 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=barcelona -O3 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=barcelona -O -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=barcelona -Os -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=k8 -O2 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=k8 -O3 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=k8 -O -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=k8 -Os -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=nocona -O2 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=nocona -O3 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=nocona -O -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=nocona -Os -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium-m -O2 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium-m -O3 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium-m -O -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium-m -Os -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium4 -O2 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium4 -O3 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium4 -O -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium4 -Os -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=prescott -O2 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=prescott -O3 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=prescott -O -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=prescott -Os -fomit-frame-pointer nim
gcc -m32 -march=k8 -O2 -fomit-frame-pointer nim
gcc -m32 -march=k8 -O3 -fomit-frame-pointer nim
gcc -m32 -march=k8 -O -fomit-frame-pointer nim
gcc -m32 -march=k8 -Os -fomit-frame-pointer nim
gcc -m32 -march=nocona -O2 -fomit-frame-pointer nim
gcc -m32 -march=nocona -O3 -fomit-frame-pointer nim
gcc -m32 -march=nocona -O -fomit-frame-pointer nim
gcc -m32 -march=nocona -Os -fomit-frame-pointer nim
gcc -m32 -march=pentium-m -O2 -fomit-frame-pointer nim
gcc -m32 -march=pentium-m -O3 -fomit-frame-pointer nim
gcc -m32 -march=pentium-m -O -fomit-frame-pointer nim
gcc -m32 -march=pentium-m -Os -fomit-frame-pointer nim
gcc -m32 -march=pentium4 -O2 -fomit-frame-pointer nim
gcc -m32 -march=pentium4 -O3 -fomit-frame-pointer nim
gcc -m32 -march=pentium4 -O -fomit-frame-pointer nim
gcc -m32 -march=pentium4 -Os -fomit-frame-pointer nim
gcc -m32 -march=prescott -O2 -fomit-frame-pointer nim
gcc -m32 -march=prescott -O3 -fomit-frame-pointer nim
gcc -m32 -march=prescott -O -fomit-frame-pointer nim
gcc -m32 -march=prescott -Os -fomit-frame-pointer nim

Compiler output

Implementation: crypto_aead/tiaoxinv2/nim
Compiler: gcc -funroll-loops -m32 -march=pentium3 -O2 -fomit-frame-pointer
tiaoxin-optimized.c: In file included from tiaoxin-optimized.c:21:0:
tiaoxin-optimized.c: /usr/lib/gcc/x86_64-linux-gnu/4.8/include/emmintrin.h:31:3: error: #error "SSE2 instruction set not enabled"
tiaoxin-optimized.c: # error "SSE2 instruction set not enabled"
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: In file included from tiaoxin-optimized.c:22:0:
tiaoxin-optimized.c: /usr/lib/gcc/x86_64-linux-gnu/4.8/include/wmmintrin.h:34:3: error: #error "AES/PCLMUL instructions not enabled"
tiaoxin-optimized.c: # error "AES/PCLMUL instructions not enabled"
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: In file included from tiaoxin-optimized.c:23:0:
tiaoxin-optimized.c: /usr/lib/gcc/x86_64-linux-gnu/4.8/include/tmmintrin.h:31:3: error: #error "SSSE3 instruction set not enabled"
tiaoxin-optimized.c: # error "SSSE3 instruction set not enabled"
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c: In function 'tiaoxin_optimized_encrypt':
tiaoxin-optimized.c: tiaoxin-optimized.c:104:2: error: unknown type name '__m128i'
tiaoxin-optimized.c: __m128i T3[3];
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:105:2: error: unknown type name '__m128i'
tiaoxin-optimized.c: __m128i T4[4];
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:106:2: error: unknown type name '__m128i'
tiaoxin-optimized.c: __m128i T6[6];
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:107:2: error: unknown type name '__m128i'
tiaoxin-optimized.c: __m128i tmp;
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: ...

Number of similar (compiler,implementation) pairs: 8, namely:
CompilerImplementations
gcc -funroll-loops -m32 -march=pentium3 -O2 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium3 -O3 -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium3 -O -fomit-frame-pointer nim
gcc -funroll-loops -m32 -march=pentium3 -Os -fomit-frame-pointer nim
gcc -m32 -march=pentium3 -O2 -fomit-frame-pointer nim
gcc -m32 -march=pentium3 -O3 -fomit-frame-pointer nim
gcc -m32 -march=pentium3 -O -fomit-frame-pointer nim
gcc -m32 -march=pentium3 -Os -fomit-frame-pointer nim

Compiler output

Implementation: crypto_aead/tiaoxinv2/nim
Compiler: gcc -m32 -march=barcelona -O2 -fomit-frame-pointer
tiaoxin-optimized.c: In file included from tiaoxin-optimized.c:22:0:
tiaoxin-optimized.c: /usr/lib/gcc/x86_64-linux-gnu/4.8/include/wmmintrin.h:34:3: error: #error "AES/PCLMUL instructions not enabled"
tiaoxin-optimized.c: # error "AES/PCLMUL instructions not enabled"
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: In file included from tiaoxin-optimized.c:23:0:
tiaoxin-optimized.c: /usr/lib/gcc/x86_64-linux-gnu/4.8/include/tmmintrin.h:31:3: error: #error "SSSE3 instruction set not enabled"
tiaoxin-optimized.c: # error "SSSE3 instruction set not enabled"
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c: In function 'tiaoxin_optimized_encrypt':
tiaoxin-optimized.c: tiaoxin-optimized.c:126:5: error: incompatible types when assigning to type '__m128i' from type 'int'
tiaoxin-optimized.c: W0 = _mm_shuffle_epi8( W0 , perm );
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:127:5: error: incompatible types when assigning to type '__m128i' from type 'int'
tiaoxin-optimized.c: W1 = _mm_shuffle_epi8( W1 , perm );
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:40:39: error: incompatible types when assigning to type '__m128i' from type 'int'
tiaoxin-optimized.c: #define RT3( T , M ) tmp = T[0];T[0] = enc(T[2],M);T[2] = T[1];T[1] = enc(tmp,Z0);T[0] = xor(T[0], tmp);
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:48:1: note: in expansion of macro 'RT3'
tiaoxin-optimized.c: RT3( T3, M0 );\
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:137:2: note: in expansion of macro 'UPDATE'
tiaoxin-optimized.c: UPDATE( T3 , T4 , T6, Z0 , Z1 , Z0 );
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:40:70: error: incompatible types when assigning to type '__m128i' from type 'int'
tiaoxin-optimized.c: ...
tiaoxin-optimized.c: In file included from tiaoxin-optimized.c:22:0:
tiaoxin-optimized.c: /usr/lib/gcc/x86_64-linux-gnu/4.8/include/wmmintrin.h:34:3: error: #error "AES/PCLMUL instructions not enabled"
tiaoxin-optimized.c: # error "AES/PCLMUL instructions not enabled"
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: In file included from tiaoxin-optimized.c:23:0:
tiaoxin-optimized.c: /usr/lib/gcc/x86_64-linux-gnu/4.8/include/tmmintrin.h:31:3: error: #error "SSSE3 instruction set not enabled"
tiaoxin-optimized.c: # error "SSSE3 instruction set not enabled"
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c: In function 'tiaoxin_optimized_encrypt':
tiaoxin-optimized.c: tiaoxin-optimized.c:126:5: error: incompatible types when assigning to type '__m128i' from type 'int'
tiaoxin-optimized.c: W0 = _mm_shuffle_epi8( W0 , perm );
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:127:5: error: incompatible types when assigning to type '__m128i' from type 'int'
tiaoxin-optimized.c: W1 = _mm_shuffle_epi8( W1 , perm );
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:40:39: error: incompatible types when assigning to type '__m128i' from type 'int'
tiaoxin-optimized.c: #define RT3( T , M ) tmp = T[0];T[0] = enc(T[2],M);T[2] = T[1];T[1] = enc(tmp,Z0);T[0] = xor(T[0], tmp);
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:48:1: note: in expansion of macro 'RT3'
tiaoxin-optimized.c: RT3( T3, M0 );\
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:137:2: note: in expansion of macro 'UPDATE'
tiaoxin-optimized.c: UPDATE( T3 , T4 , T6, Z0 , Z1 , Z0 );
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:40:70: error: incompatible types when assigning to type '__m128i' from type 'int'
tiaoxin-optimized.c: ...

Number of similar (compiler,implementation) pairs: 4, namely:
CompilerImplementations
gcc -m32 -march=barcelona -O2 -fomit-frame-pointer nim
gcc -m32 -march=barcelona -O3 -fomit-frame-pointer nim
gcc -m32 -march=barcelona -O -fomit-frame-pointer nim
gcc -m32 -march=barcelona -Os -fomit-frame-pointer nim

Compiler output

Implementation: crypto_aead/tiaoxinv2/nim
Compiler: gcc -m32 -march=core2 -O2 -fomit-frame-pointer
tiaoxin-optimized.c: In file included from tiaoxin-optimized.c:22:0:
tiaoxin-optimized.c: /usr/lib/gcc/x86_64-linux-gnu/4.8/include/wmmintrin.h:34:3: error: #error "AES/PCLMUL instructions not enabled"
tiaoxin-optimized.c: # error "AES/PCLMUL instructions not enabled"
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c: In function 'tiaoxin_optimized_encrypt':
tiaoxin-optimized.c: tiaoxin-optimized.c:40:39: error: incompatible types when assigning to type '__m128i' from type 'int'
tiaoxin-optimized.c: #define RT3( T , M ) tmp = T[0];T[0] = enc(T[2],M);T[2] = T[1];T[1] = enc(tmp,Z0);T[0] = xor(T[0], tmp);
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:48:1: note: in expansion of macro 'RT3'
tiaoxin-optimized.c: RT3( T3, M0 );\
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:137:2: note: in expansion of macro 'UPDATE'
tiaoxin-optimized.c: UPDATE( T3 , T4 , T6, Z0 , Z1 , Z0 );
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:40:70: error: incompatible types when assigning to type '__m128i' from type 'int'
tiaoxin-optimized.c: #define RT3( T , M ) tmp = T[0];T[0] = enc(T[2],M);T[2] = T[1];T[1] = enc(tmp,Z0);T[0] = xor(T[0], tmp);
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:48:1: note: in expansion of macro 'RT3'
tiaoxin-optimized.c: RT3( T3, M0 );\
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:137:2: note: in expansion of macro 'UPDATE'
tiaoxin-optimized.c: UPDATE( T3 , T4 , T6, Z0 , Z1 , Z0 );
tiaoxin-optimized.c: ^
tiaoxin-optimized.c: tiaoxin-optimized.c:41:39: error: incompatible types when assigning to type '__m128i' from type 'int'
tiaoxin-optimized.c: #define RT4( T , M ) tmp = T[0];T[0] = enc(T[3],M);T[3] = T[2];T[2] = T[1];T[1] = enc(tmp,Z0);T[0] = xor(T[0], tmp);
tiaoxin-optimized.c: ...

Number of similar (compiler,implementation) pairs: 16, namely:
CompilerImplementations
gcc -m32 -march=core2 -O2 -fomit-frame-pointer nim
gcc -m32 -march=core2 -O3 -fomit-frame-pointer nim
gcc -m32 -march=core2 -O -fomit-frame-pointer nim
gcc -m32 -march=core2 -Os -fomit-frame-pointer nim
gcc -m32 -march=core2 -msse4.1 -O2 -fomit-frame-pointer nim
gcc -m32 -march=core2 -msse4.1 -O3 -fomit-frame-pointer nim
gcc -m32 -march=core2 -msse4.1 -O -fomit-frame-pointer nim
gcc -m32 -march=core2 -msse4.1 -Os -fomit-frame-pointer nim
gcc -m32 -march=core2 -msse4 -O2 -fomit-frame-pointer nim
gcc -m32 -march=core2 -msse4 -O3 -fomit-frame-pointer nim
gcc -m32 -march=core2 -msse4 -O -fomit-frame-pointer nim
gcc -m32 -march=core2 -msse4 -Os -fomit-frame-pointer nim
gcc -m32 -march=corei7 -O2 -fomit-frame-pointer nim
gcc -m32 -march=corei7 -O3 -fomit-frame-pointer nim
gcc -m32 -march=corei7 -O -fomit-frame-pointer nim
gcc -m32 -march=corei7 -Os -fomit-frame-pointer nim