Implementation notes: armeabi, tinkerboards, crypto_aead/omdsha256k128n96tau96v2

Computer: tinkerboards
Architecture: armeabi
CPU ID: unknown CPU ID
SUPERCOP version: 20191221
Operation: crypto_aead
Primitive: omdsha256k128n96tau96v2
TimeObject sizeTest sizeImplementationCompilerBenchmark dateSUPERCOP version
3416578220 0 021217 432 816refgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2020010320191221
3607228720 0 034074 384 832refclang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2020010320191221
3863884016 0 015773 432 816refgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2020010320191221
4200342718 0 013101 424 816refgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2020010320191221
4402803494 0 015417 432 816refgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2020010320191221

Compiler output

Implementation: avx1
Security model: unknown
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
encrypt.c: <inline asm>:1:1: error: unknown directive
encrypt.c: .intel_syntax noprefix
encrypt.c: ^
encrypt.c: <inline asm>:3:12: error: invalid alignment value
encrypt.c: .align 32
encrypt.c: ^
encrypt.c: <inline asm>:5:6: error: invalid operand for instruction
encrypt.c: push rbx
encrypt.c: ^
encrypt.c: <inline asm>:6:10: error: invalid operand for instruction
encrypt.c: push rbp
encrypt.c: ^
encrypt.c: <inline asm>:7:10: error: invalid operand for instruction
encrypt.c: push r13
encrypt.c: ^
encrypt.c: <inline asm>:8:10: error: invalid operand for instruction
encrypt.c: push r14
encrypt.c: ^
encrypt.c: <inline asm>:9:10: error: invalid operand for instruction
encrypt.c: push r15
encrypt.c: ^
encrypt.c: <inline asm>:10:9: error: operand must be a register in range [r0, r15]
encrypt.c: sub rsp,32
encrypt.c: ^
encrypt.c: <inline asm>:11:5: error: invalid instruction, did you mean: lsl, sel, vqshl, vrshl, vshl, vshll?
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 2, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE avx1 sse4

Compiler output

Implementation: avx1
Security model: unknown
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/ccAirXCA.s: Assembler messages:
encrypt.c: /tmp/ccAirXCA.s:19: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccAirXCA.s:22: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccAirXCA.s:25: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccAirXCA.s:26: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccAirXCA.s:27: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccAirXCA.s:28: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccAirXCA.s:29: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccAirXCA.s:30: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccAirXCA.s:31: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccAirXCA.s:32: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccAirXCA.s:33: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccAirXCA.s:34: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccAirXCA.s:35: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccAirXCA.s:36: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccAirXCA.s:37: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccAirXCA.s:38: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccAirXCA.s:39: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccAirXCA.s:40: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccAirXCA.s:41: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccAirXCA.s:42: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccAirXCA.s:43: Error: bad instruction `vmovdqa xmm13,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccAirXCA.s:44: Error: bad instruction `vmovdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccAirXCA.s:45: Error: bad instruction `vmovdqa xmm12,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccAirXCA.s:47: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE avx1

Compiler output

Implementation: avx1
Security model: unknown
Compiler: gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/ccnTN3VZ.s: Assembler messages:
encrypt.c: /tmp/ccnTN3VZ.s:19: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccnTN3VZ.s:22: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccnTN3VZ.s:25: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccnTN3VZ.s:26: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccnTN3VZ.s:27: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccnTN3VZ.s:28: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccnTN3VZ.s:29: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccnTN3VZ.s:30: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccnTN3VZ.s:31: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccnTN3VZ.s:32: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccnTN3VZ.s:33: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccnTN3VZ.s:34: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccnTN3VZ.s:35: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccnTN3VZ.s:36: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccnTN3VZ.s:37: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccnTN3VZ.s:38: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccnTN3VZ.s:39: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccnTN3VZ.s:40: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccnTN3VZ.s:41: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccnTN3VZ.s:42: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccnTN3VZ.s:43: Error: bad instruction `vmovdqa xmm13,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccnTN3VZ.s:44: Error: bad instruction `vmovdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccnTN3VZ.s:45: Error: bad instruction `vmovdqa xmm12,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccnTN3VZ.s:47: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE avx1

Compiler output

Implementation: avx1
Security model: unknown
Compiler: gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/ccijopIN.s: Assembler messages:
encrypt.c: /tmp/ccijopIN.s:19: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccijopIN.s:22: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccijopIN.s:25: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccijopIN.s:26: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccijopIN.s:27: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccijopIN.s:28: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccijopIN.s:29: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccijopIN.s:30: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccijopIN.s:31: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccijopIN.s:32: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccijopIN.s:33: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccijopIN.s:34: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccijopIN.s:35: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccijopIN.s:36: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccijopIN.s:37: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccijopIN.s:38: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccijopIN.s:39: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccijopIN.s:40: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccijopIN.s:41: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccijopIN.s:42: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccijopIN.s:43: Error: bad instruction `vmovdqa xmm13,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccijopIN.s:44: Error: bad instruction `vmovdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccijopIN.s:45: Error: bad instruction `vmovdqa xmm12,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccijopIN.s:47: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE avx1

Compiler output

Implementation: avx1
Security model: unknown
Compiler: gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/ccJ0Bcgv.s: Assembler messages:
encrypt.c: /tmp/ccJ0Bcgv.s:19: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccJ0Bcgv.s:22: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccJ0Bcgv.s:25: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccJ0Bcgv.s:26: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccJ0Bcgv.s:27: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccJ0Bcgv.s:28: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccJ0Bcgv.s:29: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccJ0Bcgv.s:30: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccJ0Bcgv.s:31: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccJ0Bcgv.s:32: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccJ0Bcgv.s:33: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccJ0Bcgv.s:34: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccJ0Bcgv.s:35: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccJ0Bcgv.s:36: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccJ0Bcgv.s:37: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccJ0Bcgv.s:38: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccJ0Bcgv.s:39: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccJ0Bcgv.s:40: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccJ0Bcgv.s:41: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccJ0Bcgv.s:42: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccJ0Bcgv.s:43: Error: bad instruction `vmovdqa xmm13,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccJ0Bcgv.s:44: Error: bad instruction `vmovdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccJ0Bcgv.s:45: Error: bad instruction `vmovdqa xmm12,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccJ0Bcgv.s:47: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE avx1

Compiler output

Implementation: sse4
Security model: unknown
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/ccQN1pd0.s: Assembler messages:
encrypt.c: /tmp/ccQN1pd0.s:19: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccQN1pd0.s:22: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccQN1pd0.s:24: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccQN1pd0.s:25: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccQN1pd0.s:26: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccQN1pd0.s:27: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccQN1pd0.s:28: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccQN1pd0.s:29: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccQN1pd0.s:30: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccQN1pd0.s:31: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccQN1pd0.s:32: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccQN1pd0.s:33: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccQN1pd0.s:34: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccQN1pd0.s:35: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccQN1pd0.s:36: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccQN1pd0.s:37: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccQN1pd0.s:38: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccQN1pd0.s:39: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccQN1pd0.s:40: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccQN1pd0.s:41: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccQN1pd0.s:42: Error: bad instruction `movdqa xmm12,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccQN1pd0.s:43: Error: bad instruction `movdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccQN1pd0.s:44: Error: bad instruction `movdqa xmm11,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccQN1pd0.s:46: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE sse4

Compiler output

Implementation: sse4
Security model: unknown
Compiler: gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/ccTvi5bb.s: Assembler messages:
encrypt.c: /tmp/ccTvi5bb.s:19: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccTvi5bb.s:22: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccTvi5bb.s:24: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccTvi5bb.s:25: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccTvi5bb.s:26: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccTvi5bb.s:27: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccTvi5bb.s:28: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccTvi5bb.s:29: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccTvi5bb.s:30: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccTvi5bb.s:31: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccTvi5bb.s:32: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccTvi5bb.s:33: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccTvi5bb.s:34: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccTvi5bb.s:35: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccTvi5bb.s:36: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccTvi5bb.s:37: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccTvi5bb.s:38: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccTvi5bb.s:39: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccTvi5bb.s:40: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccTvi5bb.s:41: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccTvi5bb.s:42: Error: bad instruction `movdqa xmm12,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccTvi5bb.s:43: Error: bad instruction `movdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccTvi5bb.s:44: Error: bad instruction `movdqa xmm11,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccTvi5bb.s:46: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE sse4

Compiler output

Implementation: sse4
Security model: unknown
Compiler: gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/ccGvZfEL.s: Assembler messages:
encrypt.c: /tmp/ccGvZfEL.s:19: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccGvZfEL.s:22: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccGvZfEL.s:24: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccGvZfEL.s:25: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccGvZfEL.s:26: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccGvZfEL.s:27: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccGvZfEL.s:28: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccGvZfEL.s:29: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccGvZfEL.s:30: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccGvZfEL.s:31: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccGvZfEL.s:32: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccGvZfEL.s:33: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccGvZfEL.s:34: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccGvZfEL.s:35: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccGvZfEL.s:36: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccGvZfEL.s:37: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccGvZfEL.s:38: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccGvZfEL.s:39: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccGvZfEL.s:40: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccGvZfEL.s:41: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccGvZfEL.s:42: Error: bad instruction `movdqa xmm12,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccGvZfEL.s:43: Error: bad instruction `movdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccGvZfEL.s:44: Error: bad instruction `movdqa xmm11,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccGvZfEL.s:46: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE sse4

Compiler output

Implementation: sse4
Security model: unknown
Compiler: gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/cchnxUyd.s: Assembler messages:
encrypt.c: /tmp/cchnxUyd.s:19: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/cchnxUyd.s:22: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/cchnxUyd.s:24: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/cchnxUyd.s:25: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/cchnxUyd.s:26: Error: expression too complex -- `push r13'
encrypt.c: /tmp/cchnxUyd.s:27: Error: expression too complex -- `push r14'
encrypt.c: /tmp/cchnxUyd.s:28: Error: expression too complex -- `push r15'
encrypt.c: /tmp/cchnxUyd.s:29: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/cchnxUyd.s:30: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/cchnxUyd.s:31: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/cchnxUyd.s:32: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/cchnxUyd.s:33: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/cchnxUyd.s:34: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/cchnxUyd.s:35: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/cchnxUyd.s:36: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/cchnxUyd.s:37: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/cchnxUyd.s:38: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/cchnxUyd.s:39: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/cchnxUyd.s:40: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/cchnxUyd.s:41: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/cchnxUyd.s:42: Error: bad instruction `movdqa xmm12,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/cchnxUyd.s:43: Error: bad instruction `movdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/cchnxUyd.s:44: Error: bad instruction `movdqa xmm11,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/cchnxUyd.s:46: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE sse4

Namespace violations

Implementation: ref
Security model: unknown
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
omdsha256.o calc_L_i T
omdsha256.o double_block T
omdsha256.o final_masking_associated_data T
omdsha256.o final_masking_message T
omdsha256.o hash T
omdsha256.o increment_masking_associated_data T
omdsha256.o increment_masking_message T
omdsha256.o key_func T
omdsha256.o l2b T
omdsha256.o ntz T
omdsha256.o omdsha256_process T
omdsha256.o triple_block T
omdsha256.o xor_block T
sha256.o sha256_comp T

Number of similar (compiler,implementation) pairs: 5, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE ref
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE ref
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE ref
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE ref
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE ref