Implementation notes: armeabi, novena, crypto_aead/omdsha256k256n104tau160v1

Computer: novena
Architecture: armeabi
CPU ID: unknown CPU ID
SUPERCOP version: 20220506
Operation: crypto_aead
Primitive: omdsha256k256n104tau160v1

Checksum failure

Implementation: T:ref
Security model: timingleaks
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
0b4ac95ee8eabcbb101a0960f8df581ee1f6dde638418e34548097326115a93e
Number of similar (compiler,implementation) pairs: 9, namely:
CompilerImplementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:ref
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:ref
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:ref
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:ref
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:ref
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:ref
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:ref
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE T:ref
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE T:ref

Compiler output

Implementation: T:avx1
Security model: timingleaks
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
encrypt.c: <inline asm>:1:1: error: unknown directive
encrypt.c: .intel_syntax noprefix
encrypt.c: ^
encrypt.c: <inline asm>:3:12: error: invalid alignment value
encrypt.c: .align 32
encrypt.c: ^
encrypt.c: <inline asm>:5:6: error: invalid operand for instruction
encrypt.c: push rbx
encrypt.c: ^
encrypt.c: <inline asm>:6:10: error: invalid operand for instruction
encrypt.c: push rbp
encrypt.c: ^
encrypt.c: <inline asm>:7:10: error: invalid operand for instruction
encrypt.c: push r13
encrypt.c: ^
encrypt.c: <inline asm>:8:10: error: invalid operand for instruction
encrypt.c: push r14
encrypt.c: ^
encrypt.c: <inline asm>:9:10: error: invalid operand for instruction
encrypt.c: push r15
encrypt.c: ^
encrypt.c: <inline asm>:10:9: error: operand must be a register in range [r0, r15]
encrypt.c: sub rsp,32
encrypt.c: ^
encrypt.c: <inline asm>:11:5: error: invalid instruction, did you mean: lsl, sel?
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 8, namely:
CompilerImplementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:avx1
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:avx1
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:avx1
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:avx1
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:sse4
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:sse4
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:sse4
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:sse4

Compiler output

Implementation: T:avx1
Security model: timingleaks
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
encrypt.c: <inline asm>:1:1: error: unknown directive
encrypt.c: .intel_syntax noprefix
encrypt.c: ^
encrypt.c: <inline asm>:3:12: error: invalid alignment value
encrypt.c: .align 32
encrypt.c: ^
encrypt.c: <inline asm>:5:6: error: invalid operand for instruction
encrypt.c: push rbx
encrypt.c: ^
encrypt.c: <inline asm>:6:10: error: invalid operand for instruction
encrypt.c: push rbp
encrypt.c: ^
encrypt.c: <inline asm>:7:10: error: invalid operand for instruction
encrypt.c: push r13
encrypt.c: ^
encrypt.c: <inline asm>:8:10: error: invalid operand for instruction
encrypt.c: push r14
encrypt.c: ^
encrypt.c: <inline asm>:9:10: error: invalid operand for instruction
encrypt.c: push r15
encrypt.c: ^
encrypt.c: <inline asm>:10:9: error: operand must be a register in range [r0, r15]
encrypt.c: sub rsp,32
encrypt.c: ^
encrypt.c: <inline asm>:11:5: error: invalid instruction, did you mean: lsl, sel, vqshl, vrshl, vshl, vshll?
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 2, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:avx1 T:sse4

Compiler output

Implementation: T:avx1
Security model: timingleaks
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/cc0ghgCR.s: Assembler messages:
encrypt.c: /tmp/cc0ghgCR.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/cc0ghgCR.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/cc0ghgCR.s:23: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/cc0ghgCR.s:24: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/cc0ghgCR.s:25: Error: expression too complex -- `push r13'
encrypt.c: /tmp/cc0ghgCR.s:26: Error: expression too complex -- `push r14'
encrypt.c: /tmp/cc0ghgCR.s:27: Error: expression too complex -- `push r15'
encrypt.c: /tmp/cc0ghgCR.s:28: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/cc0ghgCR.s:29: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/cc0ghgCR.s:30: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/cc0ghgCR.s:31: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/cc0ghgCR.s:32: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/cc0ghgCR.s:33: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/cc0ghgCR.s:34: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/cc0ghgCR.s:35: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/cc0ghgCR.s:36: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/cc0ghgCR.s:37: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/cc0ghgCR.s:38: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/cc0ghgCR.s:39: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/cc0ghgCR.s:40: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/cc0ghgCR.s:41: Error: bad instruction `vmovdqa xmm13,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/cc0ghgCR.s:42: Error: bad instruction `vmovdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/cc0ghgCR.s:43: Error: bad instruction `vmovdqa xmm12,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/cc0ghgCR.s:45: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:avx1

Compiler output

Implementation: T:avx1
Security model: timingleaks
Compiler: gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/cccctrXU.s: Assembler messages:
encrypt.c: /tmp/cccctrXU.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/cccctrXU.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/cccctrXU.s:23: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/cccctrXU.s:24: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/cccctrXU.s:25: Error: expression too complex -- `push r13'
encrypt.c: /tmp/cccctrXU.s:26: Error: expression too complex -- `push r14'
encrypt.c: /tmp/cccctrXU.s:27: Error: expression too complex -- `push r15'
encrypt.c: /tmp/cccctrXU.s:28: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/cccctrXU.s:29: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/cccctrXU.s:30: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/cccctrXU.s:31: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/cccctrXU.s:32: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/cccctrXU.s:33: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/cccctrXU.s:34: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/cccctrXU.s:35: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/cccctrXU.s:36: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/cccctrXU.s:37: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/cccctrXU.s:38: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/cccctrXU.s:39: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/cccctrXU.s:40: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/cccctrXU.s:41: Error: bad instruction `vmovdqa xmm13,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/cccctrXU.s:42: Error: bad instruction `vmovdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/cccctrXU.s:43: Error: bad instruction `vmovdqa xmm12,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/cccctrXU.s:45: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:avx1

Compiler output

Implementation: T:avx1
Security model: timingleaks
Compiler: gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/ccyC6q5v.s: Assembler messages:
encrypt.c: /tmp/ccyC6q5v.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccyC6q5v.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccyC6q5v.s:23: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccyC6q5v.s:24: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccyC6q5v.s:25: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccyC6q5v.s:26: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccyC6q5v.s:27: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccyC6q5v.s:28: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccyC6q5v.s:29: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccyC6q5v.s:30: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccyC6q5v.s:31: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccyC6q5v.s:32: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccyC6q5v.s:33: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccyC6q5v.s:34: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccyC6q5v.s:35: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccyC6q5v.s:36: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccyC6q5v.s:37: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccyC6q5v.s:38: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccyC6q5v.s:39: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccyC6q5v.s:40: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccyC6q5v.s:41: Error: bad instruction `vmovdqa xmm13,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccyC6q5v.s:42: Error: bad instruction `vmovdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccyC6q5v.s:43: Error: bad instruction `vmovdqa xmm12,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccyC6q5v.s:45: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE T:avx1

Compiler output

Implementation: T:avx1
Security model: timingleaks
Compiler: gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/ccMO5WyT.s: Assembler messages:
encrypt.c: /tmp/ccMO5WyT.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccMO5WyT.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccMO5WyT.s:23: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccMO5WyT.s:24: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccMO5WyT.s:25: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccMO5WyT.s:26: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccMO5WyT.s:27: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccMO5WyT.s:28: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccMO5WyT.s:29: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccMO5WyT.s:30: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccMO5WyT.s:31: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccMO5WyT.s:32: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccMO5WyT.s:33: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccMO5WyT.s:34: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccMO5WyT.s:35: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccMO5WyT.s:36: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccMO5WyT.s:37: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccMO5WyT.s:38: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccMO5WyT.s:39: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccMO5WyT.s:40: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccMO5WyT.s:41: Error: bad instruction `vmovdqa xmm13,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccMO5WyT.s:42: Error: bad instruction `vmovdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccMO5WyT.s:43: Error: bad instruction `vmovdqa xmm12,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccMO5WyT.s:45: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE T:avx1

Compiler output

Implementation: T:sse4
Security model: timingleaks
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/ccnDYqhJ.s: Assembler messages:
encrypt.c: /tmp/ccnDYqhJ.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccnDYqhJ.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccnDYqhJ.s:22: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccnDYqhJ.s:23: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccnDYqhJ.s:24: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccnDYqhJ.s:25: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccnDYqhJ.s:26: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccnDYqhJ.s:27: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccnDYqhJ.s:28: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccnDYqhJ.s:29: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccnDYqhJ.s:30: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccnDYqhJ.s:31: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccnDYqhJ.s:32: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccnDYqhJ.s:33: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccnDYqhJ.s:34: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccnDYqhJ.s:35: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccnDYqhJ.s:36: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccnDYqhJ.s:37: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccnDYqhJ.s:38: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccnDYqhJ.s:39: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccnDYqhJ.s:40: Error: bad instruction `movdqa xmm12,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccnDYqhJ.s:41: Error: bad instruction `movdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccnDYqhJ.s:42: Error: bad instruction `movdqa xmm11,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccnDYqhJ.s:44: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:sse4

Compiler output

Implementation: T:sse4
Security model: timingleaks
Compiler: gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/ccddgcnI.s: Assembler messages:
encrypt.c: /tmp/ccddgcnI.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccddgcnI.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccddgcnI.s:22: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccddgcnI.s:23: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccddgcnI.s:24: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccddgcnI.s:25: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccddgcnI.s:26: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccddgcnI.s:27: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccddgcnI.s:28: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccddgcnI.s:29: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccddgcnI.s:30: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccddgcnI.s:31: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccddgcnI.s:32: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccddgcnI.s:33: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccddgcnI.s:34: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccddgcnI.s:35: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccddgcnI.s:36: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccddgcnI.s:37: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccddgcnI.s:38: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccddgcnI.s:39: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccddgcnI.s:40: Error: bad instruction `movdqa xmm12,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccddgcnI.s:41: Error: bad instruction `movdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccddgcnI.s:42: Error: bad instruction `movdqa xmm11,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccddgcnI.s:44: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:sse4

Compiler output

Implementation: T:sse4
Security model: timingleaks
Compiler: gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/ccYEe4Sf.s: Assembler messages:
encrypt.c: /tmp/ccYEe4Sf.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccYEe4Sf.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccYEe4Sf.s:22: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccYEe4Sf.s:23: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccYEe4Sf.s:24: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccYEe4Sf.s:25: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccYEe4Sf.s:26: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccYEe4Sf.s:27: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccYEe4Sf.s:28: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccYEe4Sf.s:29: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccYEe4Sf.s:30: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccYEe4Sf.s:31: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccYEe4Sf.s:32: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccYEe4Sf.s:33: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccYEe4Sf.s:34: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccYEe4Sf.s:35: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccYEe4Sf.s:36: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccYEe4Sf.s:37: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccYEe4Sf.s:38: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccYEe4Sf.s:39: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccYEe4Sf.s:40: Error: bad instruction `movdqa xmm12,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccYEe4Sf.s:41: Error: bad instruction `movdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccYEe4Sf.s:42: Error: bad instruction `movdqa xmm11,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccYEe4Sf.s:44: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE T:sse4

Compiler output

Implementation: T:sse4
Security model: timingleaks
Compiler: gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/ccZ4Vkhe.s: Assembler messages:
encrypt.c: /tmp/ccZ4Vkhe.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccZ4Vkhe.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccZ4Vkhe.s:22: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccZ4Vkhe.s:23: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccZ4Vkhe.s:24: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccZ4Vkhe.s:25: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccZ4Vkhe.s:26: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccZ4Vkhe.s:27: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccZ4Vkhe.s:28: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccZ4Vkhe.s:29: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccZ4Vkhe.s:30: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccZ4Vkhe.s:31: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccZ4Vkhe.s:32: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccZ4Vkhe.s:33: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccZ4Vkhe.s:34: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccZ4Vkhe.s:35: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccZ4Vkhe.s:36: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccZ4Vkhe.s:37: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccZ4Vkhe.s:38: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccZ4Vkhe.s:39: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccZ4Vkhe.s:40: Error: bad instruction `movdqa xmm12,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccZ4Vkhe.s:41: Error: bad instruction `movdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccZ4Vkhe.s:42: Error: bad instruction `movdqa xmm11,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccZ4Vkhe.s:44: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE T:sse4