Implementation notes: armeabi, berry2, crypto_hash/lane256

Computer: berry2
Microarchitecture: armeabi; Cortex-A7 (410fc075)
Architecture: armeabi
CPU ID: unknown CPU ID
SUPERCOP version: 20221122
Operation: crypto_hash
Primitive: lane256

Time	Object size	Test size	Implementation	Compiler	Benchmark date	SUPERCOP version
215345	100904 0 0	120106 384 760	`T:c`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210118	20210114
229779	100376 0 0	107752 376 744	`T:c`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210118	20210114
263388	98460 0 0	106348 384 744	`T:c`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210118	20210114
270262	153680 0 0	161560 384 744	`T:c`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210118	20210114
289091	154768 0 0	164476 384 744	`T:c`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210118	20210114

Namespace violations

Implementation: T:c
Security model: timingleaks
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

lane.o Final T
lane.o Hash T
lane.o Init T
lane.o Update T
lane.o lane256_compress T
lane.o lane512_compress T

Number of similar (compiler,implementation) pairs: 5, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	T:c
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE	T:c
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE	T:c
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE	T:c
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE	T:c