Implementation notes: armeabi, berry0, crypto_hash/asconhashbi32v12

Computer: berry0
Microarchitecture: armeabi; ARM1176 (410fb767)
Architecture: armeabi
CPU ID: unknown CPU ID
SUPERCOP version: 20240107
Operation: crypto_hash
Primitive: asconhashbi32v12
TimeObject sizeTest sizeImplementationCompilerBenchmark dateSUPERCOP version
1365853284 0 014192 384 752bi32_armv6clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
1369443248 0 011639 380 744bi32_armv6clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
1371173268 0 013392 384 744bi32_armv6clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
1371493268 0 013392 384 744bi32_armv6clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
1373163160 0 012880 384 744bi32_armv6gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012220240107
1374023268 0 014120 384 752bi32_armv6clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
1380883156 0 011087 380 744bi32_armv6gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012220240107
1386853156 0 010551 372 744bi32_armv6gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012220240107
1413223384 0 011327 380 744bi32_armv6gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012220240107
1914884124 0 013848 384 744bi32gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012220240107
1921724120 0 012047 380 744bi32gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012220240107
2104074424 0 015266 384 752bi32clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
2107254404 0 012785 380 744bi32clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
2107614424 0 014538 384 744bi32clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
2108044424 0 014538 384 744bi32clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
2108684308 0 011695 372 744bi32gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012220240107
21889111156 0 020900 384 744refgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012220240107
2318924700 0 015602 384 752bi32clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
2346159904 0 017863 380 744refgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012220240107
2360652228 0 011984 388 744bi32_lowreggcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012220240107
2361852192 0 010151 384 744bi32_lowreggcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012220240107
23926611204 0 019159 380 744refgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012220240107
2526834556 0 012495 380 744bi32gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012220240107
253006984 0 010736 388 744bi32_lowsizegcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012220240107
253468980 0 08935 384 744bi32_lowsizegcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012220240107
253492940 0 08359 376 744bi32_lowsizegcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012220240107
2705021860 0 09279 376 744bi32_lowreggcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012220240107
2960901176 0 09143 384 744bi32_lowsizegcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012220240107
2982482232 0 010199 384 744bi32_lowreggcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012220240107
3001271844 0 011985 384 744refclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
3003291844 0 011985 384 744refclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
3003402236 0 013105 384 752refclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
3101171160 0 011306 388 744bi32_lowsizeclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
3103081160 0 011306 388 744bi32_lowsizeclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
3105391160 0 012034 388 752bi32_lowsizeclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
3105571056 0 08459 372 744refgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012220240107
3107131140 0 09553 384 744bi32_lowsizeclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
3167102264 0 013185 384 752refclang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
3213412396 0 012529 388 744bi32_lowregclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
3213922396 0 012529 388 744bi32_lowregclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
3217152396 0 013257 388 752bi32_lowregclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
3218592396 0 010792 384 744bi32_lowregclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
3305821776 0 010184 380 744refclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
3316902472 0 013385 388 752bi32_lowregclang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107
3336531208 0 012138 388 752bi32_lowsizeclang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012220240107

Compiler output

Implementation: bi32_armv6m
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
hash.c: In file included from hash.c:4:
hash.c: In file included from ./permutations.h:11:
hash.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
hash.c: "@.syntax_unified\n\t"
hash.c: ^
hash.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
hash.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
hash.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
hash.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
hash.c: 5 errors generated.

Number of similar (compiler,implementation) pairs: 4, namely:
CompilerImplementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv6m
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv6m
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv6m
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv6m

Compiler output

Implementation: bi32_armv6m
Security model: constbranchindex
Compiler: clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
hash.c: In file included from hash.c:4:
hash.c: In file included from ./permutations.h:11:
hash.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
hash.c: "@.syntax_unified\n\t"
hash.c: ^
hash.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
hash.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
hash.c: 3 errors generated.

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv6m

Compiler output

Implementation: bi32_armv6m
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE
hash.c: In file included from permutations.h:11,
hash.c: from hash.c:4:
hash.c: hash.c: In function 'crypto_hash_asconhashbi32v12_bi32_armv6m_constbranchindex':
hash.c: round.h:13:3: error: impossible constraint in 'asm'
hash.c: __asm__ __volatile__(
hash.c: ^~~~~~~
hash.c: round.h:13:3: error: impossible constraint in 'asm'
hash.c: __asm__ __volatile__(
hash.c: ^~~~~~~
hash.c: round.h:13:3: error: impossible constraint in 'asm'
hash.c: __asm__ __volatile__(
hash.c: ^~~~~~~

Number of similar (compiler,implementation) pairs: 4, namely:
CompilerImplementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv6m
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv6m
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv6m
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv6m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
hash.c: In file included from hash.c:4:
hash.c: ./permutations.h:34:3: error: instruction requires: thumb2
hash.c: ROUND5(x0, x1, x2, x3, x4, RC0);
hash.c: ^
hash.c: ./round.h:159:41: note: expanded from macro 'ROUND5'
hash.c: "eor %[tmp2], %[x3_l], %[x4_l]\n\t" \
hash.c: ^
hash.c: <inline asm>:5:2: note: instantiated into assembly here
hash.c: orn r11, r8, r11
hash.c: ^
hash.c: In file included from hash.c:4:
hash.c: ./permutations.h:34:3: error: instruction requires: thumb2
hash.c: ROUND5(x0, x1, x2, x3, x4, RC0);
hash.c: ^
hash.c: ./round.h:175:41: note: expanded from macro 'ROUND5'
hash.c: "eor %[tmp2], %[x3_h], %[x4_h]\n\t" \
hash.c: ^
hash.c: <inline asm>:21:2: note: instantiated into assembly here
hash.c: orn r7, r1, r7
hash.c: ^
hash.c: In file included from hash.c:4:
hash.c: ./permutations.h:35:3: error: instruction requires: thumb2
hash.c: ROUND5(x2, x3, x4, x0, x1, RC1);
hash.c: ^
hash.c: ./round.h:159:41: note: expanded from macro 'ROUND5'
hash.c: ...

Number of similar (compiler,implementation) pairs: 5, namely:
CompilerImplementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv7m
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv7m
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv7m
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv7m
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv7m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE
hash.c: /tmp/ccj9voz1.s: Assembler messages:
hash.c: /tmp/ccj9voz1.s:77: Error: selected processor does not support `orn r0,lr,r0' in ARM mode
hash.c: /tmp/ccj9voz1.s:93: Error: selected processor does not support `orn r1,ip,r1' in ARM mode
hash.c: /tmp/ccj9voz1.s:132: Error: selected processor does not support `orn r7,r2,r7' in ARM mode
hash.c: /tmp/ccj9voz1.s:148: Error: selected processor does not support `orn r6,r3,r6' in ARM mode
hash.c: /tmp/ccj9voz1.s:187: Error: selected processor does not support `orn lr,r5,lr' in ARM mode
hash.c: /tmp/ccj9voz1.s:203: Error: selected processor does not support `orn ip,r4,ip' in ARM mode
hash.c: /tmp/ccj9voz1.s:242: Error: selected processor does not support `orn r2,r0,r2' in ARM mode
hash.c: /tmp/ccj9voz1.s:258: Error: selected processor does not support `orn r3,r1,r3' in ARM mode
hash.c: /tmp/ccj9voz1.s:297: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
hash.c: /tmp/ccj9voz1.s:313: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
hash.c: /tmp/ccj9voz1.s:352: Error: selected processor does not support `orn r0,lr,r0' in ARM mode
hash.c: /tmp/ccj9voz1.s:368: Error: selected processor does not support `orn r1,ip,r1' in ARM mode
hash.c: /tmp/ccj9voz1.s:407: Error: selected processor does not support `orn r7,r2,r7' in ARM mode
hash.c: /tmp/ccj9voz1.s:423: Error: selected processor does not support `orn r6,r3,r6' in ARM mode
hash.c: /tmp/ccj9voz1.s:462: Error: selected processor does not support `orn lr,r5,lr' in ARM mode
hash.c: /tmp/ccj9voz1.s:478: Error: selected processor does not support `orn ip,r4,ip' in ARM mode
hash.c: /tmp/ccj9voz1.s:517: Error: selected processor does not support `orn r2,r0,r2' in ARM mode
hash.c: /tmp/ccj9voz1.s:533: Error: selected processor does not support `orn r3,r1,r3' in ARM mode
hash.c: /tmp/ccj9voz1.s:572: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
hash.c: /tmp/ccj9voz1.s:588: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
hash.c: /tmp/ccj9voz1.s:626: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
hash.c: /tmp/ccj9voz1.s:630: Error: selected processor does not support `orn r10,lr,r0' in ARM mode
hash.c: /tmp/ccj9voz1.s:644: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
hash.c: /tmp/ccj9voz1.s:647: Error: selected processor does not support `orn r10,ip,r1' in ARM mode
hash.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv7m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE
hash.c: /tmp/ccqzH5Sc.s: Assembler messages:
hash.c: /tmp/ccqzH5Sc.s:78: Error: selected processor does not support `orn r0,lr,r0' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:94: Error: selected processor does not support `orn r1,ip,r1' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:133: Error: selected processor does not support `orn r7,r2,r7' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:149: Error: selected processor does not support `orn r6,r3,r6' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:188: Error: selected processor does not support `orn lr,r5,lr' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:204: Error: selected processor does not support `orn ip,r4,ip' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:243: Error: selected processor does not support `orn r2,r0,r2' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:259: Error: selected processor does not support `orn r3,r1,r3' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:298: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:314: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:353: Error: selected processor does not support `orn r0,lr,r0' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:369: Error: selected processor does not support `orn r1,ip,r1' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:408: Error: selected processor does not support `orn r7,r2,r7' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:424: Error: selected processor does not support `orn r6,r3,r6' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:463: Error: selected processor does not support `orn lr,r5,lr' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:479: Error: selected processor does not support `orn ip,r4,ip' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:518: Error: selected processor does not support `orn r2,r0,r2' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:534: Error: selected processor does not support `orn r3,r1,r3' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:573: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:589: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:627: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:631: Error: selected processor does not support `orn r10,lr,r0' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:645: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
hash.c: /tmp/ccqzH5Sc.s:648: Error: selected processor does not support `orn r10,ip,r1' in ARM mode
hash.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv7m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE
hash.c: /tmp/ccv5LVH5.s: Assembler messages:
hash.c: /tmp/ccv5LVH5.s:89: Error: selected processor does not support `orn r0,lr,r0' in ARM mode
hash.c: /tmp/ccv5LVH5.s:105: Error: selected processor does not support `orn r1,ip,r1' in ARM mode
hash.c: /tmp/ccv5LVH5.s:144: Error: selected processor does not support `orn r7,r2,r7' in ARM mode
hash.c: /tmp/ccv5LVH5.s:160: Error: selected processor does not support `orn r6,r3,r6' in ARM mode
hash.c: /tmp/ccv5LVH5.s:199: Error: selected processor does not support `orn lr,r5,lr' in ARM mode
hash.c: /tmp/ccv5LVH5.s:215: Error: selected processor does not support `orn ip,r4,ip' in ARM mode
hash.c: /tmp/ccv5LVH5.s:254: Error: selected processor does not support `orn r2,r0,r2' in ARM mode
hash.c: /tmp/ccv5LVH5.s:270: Error: selected processor does not support `orn r3,r1,r3' in ARM mode
hash.c: /tmp/ccv5LVH5.s:309: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
hash.c: /tmp/ccv5LVH5.s:325: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
hash.c: /tmp/ccv5LVH5.s:364: Error: selected processor does not support `orn r0,lr,r0' in ARM mode
hash.c: /tmp/ccv5LVH5.s:380: Error: selected processor does not support `orn r1,ip,r1' in ARM mode
hash.c: /tmp/ccv5LVH5.s:419: Error: selected processor does not support `orn r7,r2,r7' in ARM mode
hash.c: /tmp/ccv5LVH5.s:435: Error: selected processor does not support `orn r6,r3,r6' in ARM mode
hash.c: /tmp/ccv5LVH5.s:474: Error: selected processor does not support `orn lr,r5,lr' in ARM mode
hash.c: /tmp/ccv5LVH5.s:490: Error: selected processor does not support `orn ip,r4,ip' in ARM mode
hash.c: /tmp/ccv5LVH5.s:529: Error: selected processor does not support `orn r2,r0,r2' in ARM mode
hash.c: /tmp/ccv5LVH5.s:545: Error: selected processor does not support `orn r3,r1,r3' in ARM mode
hash.c: /tmp/ccv5LVH5.s:584: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
hash.c: /tmp/ccv5LVH5.s:600: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
hash.c: /tmp/ccv5LVH5.s:638: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
hash.c: /tmp/ccv5LVH5.s:642: Error: selected processor does not support `orn r10,lr,r0' in ARM mode
hash.c: /tmp/ccv5LVH5.s:656: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
hash.c: /tmp/ccv5LVH5.s:659: Error: selected processor does not support `orn r10,ip,r1' in ARM mode
hash.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv7m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE
hash.c: /tmp/ccAzRMYl.s: Assembler messages:
hash.c: /tmp/ccAzRMYl.s:113: Error: selected processor does not support `orn lr,r4,lr' in ARM mode
hash.c: /tmp/ccAzRMYl.s:129: Error: selected processor does not support `orn ip,r2,ip' in ARM mode
hash.c: /tmp/ccAzRMYl.s:168: Error: selected processor does not support `orn r8,fp,r8' in ARM mode
hash.c: /tmp/ccAzRMYl.s:184: Error: selected processor does not support `orn r7,r3,r7' in ARM mode
hash.c: /tmp/ccAzRMYl.s:223: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
hash.c: /tmp/ccAzRMYl.s:239: Error: selected processor does not support `orn r2,r5,r2' in ARM mode
hash.c: /tmp/ccAzRMYl.s:278: Error: selected processor does not support `orn fp,lr,fp' in ARM mode
hash.c: /tmp/ccAzRMYl.s:294: Error: selected processor does not support `orn r3,ip,r3' in ARM mode
hash.c: /tmp/ccAzRMYl.s:333: Error: selected processor does not support `orn r6,r8,r6' in ARM mode
hash.c: /tmp/ccAzRMYl.s:349: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
hash.c: /tmp/ccAzRMYl.s:388: Error: selected processor does not support `orn lr,r4,lr' in ARM mode
hash.c: /tmp/ccAzRMYl.s:404: Error: selected processor does not support `orn ip,r2,ip' in ARM mode
hash.c: /tmp/ccAzRMYl.s:443: Error: selected processor does not support `orn r8,fp,r8' in ARM mode
hash.c: /tmp/ccAzRMYl.s:459: Error: selected processor does not support `orn r7,r3,r7' in ARM mode
hash.c: /tmp/ccAzRMYl.s:498: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
hash.c: /tmp/ccAzRMYl.s:514: Error: selected processor does not support `orn r2,r5,r2' in ARM mode
hash.c: /tmp/ccAzRMYl.s:553: Error: selected processor does not support `orn fp,lr,fp' in ARM mode
hash.c: /tmp/ccAzRMYl.s:569: Error: selected processor does not support `orn r3,ip,r3' in ARM mode
hash.c: /tmp/ccAzRMYl.s:608: Error: selected processor does not support `orn r6,r8,r6' in ARM mode
hash.c: /tmp/ccAzRMYl.s:624: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
hash.c: /tmp/ccAzRMYl.s:662: Error: selected processor does not support `orn r1,lr,fp' in ARM mode
hash.c: /tmp/ccAzRMYl.s:666: Error: selected processor does not support `orn r0,r4,lr' in ARM mode
hash.c: /tmp/ccAzRMYl.s:680: Error: selected processor does not support `orn r1,ip,r3' in ARM mode
hash.c: /tmp/ccAzRMYl.s:683: Error: selected processor does not support `orn r0,r2,ip' in ARM mode
hash.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv7m

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
permutations.c: In file included from permutations.c:1:
permutations.c: In file included from ./permutations.h:11:
permutations.c: ./round.h:18:39: error: instruction requires: thumb2
permutations.c: "eor %[x2_l], %[x2_l], %[x1_l]\n\t"
permutations.c: ^
permutations.c: <inline asm>:6:2: note: instantiated into assembly here
permutations.c: orn r1, r11, r4
permutations.c: ^
permutations.c: In file included from permutations.c:1:
permutations.c: In file included from ./permutations.h:11:
permutations.c: ./round.h:22:39: error: instruction requires: thumb2
permutations.c: "eor %[x0_l], %[x0_l], %[tmp1]\n\t"
permutations.c: ^
permutations.c: <inline asm>:10:2: note: instantiated into assembly here
permutations.c: orn r12, r9, r11
permutations.c: ^
permutations.c: In file included from permutations.c:1:
permutations.c: In file included from ./permutations.h:11:
permutations.c: ./round.h:37:39: error: instruction requires: thumb2
permutations.c: "eor %[x2_h], %[x2_h], %[x1_h]\n\t"
permutations.c: ^
permutations.c: <inline asm>:25:2: note: instantiated into assembly here
permutations.c: orn r1, r5, r0
permutations.c: ^
permutations.c: In file included from permutations.c:1:
permutations.c: ...

Number of similar (compiler,implementation) pairs: 4, namely:
CompilerImplementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv7m_small
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv7m_small
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv7m_small
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv7m_small

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
permutations.c: In file included from permutations.c:1:
permutations.c: In file included from ./permutations.h:11:
permutations.c: ./round.h:18:39: error: instruction requires: thumb2
permutations.c: "eor %[x2_l], %[x2_l], %[x1_l]\n\t"
permutations.c: ^
permutations.c: <inline asm>:6:2: note: instantiated into assembly here
permutations.c: orn r2, r11, r0
permutations.c: ^
permutations.c: In file included from permutations.c:1:
permutations.c: In file included from ./permutations.h:11:
permutations.c: ./round.h:22:39: error: instruction requires: thumb2
permutations.c: "eor %[x0_l], %[x0_l], %[tmp1]\n\t"
permutations.c: ^
permutations.c: <inline asm>:10:2: note: instantiated into assembly here
permutations.c: orn lr, r7, r11
permutations.c: ^
permutations.c: In file included from permutations.c:1:
permutations.c: In file included from ./permutations.h:11:
permutations.c: ./round.h:37:39: error: instruction requires: thumb2
permutations.c: "eor %[x2_h], %[x2_h], %[x1_h]\n\t"
permutations.c: ^
permutations.c: <inline asm>:25:2: note: instantiated into assembly here
permutations.c: orn r2, r12, r4
permutations.c: ^
permutations.c: In file included from permutations.c:1:
permutations.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv7m_small

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE
permutations.c: /tmp/cca6S7W6.s: Assembler messages:
permutations.c: /tmp/cca6S7W6.s:52: Error: selected processor does not support `orn r10,r1,r9' in ARM mode
permutations.c: /tmp/cca6S7W6.s:56: Error: selected processor does not support `orn r0,lr,r1' in ARM mode
permutations.c: /tmp/cca6S7W6.s:71: Error: selected processor does not support `orn r10,r2,r8' in ARM mode
permutations.c: /tmp/cca6S7W6.s:74: Error: selected processor does not support `orn r0,ip,r2' in ARM mode

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv7m_small

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE
permutations.c: /tmp/ccyjdP3e.s: Assembler messages:
permutations.c: /tmp/ccyjdP3e.s:52: Error: selected processor does not support `orn r10,r1,r9' in ARM mode
permutations.c: /tmp/ccyjdP3e.s:56: Error: selected processor does not support `orn r0,lr,r1' in ARM mode
permutations.c: /tmp/ccyjdP3e.s:71: Error: selected processor does not support `orn r10,r2,r8' in ARM mode
permutations.c: /tmp/ccyjdP3e.s:74: Error: selected processor does not support `orn r0,ip,r2' in ARM mode

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv7m_small

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE
permutations.c: /tmp/ccLfTbB3.s: Assembler messages:
permutations.c: /tmp/ccLfTbB3.s:52: Error: selected processor does not support `orn r0,ip,r10' in ARM mode
permutations.c: /tmp/ccLfTbB3.s:56: Error: selected processor does not support `orn fp,r4,ip' in ARM mode
permutations.c: /tmp/ccLfTbB3.s:71: Error: selected processor does not support `orn r0,r2,r9' in ARM mode
permutations.c: /tmp/ccLfTbB3.s:74: Error: selected processor does not support `orn fp,lr,r2' in ARM mode

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv7m_small

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE
permutations.c: /tmp/ccp1KQU9.s: Assembler messages:
permutations.c: /tmp/ccp1KQU9.s:51: Error: selected processor does not support `orn r0,ip,r10' in ARM mode
permutations.c: /tmp/ccp1KQU9.s:55: Error: selected processor does not support `orn fp,r4,ip' in ARM mode
permutations.c: /tmp/ccp1KQU9.s:70: Error: selected processor does not support `orn r0,r2,r9' in ARM mode
permutations.c: /tmp/ccp1KQU9.s:73: Error: selected processor does not support `orn fp,lr,r2' in ARM mode

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv7m_small

Namespace violations

Implementation: bi32
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
constants.o constants R
permutations.o P12 T

Number of similar (compiler,implementation) pairs: 18, namely:
CompilerImplementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv6
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv6
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv6
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv6
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv6
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv6
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv6
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv6
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv6

Namespace violations

Implementation: bi32_lowreg
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
constants.o constants R
hash.o ascon_absorb T
hash.o ascon_inithash T
hash.o ascon_squeeze T

Number of similar (compiler,implementation) pairs: 9, namely:
CompilerImplementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_lowreg
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_lowreg
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_lowreg
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_lowreg
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_lowreg
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_lowreg
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_lowreg
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_lowreg
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_lowreg

Namespace violations

Implementation: bi32_lowsize
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
constants.o constants R
permutations.o P T

Number of similar (compiler,implementation) pairs: 9, namely:
CompilerImplementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_lowsize
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_lowsize
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_lowsize
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_lowsize
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_lowsize
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_lowsize
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_lowsize
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_lowsize
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_lowsize