Implementation notes: amd64, titan0, crypto_sign/mqdss64

Computer: titan0
Microarchitecture: amd64; Haswell+AES (306c3)
Architecture: amd64
CPU ID: GenuineIntel-000306c3-bfebfbff
SUPERCOP version: 20240107
Operation: crypto_sign
Primitive: mqdss64
TimeObject sizeTest sizeImplementationCompilerBenchmark dateSUPERCOP version
2085802026895 0 051258 884 1760T:avx2clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121420231212
2235027625687 0 049770 884 1760T:avx2clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121420231212
2777054034071 0 057503 828 1792T:avx2gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121420231212
2978470812099 0 033308 876 1792T:avx2clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121420231212
3073754812804 0 033082 884 1728T:avx2clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121420231212
3200195214068 0 035551 828 1792T:avx2gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121420231212
3543203011477 0 031255 820 1760T:avx2gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121420231212
3598052812881 0 033927 828 1792T:avx2gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121420231212
10653212715551 0 039714 884 1760T:refclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121420231212
10688893619130 0 043602 884 1760T:refclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121420231212
12094144210173 0 031380 876 1792T:refclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121420231212
14229533025320 0 048847 828 1792T:refgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121420231212
29391847814306 0 037314 884 1728T:refclang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121420231212
35026399410338 0 030770 884 1728T:refclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121420231212
3634848019165 0 028975 820 1760T:refgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121420231212
38329803211684 0 033199 828 1792T:refgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121420231212
44199763610303 0 031399 828 1792T:refgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121420231212

Compiler output

Implementation: T:avx2
Security model: timingleaks
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
gf31.c: gf31.c:14:20: error: always_inline function '_mm256_set1_epi16' requires target feature 'avx', but would be inlined into function 'vgf31_unique' that is compiled without support for 'avx'
gf31.c: __m256i _w31 = _mm256_set1_epi16(31);
gf31.c: ^
gf31.c: gf31.c:14:20: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
gf31.c: gf31.c:18:13: error: always_inline function '_mm256_loadu_si256' requires target feature 'avx', but would be inlined into function 'vgf31_unique' that is compiled without support for 'avx'
gf31.c: x = _mm256_loadu_si256((__m256i const *) (in + 16*i));
gf31.c: ^
gf31.c: gf31.c:18:13: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
gf31.c: gf31.c:19:56: error: always_inline function '_mm256_cmpeq_epi16' requires target feature 'avx2', but would be inlined into function 'vgf31_unique' that is compiled without support for 'avx2'
gf31.c: x = _mm256_xor_si256(x, _mm256_and_si256(_w31, _mm256_cmpeq_epi16(x, _w31)));
gf31.c: ^
gf31.c: gf31.c:19:56: error: AVX vector argument of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
gf31.c: gf31.c:19:33: error: always_inline function '_mm256_and_si256' requires target feature 'avx2', but would be inlined into function 'vgf31_unique' that is compiled without support for 'avx2'
gf31.c: x = _mm256_xor_si256(x, _mm256_and_si256(_w31, _mm256_cmpeq_epi16(x, _w31)));
gf31.c: ^
gf31.c: gf31.c:19:33: error: AVX vector argument of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
gf31.c: gf31.c:19:13: error: always_inline function '_mm256_xor_si256' requires target feature 'avx2', but would be inlined into function 'vgf31_unique' that is compiled without support for 'avx2'
gf31.c: x = _mm256_xor_si256(x, _mm256_and_si256(_w31, _mm256_cmpeq_epi16(x, _w31)));
gf31.c: ^
gf31.c: gf31.c:19:13: error: AVX vector argument of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
gf31.c: gf31.c:20:9: error: always_inline function '_mm256_storeu_si256' requires target feature 'avx', but would be inlined into function 'vgf31_unique' that is compiled without support for 'avx'
gf31.c: _mm256_storeu_si256((__m256i*)(out + i*16), x);
gf31.c: ^
gf31.c: gf31.c:20:9: error: AVX vector argument of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
gf31.c: 12 errors generated.

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:avx2