Implementation notes: amd64, titan0, crypto_core/weightsntrup761

Computer: titan0
Microarchitecture: amd64; Haswell+AES (306c3)
Architecture: amd64
CPU ID: GenuineIntel-000306c3-bfebfbff
SUPERCOP version: 20240107
Operation: crypto_core
Primitive: weightsntrup761
TimeObject sizeTest sizeImplementationCompilerBenchmark dateSUPERCOP version
91510 0 015784 860 960avxclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121320231212
91510 0 016064 860 960avxclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121320231212
106370 0 015149 804 992avxgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121320231212
107355 0 011704 780 960avxgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121320231212
108369 0 012868 796 992avxgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121320231212
109370 0 013133 804 992avxgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121320231212
114232 0 012514 852 1024avxclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121320231212
118266 0 011784 860 928avxclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121320231212
122963 0 016496 860 960refclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121320231212
140495 0 015277 804 992refgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121320231212
154535 0 015784 860 960refclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121320231212
203363 0 014256 860 928refclang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121320231212
1250187 0 012917 804 992refgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121320231212
1288189 0 012652 796 992refgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121320231212
1298103 0 011608 860 928refclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121320231212
130290 0 012354 852 1024refclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121320231212
1956168 0 011472 780 960refgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121320231212

Compiler output

Implementation: avx
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
weight.c: weight.c:20:9: error: always_inline function '_mm256_loadu_si256' requires target feature 'avx', but would be inlined into function 'crypto_core_weightsntrup761_avx_constbranchindex' that is compiled without support for 'avx'
weight.c: sum = _mm256_loadu_si256((__m256i *) (in+p-32));
weight.c: ^
weight.c: weight.c:20:9: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
weight.c: weight.c:21:10: error: always_inline function '_mm256_set_epi8' requires target feature 'avx', but would be inlined into function 'crypto_core_weightsntrup761_avx_constbranchindex' that is compiled without support for 'avx'
weight.c: sum &= endingmask;
weight.c: ^
weight.c: ./params.h:2:20: note: expanded from macro 'endingmask'
weight.c: #define endingmask _mm256_set_epi8(1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0)
weight.c: ^
weight.c: weight.c:21:10: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
weight.c: ./params.h:2:20: note: expanded from macro 'endingmask'
weight.c: #define endingmask _mm256_set_epi8(1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0)
weight.c: ^
weight.c: weight.c:24:20: error: always_inline function '_mm256_loadu_si256' requires target feature 'avx', but would be inlined into function 'crypto_core_weightsntrup761_avx_constbranchindex' that is compiled without support for 'avx'
weight.c: __m256i bits = _mm256_loadu_si256((__m256i *) in);
weight.c: ^
weight.c: weight.c:24:20: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
weight.c: weight.c:25:13: error: always_inline function '_mm256_set1_epi8' requires target feature 'avx', but would be inlined into function 'crypto_core_weightsntrup761_avx_constbranchindex' that is compiled without support for 'avx'
weight.c: bits &= _mm256_set1_epi8(1);
weight.c: ^
weight.c: weight.c:25:13: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
weight.c: weight.c:26:11: error: always_inline function '_mm256_add_epi8' requires target feature 'avx2', but would be inlined into function 'crypto_core_weightsntrup761_avx_constbranchindex' that is compiled without support for 'avx2'
weight.c: sum = _mm256_add_epi8(sum,bits);
weight.c: ^
weight.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE avx