Implementation notes: amd64, shoe, crypto_core/weightsntrup761

Computer: shoe
Microarchitecture: amd64; Broadwell+AES (306d4)
Architecture: amd64
CPU ID: GenuineIntel-000306d4-bfebfbff
SUPERCOP version: 20240107
Operation: crypto_core
Primitive: weightsntrup761
TimeObject sizeTest sizeImplementationCompilerBenchmark dateSUPERCOP version
92510 0 015032 812 952avxclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121420231212
97510 0 014952 812 952avxclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121420231212
101293 0 012224 780 984avxgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121420231212
102284 0 010883 756 952avxgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121420231212
104288 0 011983 772 984avxgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121420231212
106293 0 013984 780 984avxgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121420231212
112232 0 011430 804 920avxclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121420231212
116266 0 011694 804 920avxclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121420231212
168435 0 014128 780 984refgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121420231212
1731434 0 015960 812 952refclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121420231212
186383 0 014808 812 952refclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121420231212
206379 0 014168 812 920refclang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121420231212
1268102 0 012008 780 984refgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121420231212
1284105 0 011767 772 984refgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121420231212
129297 0 011270 804 920refclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121420231212
1324103 0 011518 804 920refclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121420231212
191897 0 010667 756 952refgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121420231212

Compiler output

Implementation: avx
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
weight.c: weight.c:20:9: error: always_inline function '_mm256_loadu_si256' requires target feature 'avx', but would be inlined into function 'crypto_core_weightsntrup761_avx_constbranchindex' that is compiled without support for 'avx'
weight.c: sum = _mm256_loadu_si256((__m256i *) (in+p-32));
weight.c: ^
weight.c: weight.c:20:9: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
weight.c: weight.c:21:10: error: always_inline function '_mm256_set_epi8' requires target feature 'avx', but would be inlined into function 'crypto_core_weightsntrup761_avx_constbranchindex' that is compiled without support for 'avx'
weight.c: sum &= endingmask;
weight.c: ^
weight.c: ./params.h:2:20: note: expanded from macro 'endingmask'
weight.c: #define endingmask _mm256_set_epi8(1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0)
weight.c: ^
weight.c: weight.c:21:10: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
weight.c: ./params.h:2:20: note: expanded from macro 'endingmask'
weight.c: #define endingmask _mm256_set_epi8(1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0)
weight.c: ^
weight.c: weight.c:24:20: error: always_inline function '_mm256_loadu_si256' requires target feature 'avx', but would be inlined into function 'crypto_core_weightsntrup761_avx_constbranchindex' that is compiled without support for 'avx'
weight.c: __m256i bits = _mm256_loadu_si256((__m256i *) in);
weight.c: ^
weight.c: weight.c:24:20: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
weight.c: weight.c:25:13: error: always_inline function '_mm256_set1_epi8' requires target feature 'avx', but would be inlined into function 'crypto_core_weightsntrup761_avx_constbranchindex' that is compiled without support for 'avx'
weight.c: bits &= _mm256_set1_epi8(1);
weight.c: ^
weight.c: weight.c:25:13: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
weight.c: weight.c:26:11: error: always_inline function '_mm256_add_epi8' requires target feature 'avx2', but would be inlined into function 'crypto_core_weightsntrup761_avx_constbranchindex' that is compiled without support for 'avx2'
weight.c: sum = _mm256_add_epi8(sum,bits);
weight.c: ^
weight.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE avx