Implementation notes: amd64, rumba5, crypto_core/multsntrup1277

Computer: rumba5
Architecture: amd64
CPU ID: AuthenticAMD-00800f11-178bfbff
SUPERCOP version: 20211108
Operation: crypto_core
Primitive: multsntrup1277
TimeObject sizeTest sizeImplementationCompilerBenchmark dateSUPERCOP version
5399322024 0 035892 804 944avx800clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
5401322024 0 035860 804 944avx800clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
5462522024 0 035860 804 944avx800clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
5468322136 0 035972 804 944avxclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
5479022282 0 037137 804 976avx800gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
5485222136 0 035972 804 944avxclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
5490722168 0 036036 804 944avxclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
5677723210 0 038065 804 976avxgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
5759721416 0 032338 796 912avx800clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
5788321381 0 032290 796 912avxclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
5876322412 0 034824 796 976avx800gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
6072521753 0 034392 796 976avx800gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
6102023351 0 035752 796 976avxgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
6286521601 0 033088 788 944avx800gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
6344722681 0 035320 796 976avxgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
6350321612 0 033096 788 944avxgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
4576503950 0 018721 804 976refgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
5218582801 0 016796 804 944refclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
5253181665 0 015596 804 944refclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
5266761665 0 015596 804 944refclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
14788202703 0 016828 804 912refclang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3788826620 0 011618 796 912refclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
4264697591 0 012960 796 976refgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
4356619527 0 011976 788 944refgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
4442584685 0 013272 796 976refgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529

Compiler output

Implementation: avx
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
mult1280.c: mult1280.c:425:7: error: always_inline function '_mm256_set1_epi16' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: x = const_x16(0);
mult1280.c: ^
mult1280.c: mult1280.c:10:19: note: expanded from macro 'const_x16'
mult1280.c: #define const_x16 _mm256_set1_epi16
mult1280.c: ^
mult1280.c: mult1280.c:426:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: for (i = p&~15;i < 1280;i += 16) store_x16(&f[i],x);
mult1280.c: ^
mult1280.c: mult1280.c:9:24: note: expanded from macro 'store_x16'
mult1280.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1280.c: ^
mult1280.c: mult1280.c:427:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: for (i = p&~15;i < 1280;i += 16) store_x16(&g[i],x);
mult1280.c: ^
mult1280.c: mult1280.c:9:24: note: expanded from macro 'store_x16'
mult1280.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1280.c: ^
mult1280.c: mult1280.c:432:9: error: always_inline function '_mm256_loadu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: x = load_x16(&f[i]);
mult1280.c: ^
mult1280.c: mult1280.c:8:21: note: expanded from macro 'load_x16'
mult1280.c: #define load_x16(p) _mm256_loadu_si256((int16x16 *) (p))
mult1280.c: ^
mult1280.c: mult1280.c:434:5: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE avx

Compiler output

Implementation: avx800
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
mult1280.c: mult1280.c:425:7: error: always_inline function '_mm256_set1_epi16' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: x = const_x16(0);
mult1280.c: ^
mult1280.c: mult1280.c:10:19: note: expanded from macro 'const_x16'
mult1280.c: #define const_x16 _mm256_set1_epi16
mult1280.c: ^
mult1280.c: mult1280.c:426:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: for (i = p&~15;i < 1280;i += 16) store_x16(&f[i],x);
mult1280.c: ^
mult1280.c: mult1280.c:9:24: note: expanded from macro 'store_x16'
mult1280.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1280.c: ^
mult1280.c: mult1280.c:427:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: for (i = p&~15;i < 1280;i += 16) store_x16(&g[i],x);
mult1280.c: ^
mult1280.c: mult1280.c:9:24: note: expanded from macro 'store_x16'
mult1280.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1280.c: ^
mult1280.c: mult1280.c:432:9: error: always_inline function '_mm256_loadu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: x = load_x16(&f[i]);
mult1280.c: ^
mult1280.c: mult1280.c:8:21: note: expanded from macro 'load_x16'
mult1280.c: #define load_x16(p) _mm256_loadu_si256((int16x16 *) (p))
mult1280.c: ^
mult1280.c: mult1280.c:434:5: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE avx800