Implementation notes: amd64, raptor, crypto_aead/present80n6t4silcv3

Computer: raptor
Microarchitecture: amd64; Raptor Cove (b06a2)
Architecture: amd64
CPU ID: GenuineIntel-000b06a2-40-bfebfbff
SUPERCOP version: 20231107
Operation: crypto_aead
Primitive: present80n6t4silcv3

Time	Object size	Test size	Implementation	Compiler	Benchmark date	SUPERCOP version
478316	5000 752 512	20962 1516 1608	`T:vperm`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20231108	20230530
479861	4726 752 512	18594 1516 1608	`T:vperm`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20231108	20230530
1081106	4325 752 512	17841 1508 1608	`T:vperm`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20231108	20230530
1094589	3838 752 512	16065 1492 1576	`T:vperm`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20231108	20230530
15217169	4888 0 0	20812 772 1096	`T:ref`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20231108	20230530
15551039	2601 0 0	16218 772 1032	`T:ref`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20231108	20230530
15921434	2915 0 0	16764 772 1096	`T:ref`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20231108	20230530
16346926	4027 0 0	20018 772 1032	`T:ref`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20231108	20230530
16633359	3887 0 0	21218 772 1064	`T:ref`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20231108	20230530
16659187	3990 0 0	21474 772 1064	`T:ref`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20231108	20230530
16725309	2539 0 0	14715 748 1064	`T:ref`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20231108	20230530
17143166	2885 0 0	16273 756 1096	`T:ref`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20231108	20230530
17561427	2753 0 0	17052 764 1096	`T:ref`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20231108	20230530

Compiler output

Implementation: T:vperm
Security model: timingleaks
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

silc.c: silc.c:170:34: warning: implicit conversion from 'int' to 'char' changes value from 128 to -128 [-Wconstant-conversion]
silc.c: state = XORDQW(tmpState, SHR(state, 8));
silc.c: ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~
silc.c: ./common.h:30:126: note: expanded from macro 'SHR'
silc.c: #define SHR(x,n) _mm_shuffle_epi8((x), _mm_set_epi8(127+(n), 126+(n), 125+(n), 124+(n), 123+(n), 122+(n), 121+(n), 120+(n), 119+(n), 118+(n), 117+(n), 116+(n), 115+(n), 114+(n), 113+(n), 112+(n))) // shift to the right
silc.c: ~~~~~~~~~~~~ ^
silc.c: ./common.h:17:43: note: expanded from macro 'XORDQW'
silc.c: #define XORDQW(x, y) _mm_xor_si128((x), (y))
silc.c: ^
silc.c: silc.c:170:34: warning: implicit conversion from 'int' to 'char' changes value from 129 to -127 [-Wconstant-conversion]
silc.c: state = XORDQW(tmpState, SHR(state, 8));
silc.c: ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~
silc.c: ./common.h:30:117: note: expanded from macro 'SHR'
silc.c: #define SHR(x,n) _mm_shuffle_epi8((x), _mm_set_epi8(127+(n), 126+(n), 125+(n), 124+(n), 123+(n), 122+(n), 121+(n), 120+(n), 119+(n), 118+(n), 117+(n), 116+(n), 115+(n), 114+(n), 113+(n), 112+(n))) // shift to the right
silc.c: ~~~~~~~~~~~~ ^
silc.c: ./common.h:17:43: note: expanded from macro 'XORDQW'
silc.c: #define XORDQW(x, y) _mm_xor_si128((x), (y))
silc.c: ^
silc.c: silc.c:170:34: warning: implicit conversion from 'int' to 'char' changes value from 130 to -126 [-Wconstant-conversion]
silc.c: state = XORDQW(tmpState, SHR(state, 8));
silc.c: ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~
silc.c: ./common.h:30:108: note: expanded from macro 'SHR'
silc.c: #define SHR(x,n) _mm_shuffle_epi8((x), _mm_set_epi8(127+(n), 126+(n), 125+(n), 124+(n), 123+(n), 122+(n), 121+(n), 120+(n), 119+(n), 118+(n), 117+(n), 116+(n), 115+(n), 114+(n), 113+(n), 112+(n))) // shift to the right
silc.c: ~~~~~~~~~~~~ ^
silc.c: ./common.h:17:43: note: expanded from macro 'XORDQW'
silc.c: ...

Number of similar (compiler,implementation) pairs: 4, namely:

Compiler	Implementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	T:vperm
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	T:vperm
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	T:vperm
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	T:vperm

Compiler output

Implementation: T:vperm
Security model: timingleaks
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

present.c: present.c:112:15: error: always_inline function '_mm_shuffle_epi8' requires target feature 'ssse3', but would be inlined into function 'format_input' that is compiled without support for 'ssse3'
present.c: dqword tmp = PSHUFB(*state, LOAD(PRESENTInShuffleU));
present.c: ^
present.c: ./common.h:40:22: note: expanded from macro 'PSHUFB'
present.c: #define PSHUFB(s, x) _mm_shuffle_epi8((s), (x)) /*return s(x)*/
present.c: ^
present.c: present.c:113:11: error: always_inline function '_mm_shuffle_epi8' requires target feature 'ssse3', but would be inlined into function 'format_input' that is compiled without support for 'ssse3'
present.c: *state = PSHUFB(*state, LOAD(PRESENTInShuffleL));
present.c: ^
present.c: ./common.h:40:22: note: expanded from macro 'PSHUFB'
present.c: #define PSHUFB(s, x) _mm_shuffle_epi8((s), (x)) /*return s(x)*/
present.c: ^
present.c: 2 errors generated.

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	T:vperm