Test results for amd64, nucnuc, crypto_sign/luov890351

[Page version: 20241107 11:03:34]

Measurements for amd64, nucnuc, crypto_sign Test results for amd64, nucnuc, crypto_sign Test results for crypto_sign/luov890351
Computer: nucnuc
Microarchitecture: amd64; Airmont (406c3)
Architecture: amd64
CPU ID: GenuineIntel-000406c3-bfebfbff
SUPERCOP version: 20241022
Operation: crypto_sign
Primitive: luov890351
TimeObject sizeTest sizeImplementationCompilerBenchmark dateSUPERCOP version
228548181558216 0 0119162 812 1784T:portablegcc -march=native -mtune=native -O3 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall2024071720240625
229432643555510 0 0117132 852 1720T:portableclang -march=native -O3 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall2024071720240625
229493059555702 0 0115036 852 1720T:portableclang -march=native -O2 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall2024071720240625
229673696555980 0 0117140 852 1720T:portableclang -mcpu=native -O3 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall2024071720240625
235356104553800 0 0115578 812 1784T:portablegcc -march=native -mtune=native -O2 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall2024071720240625
235704653549589 0 0111004 836 1720T:portableclang -march=native -Os -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall2024071720240625
249578042552290 0 0114106 812 1784T:portablegcc -march=native -mtune=native -O -fwrapv -fPIC -fPIE -gdwarf-4 -Wall2024071720240625
255545430547823 0 0109634 804 1752T:portablegcc -march=native -mtune=native -Os -fwrapv -fPIC -fPIE -gdwarf-4 -Wall2024071720240625
268987720550645 0 0112332 836 1720T:portableclang -march=native -O -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall2024071720240625
744521057416481 36 0239404 852 1720T:refclang -march=native -O3 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall2024071720240625
745375252415885 36 0236732 852 1720T:refclang -march=native -O2 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall2024071720240625
755064448416640 36 0239162 812 1784T:refgcc -march=native -mtune=native -O3 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall2024071720240625
756303742412472 36 0236842 812 1784T:refgcc -march=native -mtune=native -O2 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall2024071720240625
768696681410844 36 0235250 812 1784T:refgcc -march=native -mtune=native -O -fwrapv -fPIC -fPIE -gdwarf-4 -Wall2024071720240625
774121348416694 36 0239172 852 1720T:refclang -mcpu=native -O3 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall2024071720240625
822006561409477 36 0233476 836 1720T:refclang -march=native -Os -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall2024071720240625
828430686408457 36 0232954 804 1752T:refgcc -march=native -mtune=native -Os -fwrapv -fPIC -fPIE -gdwarf-4 -Wall2024071720240625
840644123410393 36 0234700 836 1720T:refclang -march=native -O -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall2024071720240625

Compiler output

LUOV.c: LUOV.c:110:17: error: '__builtin_ia32_permti256' needs target feature avx2
LUOV.c:                         __m256i rr = _mm256_permute2x128_si256(_mm256_loadu_si256((__m256i *)&r),_mm256_setzero_si256(),0);
LUOV.c:                                      ^
LUOV.c: /usr/lib/llvm-11/lib/clang/11.0.1/include/avx2intrin.h:821:12: note: expanded from macro '_mm256_permute2x128_si256'
LUOV.c:   (__m256i)__builtin_ia32_permti256((__m256i)(V1), (__m256i)(V2), (int)(M))
LUOV.c:            ^
LUOV.c: LUOV.c:110:43: error: always_inline function '_mm256_loadu_si256' requires target feature 'avx', but would be inlined into function 'calculateQ2' that is compiled without support for 'avx'
LUOV.c:                         __m256i rr = _mm256_permute2x128_si256(_mm256_loadu_si256((__m256i *)&r),_mm256_setzero_si256(),0);
LUOV.c:                                                                ^
LUOV.c: LUOV.c:110:43: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
LUOV.c: LUOV.c:110:77: error: always_inline function '_mm256_setzero_si256' requires target feature 'avx', but would be inlined into function 'calculateQ2' that is compiled without support for 'avx'
LUOV.c:                         __m256i rr = _mm256_permute2x128_si256(_mm256_loadu_si256((__m256i *)&r),_mm256_setzero_si256(),0);
LUOV.c:                                                                                                  ^
LUOV.c: LUOV.c:110:77: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
LUOV.c: LUOV.c:115:20: error: always_inline function '_mm256_set1_epi8' requires target feature 'avx', but would be inlined into function 'calculateQ2' that is compiled without support for 'avx'
LUOV.c:                                 __m256i tttt = _mm256_set1_epi8(t[k/8]);
LUOV.c:                                                ^
LUOV.c: LUOV.c:115:20: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
LUOV.c: LUOV.c:117:54: error: always_inline function '_mm256_setzero_si256' requires target feature 'avx', but would be inlined into function 'calculateQ2' that is compiled without support for 'avx'
LUOV.c:                                 __m256i t1t2 = _mm256_cmpeq_epi8(tttt & masks[0],_mm256_setzero_si256());
LUOV.c:                                                                                  ^
LUOV.c: LUOV.c:117:54: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
LUOV.c: LUOV.c:117:20: error: always_inline function '_mm256_cmpeq_epi8' requires target feature 'avx2', but would be inlined into function 'calculateQ2' that is compiled without support for 'avx2'
LUOV.c:                                 __m256i t1t2 = _mm256_cmpeq_epi8(tttt & masks[0],_mm256_setzero_si256());
LUOV.c:                                                ^
LUOV.c: ...
Number of similar (implementation,compiler) pairs: 5, namely:
ImplementationCompiler
T:avx2clang -march=native -O2 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (Debian_Clang_11.0.1)
T:avx2clang -march=native -O3 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (Debian_Clang_11.0.1)
T:avx2clang -march=native -O -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (Debian_Clang_11.0.1)
T:avx2clang -march=native -Os -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (Debian_Clang_11.0.1)
T:avx2clang -mcpu=native -O3 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (Debian_Clang_11.0.1)

Compiler output

LUOV.c: LUOV.c: In function 'calculateQ2':
LUOV.c: LUOV.c:110:12: warning: AVX vector return without AVX enabled changes the ABI [-Wpsabi]
LUOV.c:   110 |    __m256i rr = _mm256_permute2x128_si256(_mm256_loadu_si256((__m256i *)&r),_mm256_setzero_si256(),0);
LUOV.c:       |            ^~
LUOV.c: In file included from LinearAlgebra.h:9,
LUOV.c:                  from LUOV.h:13,
LUOV.c:                  from LUOV.c:1:
LUOV.c: AVX_Operations.h: In function 'scalarMul_ct':
LUOV.c: AVX_Operations.h:529:6: note: the ABI for passing parameters with 32-byte alignment has changed in GCC 4.6
LUOV.c:   529 | void scalarMul_ct(__m256i *Out, __m256i A, FELT b){
LUOV.c:       |      ^~~~~~~~~~~~
LUOV.c: In file included from /usr/lib/gcc/x86_64-linux-gnu/10/include/immintrin.h:53,
LUOV.c:                  from LUOV.h:7,
LUOV.c:                  from LUOV.c:1:
LUOV.c: AVX_Operations.h: In function 'addScalarProductAVX':
LUOV.c: /usr/lib/gcc/x86_64-linux-gnu/10/include/avx2intrin.h:186:1: error: inlining failed in call to 'always_inline' '_mm256_andnot_si256': target specific option mismatch
LUOV.c:   186 | _mm256_andnot_si256 (__m256i __A, __m256i __B)
LUOV.c:       | ^~~~~~~~~~~~~~~~~~~
LUOV.c: In file included from LinearAlgebra.h:9,
LUOV.c:                  from LUOV.h:13,
LUOV.c:                  from LUOV.c:1:
LUOV.c: AVX_Operations.h:80:9: note: called from here
LUOV.c:    80 |  avx3 = _mm256_andnot_si256(avx3,aa);
LUOV.c:       |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
LUOV.c: In file included from /usr/lib/gcc/x86_64-linux-gnu/10/include/immintrin.h:53,
LUOV.c: ...
Number of similar (implementation,compiler) pairs: 4, namely:
ImplementationCompiler
T:avx2gcc -march=native -mtune=native -O2 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (10.2.1_20210110)
T:avx2gcc -march=native -mtune=native -O3 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (10.2.1_20210110)
T:avx2gcc -march=native -mtune=native -O -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (10.2.1_20210110)
T:avx2gcc -march=native -mtune=native -Os -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (10.2.1_20210110)

Compiler output

F64Field.c: F64Field.c: In function 'f64addInPlace':
F64Field.c: F64Field.c:43:4: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
F64Field.c:    43 |  *((uint64_t *) a->coef) ^= *((uint64_t *) b->coef);
F64Field.c:       |   ~^~~~~~~~~~~~~~~~~~~~~
F64Field.c: F64Field.c:43:31: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
F64Field.c:    43 |  *((uint64_t *) a->coef) ^= *((uint64_t *) b->coef);
F64Field.c:       |                              ~^~~~~~~~~~~~~~~~~~~~~
F80Field.c: F80Field.c: In function 'f80addInPlace':
F80Field.c: F80Field.c:55:4: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
F80Field.c:    55 |  *((uint64_t *) a->coef) ^= *((uint64_t *) b->coef);
F80Field.c:       |   ~^~~~~~~~~~~~~~~~~~~~~
F80Field.c: F80Field.c:55:31: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
F80Field.c:    55 |  *((uint64_t *) a->coef) ^= *((uint64_t *) b->coef);
F80Field.c:       |                              ~^~~~~~~~~~~~~~~~~~~~~
Number of similar (implementation,compiler) pairs: 3, namely:
ImplementationCompiler
T:portablegcc -march=native -mtune=native -O2 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (10.2.1_20210110)
T:portablegcc -march=native -mtune=native -O3 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (10.2.1_20210110)
T:portablegcc -march=native -mtune=native -Os -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (10.2.1_20210110)