Implementation notes: amd64, latour, crypto_core/rainbowcalsecret963664

Computer: latour
Architecture: amd64
CPU ID: GenuineIntel-000006fb-bfebfbff
SUPERCOP version: 20201130
Operation: crypto_core
Primitive: rainbowcalsecret963664

Time	Object size	Test size	Implementation	Compiler	Benchmark date	SUPERCOP version
137098260	66454 8 0	80102 760 832	`ssse3`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200908	20200906
138170349	54324 8 0	66802 816 760	`ssse3`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200908	20200906
141144219	45364 8 0	56890 816 760	`ssse3`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200908	20200906
141218586	38391 8 0	49152 808 760	`ssse3`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200908	20200906
141498207	50307 8 0	61950 760 832	`ssse3`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200908	20200906
141875739	45364 8 0	56890 816 760	`ssse3`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200908	20200906
144499104	51650 8 0	63598 760 832	`ssse3`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200908	20200906
178545843	25244 8 0	36129 736 800	`ssse3`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200908	20200906
618525108	39830 0 0	51440 792 760	`amd64`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200907	20200906
618714045	39830 0 0	51440 792 760	`amd64`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200907	20200906
618724224	39226 0 0	51640 792 760	`amd64`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200907	20200906
619222203	40922 0 0	53464 792 760	`amd64`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200907	20200906
671659776	42415 0 0	53424 792 760	`ref`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200908	20200906
672251427	42415 0 0	53424 792 760	`ref`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200908	20200906
672359436	43391 0 0	55336 792 760	`ref`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200908	20200906
672620733	41695 0 0	53512 792 760	`ref`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200908	20200906
745160787	21883 0 0	32630 784 760	`amd64`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200907	20200906
750521367	39784 0 0	53260 736 832	`amd64`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200907	20200906
752875218	38186 0 0	49892 736 832	`amd64`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200907	20200906
773720766	38732 0 0	50132 736 832	`amd64`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200907	20200906
1349447598	20211 0 0	30998 784 760	`ref`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200908	20200906
1392094458	23055 0 0	36556 736 832	`ref`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200907	20200906
1401006654	21386 0 0	33124 736 832	`ref`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200908	20200906
1459897929	11107 0 0	21679 712 800	`amd64`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200907	20200906
1460562813	21564 0 0	33028 736 832	`ref`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200908	20200906
3047692617	10104 0 0	20679 712 800	`ref`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200907	20200906

Compiler output

Implementation: avx2
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

blas_comm.c: In file included from blas_comm.c:6:
blas_comm.c: In file included from ./blas.h:25:
blas_comm.c: ./blas_avx2.h:88:17: error: always_inline function '_mm256_loadu_si256' requires target feature 'xsave', but would be inlined into function 'gf256v_add_avx2' that is compiled without support for 'xsave'
blas_comm.c: __m256i inp = _mm256_loadu_si256( (__m256i*) (a+i*32) );
blas_comm.c: ^
blas_comm.c: ./blas_avx2.h:89:17: error: always_inline function '_mm256_loadu_si256' requires target feature 'xsave', but would be inlined into function 'gf256v_add_avx2' that is compiled without support for 'xsave'
blas_comm.c: __m256i out = _mm256_loadu_si256( (__m256i*) (accu_b+i*32) );
blas_comm.c: ^
blas_comm.c: ./blas_avx2.h:91:3: error: always_inline function '_mm256_storeu_si256' requires target feature 'xsave', but would be inlined into function 'gf256v_add_avx2' that is compiled without support for 'xsave'
blas_comm.c: _mm256_storeu_si256( (__m256i*) (accu_b+i*32) , out );
blas_comm.c: ^
blas_comm.c: fatal error: error in backend: Do not know how to split this operator's operand!
blas_comm.c:
blas_comm.c: clang: error: clang frontend command failed with exit code 70 (use -v to see invocation)
blas_comm.c: clang version 3.8.0-2ubuntu4 (tags/RELEASE_380/final)
blas_comm.c: Target: x86_64-pc-linux-gnu
blas_comm.c: Thread model: posix
blas_comm.c: InstalledDir: /usr/bin
blas_comm.c: clang: note: diagnostic msg: PLEASE submit a bug report to http://llvm.org/bugs/ and include the crash backtrace, preprocessed source, and associated run script.
blas_comm.c: clang: note: diagnostic msg:
blas_comm.c: ********************
blas_comm.c:
blas_comm.c: PLEASE ATTACH THE FOLLOWING FILES TO THE BUG REPORT:
blas_comm.c: Preprocessed source(s) and associated run script(s) are located at:
blas_comm.c: clang: note: diagnostic msg: /tmp/blas_comm-c5a592.c
blas_comm.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx2

Compiler output

Implementation: avx2
Security model: constbranchindex
Compiler: clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx2

Compiler output

Implementation: avx2
Security model: constbranchindex
Compiler: clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx2

Compiler output

Implementation: avx2
Security model: constbranchindex
Compiler: clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx2

Compiler output

Implementation: avx2
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

blas_comm.c: In file included from blas_comm.c:6:
blas_comm.c: In file included from ./blas.h:25:
blas_comm.c: ./blas_avx2.h:88:17: error: always_inline function '_mm256_loadu_si256' requires target feature 'sse4.2', but would be inlined into function 'gf256v_add_avx2' that is compiled without support for 'sse4.2'
blas_comm.c: __m256i inp = _mm256_loadu_si256( (__m256i*) (a+i*32) );
blas_comm.c: ^
blas_comm.c: ./blas_avx2.h:89:17: error: always_inline function '_mm256_loadu_si256' requires target feature 'sse4.2', but would be inlined into function 'gf256v_add_avx2' that is compiled without support for 'sse4.2'
blas_comm.c: __m256i out = _mm256_loadu_si256( (__m256i*) (accu_b+i*32) );
blas_comm.c: ^
blas_comm.c: ./blas_avx2.h:91:3: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'gf256v_add_avx2' that is compiled without support for 'sse4.2'
blas_comm.c: _mm256_storeu_si256( (__m256i*) (accu_b+i*32) , out );
blas_comm.c: ^
blas_comm.c: fatal error: error in backend: Do not know how to split this operator's operand!
blas_comm.c:
blas_comm.c: clang: error: clang frontend command failed with exit code 70 (use -v to see invocation)
blas_comm.c: clang version 3.8.0-2ubuntu4 (tags/RELEASE_380/final)
blas_comm.c: Target: x86_64-pc-linux-gnu
blas_comm.c: Thread model: posix
blas_comm.c: InstalledDir: /usr/bin
blas_comm.c: clang: note: diagnostic msg: PLEASE submit a bug report to http://llvm.org/bugs/ and include the crash backtrace, preprocessed source, and associated run script.
blas_comm.c: clang: note: diagnostic msg:
blas_comm.c: ********************
blas_comm.c:
blas_comm.c: PLEASE ATTACH THE FOLLOWING FILES TO THE BUG REPORT:
blas_comm.c: Preprocessed source(s) and associated run script(s) are located at:
blas_comm.c: clang: note: diagnostic msg: /tmp/blas_comm-be777b.c
blas_comm.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx2

Compiler output

Implementation: avx2
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE

blas_comm.c: In file included from blas_avx2.h:15:0,
blas_comm.c: from blas.h:25,
blas_comm.c: from blas_comm.c:6:
blas_comm.c: gf16_avx2.h: In function 'linear_transform_8x8_256b':
blas_comm.c: gf16_avx2.h:28:1: warning: AVX vector return without AVX enabled changes the ABI [-Wpsabi]
blas_comm.c: {
blas_comm.c: ^
blas_comm.c: In file included from /usr/lib/gcc/x86_64-linux-gnu/5/include/immintrin.h:41:0,
blas_comm.c: from blas_avx2.h:10,
blas_comm.c: from blas.h:25,
blas_comm.c: from blas_comm.c:6:
blas_comm.c: blas_avx2.h: In function 'gf256v_add_avx2':
blas_comm.c: /usr/lib/gcc/x86_64-linux-gnu/5/include/avxintrin.h:900:1: error: inlining failed in call to always_inline '_mm256_storeu_si256': target specific option mismatch
blas_comm.c: _mm256_storeu_si256 (__m256i *__P, __m256i __A)
blas_comm.c: ^
blas_comm.c: In file included from blas.h:25:0,
blas_comm.c: from blas_comm.c:6:
blas_comm.c: blas_avx2.h:91:3: error: called from here
blas_comm.c: _mm256_storeu_si256( (__m256i*) (accu_b+i*32) , out );
blas_comm.c: ^
blas_comm.c: In file included from /usr/lib/gcc/x86_64-linux-gnu/5/include/immintrin.h:41:0,
blas_comm.c: from blas_avx2.h:10,
blas_comm.c: from blas.h:25,
blas_comm.c: from blas_comm.c:6:
blas_comm.c: /usr/lib/gcc/x86_64-linux-gnu/5/include/avxintrin.h:894:1: error: inlining failed in call to always_inline '_mm256_loadu_si256': target specific option mismatch
blas_comm.c: ...

Number of similar (compiler,implementation) pairs: 4, namely:

Compiler	Implementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE	avx2
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE	avx2
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE	avx2
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE	avx2

Compiler output

Implementation: ssse3
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

parallel_matrix_op.c: In file included from parallel_matrix_op.c:8:
parallel_matrix_op.c: In file included from ./blas.h:25:
parallel_matrix_op.c: In file included from ./blas_sse.h:16:
parallel_matrix_op.c: ./gf16_sse.h:34:9: error: always_inline function '_mm_shuffle_epi8' requires target feature 'ssse3', but would be inlined into function 'linear_transform_8x8_128b' that is compiled without support for 'ssse3'
parallel_matrix_op.c: return _mm_shuffle_epi8(tab_l,v&mask_f)^_mm_shuffle_epi8(tab_h,_mm_srli_epi16(v,4)&mask_f);
parallel_matrix_op.c: ^
parallel_matrix_op.c: ./gf16_sse.h:34:42: error: always_inline function '_mm_shuffle_epi8' requires target feature 'ssse3', but would be inlined into function 'linear_transform_8x8_128b' that is compiled without support for 'ssse3'
parallel_matrix_op.c: return _mm_shuffle_epi8(tab_l,v&mask_f)^_mm_shuffle_epi8(tab_h,_mm_srli_epi16(v,4)&mask_f);
parallel_matrix_op.c: ^
parallel_matrix_op.c: fatal error: error in backend: Cannot select: 0x2177740: v16i8 = X86ISD::PSHUFB 0x2176dc0, 0x2198a80
parallel_matrix_op.c: 0x2176dc0: v16i8,ch = CopyFromReg 0x206d9c0, Register:v16i8 %vreg35
parallel_matrix_op.c: 0x219a5e0: v16i8 = Register %vreg35
parallel_matrix_op.c: 0x2198a80: v16i8 = bitcast 0x2199960
parallel_matrix_op.c: 0x2199960: v2i64 = and 0x2195e60, 0x2195f90
parallel_matrix_op.c: 0x2195e60: v2i64 = bitcast 0x219c860
parallel_matrix_op.c: 0x219c860: v8i16 = X86ISD::VSRLI 0x21a5420, Constant:i8<4>
parallel_matrix_op.c: 0x21a5420: v8i16 = bitcast 0x2177c00
parallel_matrix_op.c: 0x2177c00: v2i64,ch = load<LD16[%uglygep4243](align=1)(tbaa=<0x1e46718>)> 0x206d9c0, 0x217d390, undef:i64
parallel_matrix_op.c: 0x217d390: i64 = add 0x21970d0, 0x2196fa0
parallel_matrix_op.c: 0x21970d0: i64,ch = CopyFromReg 0x206d9c0, Register:i64 %vreg32
parallel_matrix_op.c: 0x21a23b0: i64 = Register %vreg32
parallel_matrix_op.c: 0x2196fa0: i64,ch = CopyFromReg 0x206d9c0, Register:i64 %vreg37
parallel_matrix_op.c: 0x219a080: i64 = Register %vreg37
parallel_matrix_op.c: 0x217c120: i64 = undef
parallel_matrix_op.c: 0x21a6560: i8 = Constant<4>
parallel_matrix_op.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	ssse3