Implementation notes: amd64, latour, crypto_core/rainbowcalsecret363232

Computer: latour
Architecture: amd64
CPU ID: GenuineIntel-000006fb-bfebfbff
SUPERCOP version: 20201130
Operation: crypto_core
Primitive: rainbowcalsecret363232

Time	Object size	Test size	Implementation	Compiler	Benchmark date	SUPERCOP version
6457941	48795 8 0	60260 744 832	`ssse3`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200907	20200906
6639705	50406 8 0	63892 744 832	`ssse3`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200907	20200906
6679053	64822 8 0	77072 800 760	`ssse3`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200907	20200906
6679134	50094 8 0	61868 744 832	`ssse3`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200907	20200906
7060428	55862 8 0	67160 800 760	`ssse3`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200907	20200906
7085664	55862 8 0	67160 800 760	`ssse3`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200907	20200906
7141059	48188 8 0	58726 792 760	`ssse3`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200907	20200906
15606855	21422 0 0	32158 784 760	`amd64`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200907	20200906
15839244	38330 0 0	50872 792 760	`amd64`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200907	20200906
15863985	37610 0 0	50024 792 760	`amd64`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200907	20200906
15869871	37238 0 0	48848 792 760	`amd64`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200907	20200906
15870285	37238 0 0	48848 792 760	`amd64`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200907	20200906
16454430	37658 0 0	49364 736 832	`amd64`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200907	20200906
16606467	39256 0 0	52732 736 832	`amd64`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200907	20200906
17875269	24739 8 0	35431 720 800	`ssse3`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200907	20200906
18183231	38247 0 0	49644 736 832	`amd64`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200907	20200906
24868629	19750 0 0	30526 784 760	`ref`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200907	20200906
24976638	40799 0 0	52744 792 760	`ref`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200907	20200906
24985719	39823 0 0	50832 792 760	`ref`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200907	20200906
24990003	39823 0 0	50832 792 760	`ref`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200907	20200906
24998274	40079 0 0	51896 792 760	`ref`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20200907	20200906
28079280	10917 0 0	21495 712 800	`amd64`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200907	20200906
28391112	22527 0 0	36028 736 832	`ref`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200907	20200906
29630727	20858 0 0	32596 736 832	`ref`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200907	20200906
31225653	21079 0 0	32540 736 832	`ref`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200907	20200906
51938469	9914 0 0	20479 712 800	`ref`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20200907	20200906

Compiler output

Implementation: avx2
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

blas_comm.c: In file included from blas_comm.c:6:
blas_comm.c: In file included from ./blas.h:25:
blas_comm.c: ./blas_avx2.h:88:17: error: always_inline function '_mm256_loadu_si256' requires target feature 'xsave', but would be inlined into function 'gf256v_add_avx2' that is compiled without support for 'xsave'
blas_comm.c: __m256i inp = _mm256_loadu_si256( (__m256i*) (a+i*32) );
blas_comm.c: ^
blas_comm.c: ./blas_avx2.h:89:17: error: always_inline function '_mm256_loadu_si256' requires target feature 'xsave', but would be inlined into function 'gf256v_add_avx2' that is compiled without support for 'xsave'
blas_comm.c: __m256i out = _mm256_loadu_si256( (__m256i*) (accu_b+i*32) );
blas_comm.c: ^
blas_comm.c: ./blas_avx2.h:91:3: error: always_inline function '_mm256_storeu_si256' requires target feature 'xsave', but would be inlined into function 'gf256v_add_avx2' that is compiled without support for 'xsave'
blas_comm.c: _mm256_storeu_si256( (__m256i*) (accu_b+i*32) , out );
blas_comm.c: ^
blas_comm.c: fatal error: error in backend: Do not know how to split this operator's operand!
blas_comm.c:
blas_comm.c: clang: error: clang frontend command failed with exit code 70 (use -v to see invocation)
blas_comm.c: clang version 3.8.0-2ubuntu4 (tags/RELEASE_380/final)
blas_comm.c: Target: x86_64-pc-linux-gnu
blas_comm.c: Thread model: posix
blas_comm.c: InstalledDir: /usr/bin
blas_comm.c: clang: note: diagnostic msg: PLEASE submit a bug report to http://llvm.org/bugs/ and include the crash backtrace, preprocessed source, and associated run script.
blas_comm.c: clang: note: diagnostic msg:
blas_comm.c: ********************
blas_comm.c:
blas_comm.c: PLEASE ATTACH THE FOLLOWING FILES TO THE BUG REPORT:
blas_comm.c: Preprocessed source(s) and associated run script(s) are located at:
blas_comm.c: clang: note: diagnostic msg: /tmp/blas_comm-6a8d97.c
blas_comm.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx2

Compiler output

Implementation: avx2
Security model: constbranchindex
Compiler: clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx2

Compiler output

Implementation: avx2
Security model: constbranchindex
Compiler: clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx2

Compiler output

Implementation: avx2
Security model: constbranchindex
Compiler: clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx2

Compiler output

Implementation: avx2
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

blas_comm.c: In file included from blas_comm.c:6:
blas_comm.c: In file included from ./blas.h:25:
blas_comm.c: ./blas_avx2.h:88:17: error: always_inline function '_mm256_loadu_si256' requires target feature 'sse4.2', but would be inlined into function 'gf256v_add_avx2' that is compiled without support for 'sse4.2'
blas_comm.c: __m256i inp = _mm256_loadu_si256( (__m256i*) (a+i*32) );
blas_comm.c: ^
blas_comm.c: ./blas_avx2.h:89:17: error: always_inline function '_mm256_loadu_si256' requires target feature 'sse4.2', but would be inlined into function 'gf256v_add_avx2' that is compiled without support for 'sse4.2'
blas_comm.c: __m256i out = _mm256_loadu_si256( (__m256i*) (accu_b+i*32) );
blas_comm.c: ^
blas_comm.c: ./blas_avx2.h:91:3: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'gf256v_add_avx2' that is compiled without support for 'sse4.2'
blas_comm.c: _mm256_storeu_si256( (__m256i*) (accu_b+i*32) , out );
blas_comm.c: ^
blas_comm.c: fatal error: error in backend: Do not know how to split this operator's operand!
blas_comm.c:
blas_comm.c: clang: error: clang frontend command failed with exit code 70 (use -v to see invocation)
blas_comm.c: clang version 3.8.0-2ubuntu4 (tags/RELEASE_380/final)
blas_comm.c: Target: x86_64-pc-linux-gnu
blas_comm.c: Thread model: posix
blas_comm.c: InstalledDir: /usr/bin
blas_comm.c: clang: note: diagnostic msg: PLEASE submit a bug report to http://llvm.org/bugs/ and include the crash backtrace, preprocessed source, and associated run script.
blas_comm.c: clang: note: diagnostic msg:
blas_comm.c: ********************
blas_comm.c:
blas_comm.c: PLEASE ATTACH THE FOLLOWING FILES TO THE BUG REPORT:
blas_comm.c: Preprocessed source(s) and associated run script(s) are located at:
blas_comm.c: clang: note: diagnostic msg: /tmp/blas_comm-9bbb89.c
blas_comm.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx2

Compiler output

Implementation: avx2
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE

blas_comm.c: In file included from blas_avx2.h:15:0,
blas_comm.c: from blas.h:25,
blas_comm.c: from blas_comm.c:6:
blas_comm.c: gf16_avx2.h: In function 'linear_transform_8x8_256b':
blas_comm.c: gf16_avx2.h:28:1: warning: AVX vector return without AVX enabled changes the ABI [-Wpsabi]
blas_comm.c: {
blas_comm.c: ^
blas_comm.c: In file included from /usr/lib/gcc/x86_64-linux-gnu/5/include/immintrin.h:41:0,
blas_comm.c: from blas_avx2.h:10,
blas_comm.c: from blas.h:25,
blas_comm.c: from blas_comm.c:6:
blas_comm.c: blas_avx2.h: In function 'gf256v_add_avx2':
blas_comm.c: /usr/lib/gcc/x86_64-linux-gnu/5/include/avxintrin.h:900:1: error: inlining failed in call to always_inline '_mm256_storeu_si256': target specific option mismatch
blas_comm.c: _mm256_storeu_si256 (__m256i *__P, __m256i __A)
blas_comm.c: ^
blas_comm.c: In file included from blas.h:25:0,
blas_comm.c: from blas_comm.c:6:
blas_comm.c: blas_avx2.h:91:3: error: called from here
blas_comm.c: _mm256_storeu_si256( (__m256i*) (accu_b+i*32) , out );
blas_comm.c: ^
blas_comm.c: In file included from /usr/lib/gcc/x86_64-linux-gnu/5/include/immintrin.h:41:0,
blas_comm.c: from blas_avx2.h:10,
blas_comm.c: from blas.h:25,
blas_comm.c: from blas_comm.c:6:
blas_comm.c: /usr/lib/gcc/x86_64-linux-gnu/5/include/avxintrin.h:894:1: error: inlining failed in call to always_inline '_mm256_loadu_si256': target specific option mismatch
blas_comm.c: ...

Number of similar (compiler,implementation) pairs: 4, namely:

Compiler	Implementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE	avx2
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE	avx2
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE	avx2
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE	avx2

Compiler output

Implementation: ssse3
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

parallel_matrix_op.c: In file included from parallel_matrix_op.c:8:
parallel_matrix_op.c: In file included from ./blas.h:25:
parallel_matrix_op.c: In file included from ./blas_sse.h:16:
parallel_matrix_op.c: ./gf16_sse.h:34:9: error: always_inline function '_mm_shuffle_epi8' requires target feature 'ssse3', but would be inlined into function 'linear_transform_8x8_128b' that is compiled without support for 'ssse3'
parallel_matrix_op.c: return _mm_shuffle_epi8(tab_l,v&mask_f)^_mm_shuffle_epi8(tab_h,_mm_srli_epi16(v,4)&mask_f);
parallel_matrix_op.c: ^
parallel_matrix_op.c: ./gf16_sse.h:34:42: error: always_inline function '_mm_shuffle_epi8' requires target feature 'ssse3', but would be inlined into function 'linear_transform_8x8_128b' that is compiled without support for 'ssse3'
parallel_matrix_op.c: return _mm_shuffle_epi8(tab_l,v&mask_f)^_mm_shuffle_epi8(tab_h,_mm_srli_epi16(v,4)&mask_f);
parallel_matrix_op.c: ^
parallel_matrix_op.c: fatal error: error in backend: Cannot select: 0x28f3ab0: v16i8 = X86ISD::PSHUFB 0x28f3130, 0x28d3960
parallel_matrix_op.c: 0x28f3130: v16i8,ch = CopyFromReg 0x27ca9b0, Register:v16i8 %vreg35
parallel_matrix_op.c: 0x28f50f0: v16i8 = Register %vreg35
parallel_matrix_op.c: 0x28d3960: v16i8 = bitcast 0x28d4840
parallel_matrix_op.c: 0x28d4840: v2i64 = and 0x28ce6c0, 0x28ce7f0
parallel_matrix_op.c: 0x28ce6c0: v2i64 = bitcast 0x28f7370
parallel_matrix_op.c: 0x28f7370: v8i16 = X86ISD::VSRLI 0x2919e20, Constant:i8<4>
parallel_matrix_op.c: 0x2919e20: v8i16 = bitcast 0x28f3f70
parallel_matrix_op.c: 0x28f3f70: v2i64,ch = load<LD16[%uglygep4243](align=1)(tbaa=<0x25a3718>)> 0x27ca9b0, 0x28daec0, undef:i64
parallel_matrix_op.c: 0x28daec0: i64 = add 0x29025f0, 0x29024c0
parallel_matrix_op.c: 0x29025f0: i64,ch = CopyFromReg 0x27ca9b0, Register:i64 %vreg32
parallel_matrix_op.c: 0x2916db0: i64 = Register %vreg32
parallel_matrix_op.c: 0x29024c0: i64,ch = CopyFromReg 0x27ca9b0, Register:i64 %vreg37
parallel_matrix_op.c: 0x28d4f60: i64 = Register %vreg37
parallel_matrix_op.c: 0x28d9c50: i64 = undef
parallel_matrix_op.c: 0x28d3070: i8 = Constant<4>
parallel_matrix_op.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	ssse3