Implementation notes: amd64, kizomba, crypto_core/multsntrup953

Computer: kizomba
Architecture: amd64
CPU ID: GenuineIntel-000906e9-bfebfbff
SUPERCOP version: 20211108
Operation: crypto_core
Primitive: multsntrup953
TimeObject sizeTest sizeImplementationCompilerBenchmark dateSUPERCOP version
1949223720 0 038305 776 776avx800clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021060420210604
1950223720 0 038209 776 776avx800clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021060420210604
1951423832 0 038321 776 776avxclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021060420210604
1951423864 0 038449 776 776avxclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021060420210604
1952323720 0 038209 776 776avx800clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021060420210604
1956123832 0 038321 776 776avxclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021060420210604
2023421477 0 037230 776 832avx800gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021060420210604
2204020458 0 031559 768 760avx800clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021060420210604
2207320421 0 031511 768 760avxclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021060420210604
2238923269 0 039022 776 832avxgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021060420210604
2713720559 0 032893 768 832avx800gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021060420210604
2896222421 0 034749 768 832avxgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021060420210604
2913720534 0 032965 768 832avx800gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021060420210604
3142522326 0 034757 768 832avxgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021060420210604
3303921484 0 032909 760 800avx800gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021060420210604
3306621502 0 032917 760 800avxgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021060420210604
3132402998 0 017393 776 776refclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3152722198 0 016561 776 776refclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3154162198 0 016561 776 776refclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3243754129 0 019566 776 832refgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
12102042355 0 016017 776 760refclang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
1642795596 0 011303 768 760refclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
1894883595 0 012549 768 832refgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
2195561527 0 011501 760 800refgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
2318738667 0 012693 768 832refgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529

Compiler output

Implementation: avx
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
mult1024.c: mult1024.c:307:7: error: always_inline function '_mm256_set1_epi16' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup953_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: x = const_x16(0);
mult1024.c: ^
mult1024.c: mult1024.c:10:19: note: expanded from macro 'const_x16'
mult1024.c: #define const_x16 _mm256_set1_epi16
mult1024.c: ^
mult1024.c: mult1024.c:308:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup953_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: for (i = p&~15;i < 1024;i += 16) store_x16(&f[i],x);
mult1024.c: ^
mult1024.c: mult1024.c:9:24: note: expanded from macro 'store_x16'
mult1024.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1024.c: ^
mult1024.c: mult1024.c:309:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup953_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: for (i = p&~15;i < 1024;i += 16) store_x16(&g[i],x);
mult1024.c: ^
mult1024.c: mult1024.c:9:24: note: expanded from macro 'store_x16'
mult1024.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1024.c: ^
mult1024.c: mult1024.c:314:9: error: always_inline function '_mm256_loadu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup953_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: x = load_x16(&f[i]);
mult1024.c: ^
mult1024.c: mult1024.c:8:21: note: expanded from macro 'load_x16'
mult1024.c: #define load_x16(p) _mm256_loadu_si256((int16x16 *) (p))
mult1024.c: ^
mult1024.c: mult1024.c:316:5: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup953_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE avx

Compiler output

Implementation: avx800
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
mult1024.c: mult1024.c:307:7: error: always_inline function '_mm256_set1_epi16' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup953_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: x = const_x16(0);
mult1024.c: ^
mult1024.c: mult1024.c:10:19: note: expanded from macro 'const_x16'
mult1024.c: #define const_x16 _mm256_set1_epi16
mult1024.c: ^
mult1024.c: mult1024.c:308:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup953_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: for (i = p&~15;i < 1024;i += 16) store_x16(&f[i],x);
mult1024.c: ^
mult1024.c: mult1024.c:9:24: note: expanded from macro 'store_x16'
mult1024.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1024.c: ^
mult1024.c: mult1024.c:309:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup953_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: for (i = p&~15;i < 1024;i += 16) store_x16(&g[i],x);
mult1024.c: ^
mult1024.c: mult1024.c:9:24: note: expanded from macro 'store_x16'
mult1024.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1024.c: ^
mult1024.c: mult1024.c:314:9: error: always_inline function '_mm256_loadu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup953_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: x = load_x16(&f[i]);
mult1024.c: ^
mult1024.c: mult1024.c:8:21: note: expanded from macro 'load_x16'
mult1024.c: #define load_x16(p) _mm256_loadu_si256((int16x16 *) (p))
mult1024.c: ^
mult1024.c: mult1024.c:316:5: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup953_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE avx800