Test results for amd64, jasper3, crypto_kem/bikel3

[Page version: 20241023 11:45:11]

Compiler output

aes.c: aes.c:9:4: error: "This code requries support for AES_NI and SSSE3"
aes.c: #  error "This code requries support for AES_NI and SSSE3"
aes.c:    ^
aes.c: 1 error generated.

Compiler output

decode.c: In file included from decode.c:39:
decode.c: ./gf2x.h:22:10: error: always_inline function '_mm256_loadu_si256' requires target feature 'avx', but would be inlined into function 'gf2x_mod_add' that is compiled without support for 'avx'
decode.c:     va = LOAD(&a_qwords[i]);
decode.c:          ^
decode.c: ./x86_64_intrinsic.h:30:27: note: expanded from macro 'LOAD'
decode.c: #  define LOAD(mem)       _mm256_loadu_si256((const void *)(mem))
decode.c:                           ^
decode.c: In file included from decode.c:39:
decode.c: ./gf2x.h:22:10: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
decode.c: ./x86_64_intrinsic.h:30:27: note: expanded from macro 'LOAD'
decode.c: #  define LOAD(mem)       _mm256_loadu_si256((const void *)(mem))
decode.c:                           ^
decode.c: In file included from decode.c:39:
decode.c: ./gf2x.h:23:10: error: always_inline function '_mm256_loadu_si256' requires target feature 'avx', but would be inlined into function 'gf2x_mod_add' that is compiled without support for 'avx'
decode.c:     vb = LOAD(&b_qwords[i]);
decode.c:          ^
decode.c: ./x86_64_intrinsic.h:30:27: note: expanded from macro 'LOAD'
decode.c: #  define LOAD(mem)       _mm256_loadu_si256((const void *)(mem))
decode.c:                           ^
decode.c: In file included from decode.c:39:
decode.c: ./gf2x.h:23:10: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
decode.c: ./x86_64_intrinsic.h:30:27: note: expanded from macro 'LOAD'
decode.c: #  define LOAD(mem)       _mm256_loadu_si256((const void *)(mem))
decode.c:                           ^
decode.c: In file included from decode.c:39:
decode.c: ...

Compiler output

decode.c: In file included from decode.c:39:
decode.c: gf2x.h: In function 'gf2x_mod_add':
decode.c: gf2x.h:22:8: warning: AVX vector return without AVX enabled changes the ABI [-Wpsabi]
decode.c:    22 |     va = LOAD(&a_qwords[i]);
decode.c: In file included from /usr/lib/gcc/x86_64-linux-gnu/10/include/immintrin.h:51,
decode.c:                  from x86_64_intrinsic.h:20,
decode.c:                  from defs.h:103,
decode.c:                  from bike_defs.h:10,
decode.c:                  from types.h:13,
decode.c:                  from decode.h:10,
decode.c:                  from decode.c:37:
decode.c: /usr/lib/gcc/x86_64-linux-gnu/10/include/avxintrin.h:926:1: error: inlining failed in call to 'always_inline' '_mm256_storeu_si256': target specific option mismatch
decode.c:   926 | _mm256_storeu_si256 (__m256i_u *__P, __m256i __A)
decode.c:       | ^~~~~~~~~~~~~~~~~~~
decode.c: In file included from defs.h:103,
decode.c:                  from bike_defs.h:10,
decode.c:                  from types.h:13,
decode.c:                  from decode.h:10,
decode.c:                  from decode.c:37:
decode.c: x86_64_intrinsic.h:31:27: note: called from here
decode.c:    31 | #  define STORE(mem, reg) _mm256_storeu_si256((void *)(mem), (reg))
decode.c:       |                           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
decode.c: gf2x.h:25:5: note: in expansion of macro 'STORE'
decode.c:    25 |     STORE(&c_qwords[i], va ^ vb);
decode.c:       |     ^~~~~
decode.c: ...

Compiler output

decode.c: In file included from decode.c:39:
decode.c: ./gf2x.h:22:10: error: always_inline function '_mm512_loadu_si512' requires target feature 'avx512f', but would be inlined into function 'gf2x_mod_add' that is compiled without support for 'avx512f'
decode.c:     va = LOAD(&a_qwords[i]);
decode.c:          ^
decode.c: ./x86_64_intrinsic.h:40:27: note: expanded from macro 'LOAD'
decode.c: #  define LOAD(mem)       _mm512_loadu_si512((mem))
decode.c:                           ^
decode.c: In file included from decode.c:39:
decode.c: ./gf2x.h:22:10: error: AVX vector return of type '__m512i' (vector of 8 'long long' values) without 'avx512f' enabled changes the ABI
decode.c: ./x86_64_intrinsic.h:40:27: note: expanded from macro 'LOAD'
decode.c: #  define LOAD(mem)       _mm512_loadu_si512((mem))
decode.c:                           ^
decode.c: In file included from decode.c:39:
decode.c: ./gf2x.h:23:10: error: always_inline function '_mm512_loadu_si512' requires target feature 'avx512f', but would be inlined into function 'gf2x_mod_add' that is compiled without support for 'avx512f'
decode.c:     vb = LOAD(&b_qwords[i]);
decode.c:          ^
decode.c: ./x86_64_intrinsic.h:40:27: note: expanded from macro 'LOAD'
decode.c: #  define LOAD(mem)       _mm512_loadu_si512((mem))
decode.c:                           ^
decode.c: In file included from decode.c:39:
decode.c: ./gf2x.h:23:10: error: AVX vector return of type '__m512i' (vector of 8 'long long' values) without 'avx512f' enabled changes the ABI
decode.c: ./x86_64_intrinsic.h:40:27: note: expanded from macro 'LOAD'
decode.c: #  define LOAD(mem)       _mm512_loadu_si512((mem))
decode.c:                           ^
decode.c: In file included from decode.c:39:
decode.c: ...

Compiler output

decode.c: In file included from decode.c:39:
decode.c: gf2x.h: In function 'gf2x_mod_add':
decode.c: gf2x.h:22:8: warning: AVX512F vector return without AVX512F enabled changes the ABI [-Wpsabi]
decode.c:    22 |     va = LOAD(&a_qwords[i]);
decode.c: In file included from /usr/lib/gcc/x86_64-linux-gnu/10/include/immintrin.h:55,
decode.c:                  from x86_64_intrinsic.h:20,
decode.c:                  from defs.h:103,
decode.c:                  from bike_defs.h:10,
decode.c:                  from types.h:13,
decode.c:                  from decode.h:10,
decode.c:                  from decode.c:37:
decode.c: /usr/lib/gcc/x86_64-linux-gnu/10/include/avx512fintrin.h:6429:1: error: inlining failed in call to 'always_inline' '_mm512_storeu_si512': target specific option mismatch
decode.c:  6429 | _mm512_storeu_si512 (void *__P, __m512i __A)
decode.c:       | ^~~~~~~~~~~~~~~~~~~
decode.c: In file included from defs.h:103,
decode.c:                  from bike_defs.h:10,
decode.c:                  from types.h:13,
decode.c:                  from decode.h:10,
decode.c:                  from decode.c:37:
decode.c: x86_64_intrinsic.h:41:27: note: called from here
decode.c:    41 | #  define STORE(mem, reg) _mm512_storeu_si512((mem), (reg))
decode.c:       |                           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
decode.c: gf2x.h:25:5: note: in expansion of macro 'STORE'
decode.c:    25 |     STORE(&c_qwords[i], va ^ vb);
decode.c:       |     ^~~~~
decode.c: ...

Compiler output

decode.c: decode.c:303:20: error: '__builtin_ia32_vec_ext_v4di' needs target feature avx
decode.c:         printf("%.16llX", _mm256_extract_epi64(v, 0));
decode.c:                           ^
decode.c: /usr/lib/llvm-11/lib/clang/11.0.1/include/avxintrin.h:2024:14: note: expanded from macro '_mm256_extract_epi64'
decode.c:   (long long)__builtin_ia32_vec_ext_v4di((__v4di)(__m256i)(X), (int)(N))
decode.c:              ^
decode.c: decode.c:304:21: error: '__builtin_ia32_vec_ext_v4di' needs target feature avx
decode.c:         printf(" %.16llX", _mm256_extract_epi64(v, 1));
decode.c:                            ^
decode.c: /usr/lib/llvm-11/lib/clang/11.0.1/include/avxintrin.h:2024:14: note: expanded from macro '_mm256_extract_epi64'
decode.c:   (long long)__builtin_ia32_vec_ext_v4di((__v4di)(__m256i)(X), (int)(N))
decode.c:              ^
decode.c: decode.c:305:21: error: '__builtin_ia32_vec_ext_v4di' needs target feature avx
decode.c:         printf(" %.16llX", _mm256_extract_epi64(v, 2));
decode.c:                            ^
decode.c: /usr/lib/llvm-11/lib/clang/11.0.1/include/avxintrin.h:2024:14: note: expanded from macro '_mm256_extract_epi64'
decode.c:   (long long)__builtin_ia32_vec_ext_v4di((__v4di)(__m256i)(X), (int)(N))
decode.c:              ^
decode.c: decode.c:306:23: error: '__builtin_ia32_vec_ext_v4di' needs target feature avx
decode.c:         printf(" %.16llX\n", _mm256_extract_epi64(v, 3));
decode.c:                              ^
decode.c: /usr/lib/llvm-11/lib/clang/11.0.1/include/avxintrin.h:2024:14: note: expanded from macro '_mm256_extract_epi64'
decode.c:   (long long)__builtin_ia32_vec_ext_v4di((__v4di)(__m256i)(X), (int)(N))
decode.c:              ^
decode.c: 4 errors generated.

Compiler output

decode.c: decode.c: In function 'dump1':
decode.c: decode.c:301:6: note: the ABI for passing parameters with 32-byte alignment has changed in GCC 4.6
decode.c:   301 | void dump1(__m256i v)
decode.c:       |      ^~~~~
decode.c: decode.c: In function 'find_err1':
decode.c: decode.c:351:11: warning: AVX vector return without AVX enabled changes the ABI [-Wpsabi]
decode.c:   351 |    buf[j] = LOAD(&syndrome->qw[4 * j]);
decode.c: In file included from /usr/lib/gcc/x86_64-linux-gnu/10/include/immintrin.h:51,
decode.c:                  from x86_64_intrinsic.h:20,
decode.c:                  from defs.h:106,
decode.c:                  from bike_defs.h:10,
decode.c:                  from types.h:15,
decode.c:                  from decode.h:17,
decode.c:                  from decode.c:39:
decode.c: gf2x.h: In function 'gf2x_mod_add':
decode.c: /usr/lib/gcc/x86_64-linux-gnu/10/include/avxintrin.h:926:1: error: inlining failed in call to 'always_inline' '_mm256_storeu_si256': target specific option mismatch
decode.c:   926 | _mm256_storeu_si256 (__m256i_u *__P, __m256i __A)
decode.c:       | ^~~~~~~~~~~~~~~~~~~
decode.c: In file included from defs.h:106,
decode.c:                  from bike_defs.h:10,
decode.c:                  from types.h:15,
decode.c:                  from decode.h:17,
decode.c:                  from decode.c:39:
decode.c: x86_64_intrinsic.h:31:27: note: called from here
decode.c:    31 | #  define STORE(mem, reg) _mm256_storeu_si256((void *)(mem), (reg))
decode.c: ...

Namespace violations

aes.o aes256_enc T
aes.o aes256_key_expansion T
aes_ctr_prf.o aes_ctr_prf T
aes_ctr_prf.o init_aes_ctr_prf_state T
decode.o compute_syndrome T
decode.o decode T
error.o bike_errno B
gf2x_inv.o gf2x_mod_inv T
gf2x_ksqr_portable.o k_squaring T
gf2x_mul.o gf2x_mod_mul T
gf2x_mul.o gf2x_mod_sqr_in_place T
gf2x_mul_pclmul.o gf2x_mul_base T
gf2x_mul_pclmul.o gf2x_sqr T
rotate_portable.o rotate_right T
sampling.o generate_error_vector T
sampling.o generate_indices_mod_z T
sampling.o generate_sparse_rep T
sampling.o get_seeds T
sampling.o sample_uniform_r_bits T
sampling.o sample_uniform_r_bits_with_fixed_prf_context T
sampling_portable.o secure_set_bits T
sha.o sha T
utilities.o r_bits_vector_weight T

Namespace violations

aes.o aes256_enc T
aes.o aes256_key_expansion T
aes_ctr_prf.o aes_ctr_prf T
aes_ctr_prf.o init_aes_ctr_prf_state T
decode.o compute_syndrome T
decode.o decode T
error.o bike_errno B
gf2x_inv.o gf2x_mod_inv T
gf2x_ksqr_portable.o k_squaring T
gf2x_mul.o gf2x_mod_mul T
gf2x_mul.o gf2x_mod_sqr_in_place T
gf2x_mul_portable.o gf2x_mul_base T
gf2x_mul_portable.o gf2x_sqr T
rotate_portable.o rotate_right T
sampling.o generate_error_vector T
sampling.o generate_indices_mod_z T
sampling.o generate_sparse_rep T
sampling.o get_seeds T
sampling.o sample_uniform_r_bits T
sampling.o sample_uniform_r_bits_with_fixed_prf_context T
sampling_portable.o secure_set_bits T
sha.o sha T
utilities.o r_bits_vector_weight T

Namespace violations

aes_ctr_prf.o aes_ctr_prf T
aes_ctr_prf.o init_aes_ctr_prf_state T
decode.o compute_syndrome T
decode.o decode T
error.o bike_errno B
gf2x_inv.o gf2x_mod_inv T
gf2x_ksqr_portable.o k_squaring T
gf2x_mul.o gf2x_mod_mul T
gf2x_mul.o gf2x_mod_sqr_in_place T
gf2x_mul_portable.o gf2x_mul_base T
gf2x_mul_portable.o gf2x_sqr T
rotate_portable.o rotate_right T
sampling.o generate_error_vector T
sampling.o generate_indices_mod_z T
sampling.o generate_sparse_rep T
sampling.o get_seeds T
sampling.o sample_uniform_r_bits T
sampling.o sample_uniform_r_bits_with_fixed_prf_context T
sampling_portable.o secure_set_bits T
utilities.o r_bits_vector_weight T