Implementation notes: amd64, hiphop, crypto_core/multsntrup1277

Computer: hiphop
Architecture: amd64
CPU ID: GenuineIntel-000306c3-bfebfbff
SUPERCOP version: 20211108
Operation: crypto_core
Primitive: multsntrup1277
TimeObject sizeTest sizeImplementationCompilerBenchmark dateSUPERCOP version
3047121977 0 037633 804 976avx800gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
3058921977 0 037633 804 976avxgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
3257922552 0 037268 804 944avxclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3265122408 0 037124 804 944avx800clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3265822520 0 037236 804 944avxclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3272522520 0 037236 804 944avxclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3274922408 0 037124 804 944avx800clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3285222408 0 037124 804 944avx800clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3409521820 0 034176 796 976avxgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
3422321764 0 034128 796 976avx800gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
3574021384 0 032274 796 912avxclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3627721421 0 032322 796 912avx800clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3670121841 0 034288 796 976avx800gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
3680021841 0 034288 796 976avxgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
4031322648 0 034128 788 944avxgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
4047322637 0 034120 788 944avx800gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
5444102274 0 017084 804 944refclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
5488492274 0 017084 804 944refclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
5654303410 0 018252 804 944refclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
6036954626 0 020265 804 976refgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
21093702703 0 016796 804 912refclang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
2568683620 0 011602 796 912refclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3197936596 0 012920 796 976refgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
3774284669 0 013072 796 976refgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
3888918527 0 011944 788 944refgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529

Compiler output

Implementation: avx
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
mult1280.c: mult1280.c:425:7: error: always_inline function '_mm256_set1_epi16' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: x = const_x16(0);
mult1280.c: ^
mult1280.c: mult1280.c:10:19: note: expanded from macro 'const_x16'
mult1280.c: #define const_x16 _mm256_set1_epi16
mult1280.c: ^
mult1280.c: mult1280.c:426:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: for (i = p&~15;i < 1280;i += 16) store_x16(&f[i],x);
mult1280.c: ^
mult1280.c: mult1280.c:9:24: note: expanded from macro 'store_x16'
mult1280.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1280.c: ^
mult1280.c: mult1280.c:427:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: for (i = p&~15;i < 1280;i += 16) store_x16(&g[i],x);
mult1280.c: ^
mult1280.c: mult1280.c:9:24: note: expanded from macro 'store_x16'
mult1280.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1280.c: ^
mult1280.c: mult1280.c:432:9: error: always_inline function '_mm256_loadu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: x = load_x16(&f[i]);
mult1280.c: ^
mult1280.c: mult1280.c:8:21: note: expanded from macro 'load_x16'
mult1280.c: #define load_x16(p) _mm256_loadu_si256((int16x16 *) (p))
mult1280.c: ^
mult1280.c: mult1280.c:434:5: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE avx

Compiler output

Implementation: avx800
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
mult1280.c: mult1280.c:425:7: error: always_inline function '_mm256_set1_epi16' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: x = const_x16(0);
mult1280.c: ^
mult1280.c: mult1280.c:10:19: note: expanded from macro 'const_x16'
mult1280.c: #define const_x16 _mm256_set1_epi16
mult1280.c: ^
mult1280.c: mult1280.c:426:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: for (i = p&~15;i < 1280;i += 16) store_x16(&f[i],x);
mult1280.c: ^
mult1280.c: mult1280.c:9:24: note: expanded from macro 'store_x16'
mult1280.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1280.c: ^
mult1280.c: mult1280.c:427:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: for (i = p&~15;i < 1280;i += 16) store_x16(&g[i],x);
mult1280.c: ^
mult1280.c: mult1280.c:9:24: note: expanded from macro 'store_x16'
mult1280.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1280.c: ^
mult1280.c: mult1280.c:432:9: error: always_inline function '_mm256_loadu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: x = load_x16(&f[i]);
mult1280.c: ^
mult1280.c: mult1280.c:8:21: note: expanded from macro 'load_x16'
mult1280.c: #define load_x16(p) _mm256_loadu_si256((int16x16 *) (p))
mult1280.c: ^
mult1280.c: mult1280.c:434:5: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE avx800