Implementation notes: amd64, hiphop, crypto_aead/led80n6t4silcv3

Computer: hiphop
Microarchitecture: amd64; Haswell+AES (306c3)
Architecture: amd64
CPU ID: GenuineIntel-000306c3-bfebfbff
SUPERCOP version: 20231107
Operation: crypto_aead
Primitive: led80n6t4silcv3
TimeObject sizeTest sizeImplementationCompilerBenchmark dateSUPERCOP version
8111346634 0 3221972 812 1120T:vpermgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023110720231107
8128367454 0 3224812 812 1120T:vpermgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023110720231107
15076276054 0 3220987 804 1120T:vpermgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023110720231107
15206995727 0 3219407 788 1088T:vpermgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023110720231107
383851878190 4 425296 864 1056T:refclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023053020230530
385820996387 4 422464 864 1024T:refclang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023053020230530
387052608547 4 425928 864 1056T:refclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023053020230530
469715457200 4 424487 816 1120T:refgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023110720231107
773658574307 4 419535 816 1120T:refgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023110720231107
790702603797 4 418458 856 1088T:refclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023053020230530
816022704241 4 418224 864 1024T:refclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023053020230530
838750414236 4 418972 800 1120T:refgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023110720231107
2611143813647 4 417250 792 1088T:refgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023110720231107

Compiler output

Implementation: T:vperm
Security model: timingleaks
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
silc.c: silc.c:174:34: warning: implicit conversion from 'int' to 'char' changes value from 128 to -128 [-Wconstant-conversion]
silc.c: state = XORDQW(tmpState, SHR(state, 8));
silc.c: ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~
silc.c: ./common.h:30:126: note: expanded from macro 'SHR'
silc.c: #define SHR(x,n) _mm_shuffle_epi8((x), _mm_set_epi8(127+(n), 126+(n), 125+(n), 124+(n), 123+(n), 122+(n), 121+(n), 120+(n), 119+(n), 118+(n), 117+(n), 116+(n), 115+(n), 114+(n), 113+(n), 112+(n))) // shift to the right
silc.c: ~~~~~~~~~~~~ ^
silc.c: ./common.h:18:43: note: expanded from macro 'XORDQW'
silc.c: #define XORDQW(x, y) _mm_xor_si128((x), (y))
silc.c: ^
silc.c: silc.c:174:34: warning: implicit conversion from 'int' to 'char' changes value from 129 to -127 [-Wconstant-conversion]
silc.c: state = XORDQW(tmpState, SHR(state, 8));
silc.c: ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~
silc.c: ./common.h:30:117: note: expanded from macro 'SHR'
silc.c: #define SHR(x,n) _mm_shuffle_epi8((x), _mm_set_epi8(127+(n), 126+(n), 125+(n), 124+(n), 123+(n), 122+(n), 121+(n), 120+(n), 119+(n), 118+(n), 117+(n), 116+(n), 115+(n), 114+(n), 113+(n), 112+(n))) // shift to the right
silc.c: ~~~~~~~~~~~~ ^
silc.c: ./common.h:18:43: note: expanded from macro 'XORDQW'
silc.c: #define XORDQW(x, y) _mm_xor_si128((x), (y))
silc.c: ^
silc.c: silc.c:174:34: warning: implicit conversion from 'int' to 'char' changes value from 130 to -126 [-Wconstant-conversion]
silc.c: state = XORDQW(tmpState, SHR(state, 8));
silc.c: ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~
silc.c: ./common.h:30:108: note: expanded from macro 'SHR'
silc.c: #define SHR(x,n) _mm_shuffle_epi8((x), _mm_set_epi8(127+(n), 126+(n), 125+(n), 124+(n), 123+(n), 122+(n), 121+(n), 120+(n), 119+(n), 118+(n), 117+(n), 116+(n), 115+(n), 114+(n), 113+(n), 112+(n))) // shift to the right
silc.c: ~~~~~~~~~~~~ ^
silc.c: ./common.h:18:43: note: expanded from macro 'XORDQW'
silc.c: ...

Number of similar (compiler,implementation) pairs: 4, namely:
CompilerImplementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:vperm
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:vperm
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:vperm
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:vperm

Compiler output

Implementation: T:vperm
Security model: timingleaks
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
led.c: led.c:172:16: error: always_inline function '_mm_shuffle_epi8' requires target feature 'ssse3', but would be inlined into function 'MixColumnWithSbox' that is compiled without support for 'ssse3'
led.c: dqword tmp1 = PSHUFB(LOAD(Mbox1), sum);
led.c: ^
led.c: ./common.h:42:22: note: expanded from macro 'PSHUFB'
led.c: #define PSHUFB(s, x) _mm_shuffle_epi8((s), (x)) /*return s(x)*/
led.c: ^
led.c: led.c:174:16: error: always_inline function '_mm_shuffle_epi8' requires target feature 'ssse3', but would be inlined into function 'MixColumnWithSbox' that is compiled without support for 'ssse3'
led.c: dqword tmp2 = PSHUFB(LOAD(Mbox2), sum);
led.c: ^
led.c: ./common.h:42:22: note: expanded from macro 'PSHUFB'
led.c: #define PSHUFB(s, x) _mm_shuffle_epi8((s), (x)) /*return s(x)*/
led.c: ^
led.c: led.c:181:9: error: always_inline function '_mm_shuffle_epi8' requires target feature 'ssse3', but would be inlined into function 'MixColumnWithSbox' that is compiled without support for 'ssse3'
led.c: tmp1 = PSHUFB(LOAD(Mbox3), tmp3);
led.c: ^
led.c: ./common.h:42:22: note: expanded from macro 'PSHUFB'
led.c: #define PSHUFB(s, x) _mm_shuffle_epi8((s), (x)) /*return s(x)*/
led.c: ^
led.c: led.c:182:9: error: always_inline function '_mm_shuffle_epi8' requires target feature 'ssse3', but would be inlined into function 'MixColumnWithSbox' that is compiled without support for 'ssse3'
led.c: tmp2 = PSHUFB(LOAD(Mbox4), tmp3);
led.c: ^
led.c: ./common.h:42:22: note: expanded from macro 'PSHUFB'
led.c: #define PSHUFB(s, x) _mm_shuffle_epi8((s), (x)) /*return s(x)*/
led.c: ^
led.c: led.c:190:9: error: always_inline function '_mm_shuffle_epi8' requires target feature 'ssse3', but would be inlined into function 'MixColumnWithSbox' that is compiled without support for 'ssse3'
led.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:vperm