Implementation notes: amd64, gcc67, crypto_core/inv3sntrup653

Computer: gcc67
Architecture: amd64
CPU ID: AuthenticAMD-00810f10-178bfbff
SUPERCOP version: 20210125
Operation: crypto_core
Primitive: inv3sntrup653

Time	Object size	Test size	Implementation	Compiler	Benchmark date	SUPERCOP version
134097	8617 0 0	22750 844 944	`avx`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210115	20210114
142854	11229 0 0	23883 820 944	`avx`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210115	20210114
142854	11229 0 0	23883 820 944	`avx`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210115	20210114
142857	11229 0 0	24787 820 944	`avx`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210115	20210114
160502	7611 0 0	18685 812 912	`avx`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210115	20210114
165321	7285 0 0	19341 836 944	`avx`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210115	20210114
168730	7743 0 0	19933 836 944	`avx`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210115	20210114
426652	4852 0 0	15929 820 944	`avx`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210115	20210114
3521641	5469 0 0	19664 852 944	`ref`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210115	20210114
15971750	3738 0 0	16779 820 912	`ref`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210115	20210114
16208093	4594 0 0	18163 820 944	`ref`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210115	20210114
16258716	4594 0 0	17259 820 944	`ref`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210115	20210114
16265443	4594 0 0	17259 820 944	`ref`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210115	20210114
21635525	688 0 0	11733 812 912	`ref`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210115	20210114
32998367	722 0 0	11665 820 944	`ref`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210115	20210114
34063611	818 0 0	12981 836 944	`ref`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210115	20210114
36127041	794 0 0	12813 836 944	`ref`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210115	20210114

Compiler output

Implementation: avx
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

r3_recip.c: r3_recip.c:362:11: error: always_inline function '_mm256_set_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup653_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F0[0] = _mm256_set_epi32(0,0,0,0,0,0,0,1);
r3_recip.c: ^
r3_recip.c: r3_recip.c:363:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup653_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F0[1] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:364:11: error: always_inline function '_mm256_set_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup653_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F0[2] = _mm256_set_epi32(0,0,0,0,8,0,8,0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:365:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup653_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F1[0] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:366:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup653_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F1[1] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:367:11: error: always_inline function '_mm256_set_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup653_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F1[2] = _mm256_set_epi32(0,0,0,0,8,0,8,0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:369:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup653_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: V0[0] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:370:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup653_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: V1[0] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:371:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup653_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx