Implementation notes: amd64, colossus6, crypto_core/inv3sntrup857

Computer: colossus6
Architecture: amd64
CPU ID: AuthenticAMD-00830f10-178bfbff
SUPERCOP version: 20210125
Operation: crypto_core
Primitive: inv3sntrup857

Time	Object size	Test size	Implementation	Compiler	Benchmark date	SUPERCOP version
111510	18589 0 0	32144 792 776	`avx`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210310	20210125
111825	24134 0 0	37712 792 776	`avx`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210310	20210125
112365	18589 0 0	32144 792 776	`avx`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210310	20210125
113805	17767 0 0	31926 776 832	`avx`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210310	20210125
133987	11721 0 0	23709 768 832	`avx`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210310	20210125
136148	10984 0 0	21614 784 760	`avx`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210310	20210125
136463	11189 0 0	22981 768 832	`avx`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210310	20210125
155903	6345 0 0	17209 752 800	`avx`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210310	20210125
3693983	4370 0 0	18584 784 832	`ref`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210310	20210125
11193233	2363 0 0	15864 792 776	`ref`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210310	20210125
11261183	2363 0 0	15864 792 776	`ref`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210310	20210125
11344478	6695 0 0	20280 792 776	`ref`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210310	20210125
13679392	5393 0 0	19128 792 760	`ref`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210310	20210125
20349742	676 0 0	11270 784 760	`ref`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210310	20210125
40021380	876 0 0	12837 768 832	`ref`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210310	20210125
40579133	845 0 0	12605 768 832	`ref`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210310	20210125
46074105	740 0 0	11497 752 800	`ref`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210310	20210125

Compiler output

Implementation: avx
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

r3_recip.c: r3_recip.c:418:11: error: always_inline function '_mm256_set_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F0[0] = _mm256_set_epi32(0,0,0,0,0,0,0,1);
r3_recip.c: ^
r3_recip.c: r3_recip.c:419:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F0[1] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:420:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F0[2] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:421:11: error: always_inline function '_mm256_set_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F0[3] = _mm256_set_epi32(0,0,0,0,0,4194304,0,4194304);
r3_recip.c: ^
r3_recip.c: r3_recip.c:422:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F1[0] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:423:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F1[1] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:424:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F1[2] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:425:11: error: always_inline function '_mm256_set_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F1[3] = _mm256_set_epi32(0,0,0,0,0,4194304,0,4194304);
r3_recip.c: ^
r3_recip.c: r3_recip.c:427:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx