Implementation notes: amd64, bolero, crypto_core/multsntrup1277

Computer: bolero
Architecture: amd64
CPU ID: GenuineIntel-000406f1-bfebfbff
SUPERCOP version: 20211108
Operation: crypto_core
Primitive: multsntrup1277
TimeObject sizeTest sizeImplementationCompilerBenchmark dateSUPERCOP version
3003621977 0 037222 776 832avx800gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
3046421977 0 037222 776 832avxgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
3236022408 0 036713 776 776avx800clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3236022408 0 036713 776 776avx800clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3241622520 0 036825 776 776avxclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3242022552 0 036857 776 776avxclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3261622408 0 036713 776 776avx800clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3264422520 0 036825 776 776avxclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3406421764 0 033717 768 832avx800gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
3406821820 0 033765 768 832avxgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
3550421421 0 031911 768 760avx800clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3577621384 0 031863 768 760avxclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3680821841 0 033877 768 832avxgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
3711221841 0 033877 768 832avx800gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
4024422637 0 033709 760 800avx800gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
4084022648 0 033717 760 800avxgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
5553083410 0 017841 776 776refclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
5553242274 0 016673 776 776refclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
5613522274 0 016673 776 776refclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
5989044626 0 019854 776 832refgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
21954722703 0 016385 776 760refclang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
2762324620 0 011191 768 760refclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2021052920210529
3203524596 0 012509 768 832refgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
3435824669 0 012661 768 832refgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529
3714320527 0 011533 760 800refgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2021052920210529

Compiler output

Implementation: avx
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
mult1280.c: mult1280.c:425:7: error: always_inline function '_mm256_set1_epi16' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: x = const_x16(0);
mult1280.c: ^
mult1280.c: mult1280.c:10:19: note: expanded from macro 'const_x16'
mult1280.c: #define const_x16 _mm256_set1_epi16
mult1280.c: ^
mult1280.c: mult1280.c:426:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: for (i = p&~15;i < 1280;i += 16) store_x16(&f[i],x);
mult1280.c: ^
mult1280.c: mult1280.c:9:24: note: expanded from macro 'store_x16'
mult1280.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1280.c: ^
mult1280.c: mult1280.c:427:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: for (i = p&~15;i < 1280;i += 16) store_x16(&g[i],x);
mult1280.c: ^
mult1280.c: mult1280.c:9:24: note: expanded from macro 'store_x16'
mult1280.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1280.c: ^
mult1280.c: mult1280.c:432:9: error: always_inline function '_mm256_loadu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: x = load_x16(&f[i]);
mult1280.c: ^
mult1280.c: mult1280.c:8:21: note: expanded from macro 'load_x16'
mult1280.c: #define load_x16(p) _mm256_loadu_si256((int16x16 *) (p))
mult1280.c: ^
mult1280.c: mult1280.c:434:5: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE avx

Compiler output

Implementation: avx800
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
mult1280.c: mult1280.c:425:7: error: always_inline function '_mm256_set1_epi16' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: x = const_x16(0);
mult1280.c: ^
mult1280.c: mult1280.c:10:19: note: expanded from macro 'const_x16'
mult1280.c: #define const_x16 _mm256_set1_epi16
mult1280.c: ^
mult1280.c: mult1280.c:426:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: for (i = p&~15;i < 1280;i += 16) store_x16(&f[i],x);
mult1280.c: ^
mult1280.c: mult1280.c:9:24: note: expanded from macro 'store_x16'
mult1280.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1280.c: ^
mult1280.c: mult1280.c:427:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: for (i = p&~15;i < 1280;i += 16) store_x16(&g[i],x);
mult1280.c: ^
mult1280.c: mult1280.c:9:24: note: expanded from macro 'store_x16'
mult1280.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1280.c: ^
mult1280.c: mult1280.c:432:9: error: always_inline function '_mm256_loadu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: x = load_x16(&f[i]);
mult1280.c: ^
mult1280.c: mult1280.c:8:21: note: expanded from macro 'load_x16'
mult1280.c: #define load_x16(p) _mm256_loadu_si256((int16x16 *) (p))
mult1280.c: ^
mult1280.c: mult1280.c:434:5: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_multsntrup1277_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1280.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE avx800