Implementation notes: amd64, alder2,1f626960,3300000, crypto_core/invsntrup653

Computer: alder2,1f626960,3300000
Microarchitecture: amd64; Gracemont (906a4-20)
Architecture: amd64
CPU ID: GenuineIntel-000906a4-20-bfebfbff
SUPERCOP version: 20240425
Operation: crypto_core
Primitive: invsntrup653
TimeObject sizeTest sizeImplementationCompilerBenchmark dateSUPERCOP version
18360503409 0 017024 812 952avxclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024042620240425
18788823409 0 016864 812 952avxclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024042620240425
18943641522 0 012566 804 920avxclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024042620240425
23892951770 0 013351 772 984avxgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024042620240425
23908601888 0 013800 780 984avxgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024042620240425
23974544689 0 018568 780 984avxgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024042620240425
24271032053 0 013398 804 920avxclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024042620240425
25556381359 0 011895 764 952avxgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024042620240425
93577586024 0 019954 788 984refgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024042620240425
212010454139 0 017728 812 952refclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024042620240425
212126613121 0 016584 812 952refclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024042620240425
255409405233 0 018840 812 920refclang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024042620240425
28548638961 0 012914 788 984refgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024042620240425
311893031054 0 012575 772 984refgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024042620240425
312182721093 0 012406 804 920refclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024042620240425
313180781102 0 012134 804 920refclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024042620240425
33360226843 0 011385 772 952refgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024042620240425

Compiler output

Implementation: avx
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
recip.c: recip.c:94:19: error: always_inline function '_mm256_set1_epi16' requires target feature 'avx', but would be inlined into function 'vectormodq_swapeliminate' that is compiled without support for 'avx'
recip.c: __m256i f0vec = _mm256_set1_epi16(f0);
recip.c: ^
recip.c: recip.c:94:19: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
recip.c: recip.c:95:19: error: always_inline function '_mm256_set1_epi16' requires target feature 'avx', but would be inlined into function 'vectormodq_swapeliminate' that is compiled without support for 'avx'
recip.c: __m256i g0vec = _mm256_set1_epi16(g0);
recip.c: ^
recip.c: recip.c:95:19: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
recip.c: recip.c:96:48: error: always_inline function '_mm256_set1_epi16' requires target feature 'avx', but would be inlined into function 'vectormodq_swapeliminate' that is compiled without support for 'avx'
recip.c: __m256i f0vecqinv = _mm256_mullo_epi16(f0vec,qinvvec);
recip.c: ^
recip.c: recip.c:80:17: note: expanded from macro 'qinvvec'
recip.c: #define qinvvec _mm256_set1_epi16(qinv)
recip.c: ^
recip.c: recip.c:96:48: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
recip.c: recip.c:80:17: note: expanded from macro 'qinvvec'
recip.c: #define qinvvec _mm256_set1_epi16(qinv)
recip.c: ^
recip.c: recip.c:96:23: error: always_inline function '_mm256_mullo_epi16' requires target feature 'avx2', but would be inlined into function 'vectormodq_swapeliminate' that is compiled without support for 'avx2'
recip.c: __m256i f0vecqinv = _mm256_mullo_epi16(f0vec,qinvvec);
recip.c: ^
recip.c: recip.c:96:23: error: AVX vector argument of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
recip.c: recip.c:97:48: error: always_inline function '_mm256_set1_epi16' requires target feature 'avx', but would be inlined into function 'vectormodq_swapeliminate' that is compiled without support for 'avx'
recip.c: __m256i g0vecqinv = _mm256_mullo_epi16(g0vec,qinvvec);
recip.c: ^
recip.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE avx