Implementation notes: aarch64, pi3aplus, crypto_aead/icepole256av1

Computer: pi3aplus
Microarchitecture: aarch64; Cortex-A53 (410fd034)
Architecture: aarch64
CPU ID: 410fd034
SUPERCOP version: 20240716
Operation: crypto_aead
Primitive: icepole256av1
TimeObject sizeTest sizeImplementationCompilerBenchmark dateSUPERCOP version
1849827691 0 021593 776 856T:refclang_-mcpu=native_-O3_-fwrapv_-Qunused-arguments_-fPIC_-fPIE_-gdwarf-4_-Wall2024072120240716
1917177079 0 020744 872 864T:refgcc_-march=native_-mtune=native_-O3_-fwrapv_-fPIC_-fPIE_-gdwarf-4_-Wall2024072120240716
3547715247 0 017559 864 848T:refgcc_-march=native_-mtune=native_-O2_-fwrapv_-fPIC_-fPIE_-gdwarf-4_-Wall2024072120240716
3645155267 0 017815 864 848T:refgcc_-march=native_-mtune=native_-O_-fwrapv_-fPIC_-fPIE_-gdwarf-4_-Wall2024072120240716
3658354858 0 016399 848 840T:refgcc_-march=native_-mtune=native_-Os_-fwrapv_-fPIC_-fPIE_-gdwarf-4_-Wall2024072120240716

Namespace violations


icepole.o Kappa T
icepole.o Mu T
icepole.o P12 T
icepole.o P6 T
icepole.o Pi T
icepole.o Psi T
icepole.o Rho T
icepole.o initState256a T
icepole.o load64 T
icepole.o oneround T
icepole.o processIceBlock T
icepole.o processIceBlockRev T
icepole.o store64 T

Number of similar (implementation,compiler) pairs: 5, namely:
ImplementationCompiler
T:refclang -mcpu=native -O3 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:refgcc -march=native -mtune=native -O2 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)
T:refgcc -march=native -mtune=native -O3 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)
T:refgcc -march=native -mtune=native -O -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)
T:refgcc -march=native -mtune=native -Os -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)