Implementation comparison: crypto_hash/md2

Operationcrypto_hash
Primitivemd2
Description MD2 with 128-bit output
Designers Ron Rivest
Implementations openssl Daniel J. Bernstein (wrapper around OpenSSL)

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Details (compiler options, compilation failures, error messages, etc.)

amd64; 2019 AMD EPYC 7702; 64 x 2000MHz; genji346, supercop-20191017
amd64; 2018 AMD EPYC 7371; 16 x 3100MHz; unstable; temp, supercop-20191017
amd64; 2016 Intel Xeon Phi 7250; 68 x 1400MHz; genji291, supercop-20180818
amd64; 2016 Intel Xeon Phi 7210; 64 x 1300MHz; genji154, supercop-20170228
amd64; 2019 Intel Xeon Gold 6248; 20 x 2500MHz; pmnod076, supercop-20191017
amd64; 2017 Intel Xeon Gold 6150; 18 x 2700MHz; manny1024, supercop-20170904
amd64; 2017 Intel Xeon Gold 6148; 20 x 2400MHz; pmnod003, supercop-20190910
amd64; 2017 Intel Xeon Gold 6148; 40 x 2400MHz; genji548, supercop-20191017
amd64; 2017 Intel Xeon Gold 6130; 32 x 2100MHz; genji239, supercop-20191017
amd64; 2016 Intel Xeon E5-2680 v4; 28 x 2400MHz; genji441, supercop-20180818
amd64; 2016 Intel Xeon E5-2680 v4; 14 x 2400MHz; manny357, supercop-20170228
amd64; 2016 Intel Xeon E5-2680 v4; 28 x 2400MHz; genji122, supercop-20171020
amd64; 2014 Intel Xeon E5-2650 v3; 20 x 2300MHz; genji460, supercop-20180818
amd64; 2014 Intel Xeon E5-2680 v3; 24 x 2500MHz; genji202, supercop-20171020
amd64; 2014 Intel Xeon E5-2680 v3; 12 x 2500MHz; robin204, supercop-20170228
amd64; 2013 Intel Xeon E5-2697 v2; 12 x 2700MHz; manny613, supercop-20180818
amd64; 2012 Intel Xeon E5-4650L; 8 x 2600MHz; robin281, supercop-20170228
amd64; 2008 AMD Opteron 8354; 8 x 2194MHz; gcc16, supercop-20171218
aarch64; 2018 Cavium ThunderX2 CN9980; 64 x 2500MHz; pmnod145, supercop-20191017