Implementation notes: riscv64, riscvunleashed000, crypto_stream/xsalsa20

Computer: riscvunleashed000
Microarchitecture: riscv64; U54 (sifive,u54-mc)
Architecture: riscv64
CPU ID: unknown CPU ID
SUPERCOP version: 20240107
Operation: crypto_stream
Primitive: xsalsa20
TimeObject sizeTest sizeImplementationCompilerBenchmark dateSUPERCOP version
52535196 0 015067 776 793refclang_-march=rv64imafdc_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024011320231222
52543196 0 014643 776 793refclang_-march=rv64imafdc_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024011320231222
52543196 0 014643 776 793refclang_-march=rv64imafdc_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024011320231222
52563268 0 013004 776 793refgcc_-mcpu=sifive-u54_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024011320231222
52740196 0 012981 768 789refclang_-march=rv64imafdc_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024011320231222
52740196 0 015067 776 793refclang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024011320231222
52760268 0 014652 776 793refgcc_-mcpu=sifive-u54_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024011320231222
52760266 0 012352 760 793refgcc_-mcpu=sifive-u54_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024011320231222
52765268 0 012868 776 793refgcc_-mcpu=sifive-u54_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024011320231222