Implementation notes: riscv64, riscvunleashed000, crypto_dh/hecfp64e2i

Computer: riscvunleashed000
Microarchitecture: riscv64; U54 (sifive,u54-mc)
Architecture: riscv64
CPU ID: unknown CPU ID
SUPERCOP version: 20240107
Operation: crypto_dh
Primitive: hecfp64e2i

Compiler output

Implementation: T:v01/var
Security model: timingleaks
Compiler: clang -march=rv64imafdc -mtune=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
divisor_aadd.S: divisor_aadd.S:9:9: error: unrecognized operand modifier
divisor_aadd.S: pushq %r12
divisor_aadd.S: ^
divisor_aadd.S: divisor_aadd.S:9:9: error: unknown operand
divisor_aadd.S: pushq %r12
divisor_aadd.S: ^
divisor_aadd.S: divisor_aadd.S:10:9: error: unrecognized operand modifier
divisor_aadd.S: pushq %rbx
divisor_aadd.S: ^
divisor_aadd.S: divisor_aadd.S:10:9: error: unknown operand
divisor_aadd.S: pushq %rbx
divisor_aadd.S: ^
divisor_aadd.S: divisor_aadd.S:11:9: error: unrecognized operand modifier
divisor_aadd.S: pushq %r13
divisor_aadd.S: ^
divisor_aadd.S: divisor_aadd.S:11:9: error: unknown operand
divisor_aadd.S: pushq %r13
divisor_aadd.S: ^
divisor_aadd.S: divisor_aadd.S:12:10: error: expected register
divisor_aadd.S: movq 48(%r8), %r10
divisor_aadd.S: ^
divisor_aadd.S: divisor_aadd.S:13:10: error: expected register
divisor_aadd.S: subq 48(%r9), %r10
divisor_aadd.S: ^
divisor_aadd.S: divisor_aadd.S:14:7: error: unknown operand
divisor_aadd.S: ...
Number of similar (compiler,implementation) pairs: 5, namely:
CompilerImplementations
clang -march=rv64imafdc -mtune=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/var
clang -march=rv64imafdc -mtune=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/var
clang -march=rv64imafdc -mtune=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/var
clang -march=rv64imafdc -mtune=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/var
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/var

Compiler output

Implementation: T:v01/var
Security model: timingleaks
Compiler: gcc -mcpu=sifive-u54 -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE
divisor_aadd.S: divisor_aadd.S: Assembler messages:
divisor_aadd.S: divisor_aadd.S:9: Error: unrecognized opcode `pushq %r12'
divisor_aadd.S: divisor_aadd.S:10: Error: unrecognized opcode `pushq %rbx'
divisor_aadd.S: divisor_aadd.S:11: Error: unrecognized opcode `pushq %r13'
divisor_aadd.S: divisor_aadd.S:12: Error: unrecognized opcode `movq 48(%r8),%r10'
divisor_aadd.S: divisor_aadd.S:13: Error: unrecognized opcode `subq 48(%r9),%r10'
divisor_aadd.S: divisor_aadd.S:14: Error: unrecognized opcode `movq $0,%rax'
divisor_aadd.S: divisor_aadd.S:15: Error: unrecognized opcode `cmovc %rsi,%rax'
divisor_aadd.S: divisor_aadd.S:16: Error: unrecognized opcode `subq %rax,%r10'
divisor_aadd.S: divisor_aadd.S:17: Error: unrecognized opcode `movq %r10,48(%rcx)'
divisor_aadd.S: divisor_aadd.S:18: Error: unrecognized opcode `movq 56(%r8),%r11'
divisor_aadd.S: divisor_aadd.S:19: Error: unrecognized opcode `subq 56(%r9),%r11'
divisor_aadd.S: divisor_aadd.S:20: Error: unrecognized opcode `movq $0,%rax'
divisor_aadd.S: divisor_aadd.S:21: Error: unrecognized opcode `cmovc %rsi,%rax'
divisor_aadd.S: divisor_aadd.S:22: Error: unrecognized opcode `subq %rax,%r11'
divisor_aadd.S: divisor_aadd.S:23: Error: unrecognized opcode `movq %r11,56(%rcx)'
divisor_aadd.S: divisor_aadd.S:24: Error: unrecognized opcode `movq 32(%r9),%r10'
divisor_aadd.S: divisor_aadd.S:25: Error: unrecognized opcode `addq %rsi,%r10'
divisor_aadd.S: divisor_aadd.S:26: Error: unrecognized opcode `addq 32(%r8),%r10'
divisor_aadd.S: divisor_aadd.S:27: Error: unrecognized opcode `movq $0,%rax'
divisor_aadd.S: divisor_aadd.S:28: Error: unrecognized opcode `cmovnc %rsi,%rax'
divisor_aadd.S: divisor_aadd.S:29: Error: unrecognized opcode `subq %rax,%r10'
divisor_aadd.S: divisor_aadd.S:30: Error: unrecognized opcode `movq %r10,16(%rdi)'
divisor_aadd.S: divisor_aadd.S:31: Error: unrecognized opcode `movq 40(%r9),%r11'
divisor_aadd.S: divisor_aadd.S:32: Error: unrecognized opcode `addq %rsi,%r11'
divisor_aadd.S: ...
Number of similar (compiler,implementation) pairs: 4, namely:
CompilerImplementations
gcc -mcpu=sifive-u54 -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/var
gcc -mcpu=sifive-u54 -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/var
gcc -mcpu=sifive-u54 -O -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/var
gcc -mcpu=sifive-u54 -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/var

Compiler output

Implementation: T:v01/w8s01
Security model: timingleaks
Compiler: clang -march=rv64imafdc -mtune=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
array_lo.c: array_lo.c:37:3: error: invalid output constraint '=&d' in asm
array_lo.c: mim_mul_1(an[al], an, an, al, base, buf[i]);
array_lo.c: ^
array_lo.c: ./multiprecision.h:696:4: note: expanded from macro 'mim_mul_1'
array_lo.c: km_mul_2_add_c(_t, (zn)[0], (an)[0], (b), _t); \
array_lo.c: ^
array_lo.c: ./kernel.h:127:4: note: expanded from macro 'km_mul_2_add_c'
array_lo.c: : "=&d"((zH)), "=a"((zL)) \
array_lo.c: ^
array_lo.c: array_lo.c:37:3: error: invalid output constraint '=&d' in asm
array_lo.c: ./multiprecision.h:699:4: note: expanded from macro 'mim_mul_1'
array_lo.c: km_mul_2_add_c(_t, (zn)[0], (an)[0], (b), _t); \
array_lo.c: ^
array_lo.c: ./kernel.h:127:4: note: expanded from macro 'km_mul_2_add_c'
array_lo.c: : "=&d"((zH)), "=a"((zL)) \
array_lo.c: ^
array_lo.c: array_lo.c:37:3: error: invalid output constraint '=&d' in asm
array_lo.c: ./multiprecision.h:700:4: note: expanded from macro 'mim_mul_1'
array_lo.c: km_mul_2_add_c(_t, (zn)[1], (an)[1], (b), _t); \
array_lo.c: ^
array_lo.c: ./kernel.h:127:4: note: expanded from macro 'km_mul_2_add_c'
array_lo.c: : "=&d"((zH)), "=a"((zL)) \
array_lo.c: ^
array_lo.c: array_lo.c:37:3: error: invalid output constraint '=&d' in asm
array_lo.c: ./multiprecision.h:703:4: note: expanded from macro 'mim_mul_1'
array_lo.c: ...
Number of similar (compiler,implementation) pairs: 30, namely:
CompilerImplementations
clang -march=rv64imafdc -mtune=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s01
clang -march=rv64imafdc -mtune=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s01
clang -march=rv64imafdc -mtune=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s01
clang -march=rv64imafdc -mtune=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s01
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s01
clang -march=rv64imafdc -mtune=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s02
clang -march=rv64imafdc -mtune=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s02
clang -march=rv64imafdc -mtune=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s02
clang -march=rv64imafdc -mtune=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s02
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s02
clang -march=rv64imafdc -mtune=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s04
clang -march=rv64imafdc -mtune=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s04
clang -march=rv64imafdc -mtune=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s04
clang -march=rv64imafdc -mtune=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s04
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s04
clang -march=rv64imafdc -mtune=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s08
clang -march=rv64imafdc -mtune=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s08
clang -march=rv64imafdc -mtune=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s08
clang -march=rv64imafdc -mtune=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s08
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s08
clang -march=rv64imafdc -mtune=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s16
clang -march=rv64imafdc -mtune=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s16
clang -march=rv64imafdc -mtune=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s16
clang -march=rv64imafdc -mtune=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s16
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s16
clang -march=rv64imafdc -mtune=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s32
clang -march=rv64imafdc -mtune=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s32
clang -march=rv64imafdc -mtune=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s32
clang -march=rv64imafdc -mtune=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s32
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:v01/w8s32

Compiler output

Implementation: T:v01/w8s01
Security model: timingleaks
Compiler: gcc -mcpu=sifive-u54 -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE
array_lo.c: In file included from array_lo.c:24:
array_lo.c: array_lo.c: In function 'man_convert_word':
array_lo.c: kernel.h:123:41: error: impossible constraint in 'asm'
array_lo.c: 123 | #define km_mul_2_add_c(zH, zL, a, b, c) __asm__( \
array_lo.c: | ^~~~~~~
array_lo.c: multiprecision.h:696:25: note: in expansion of macro 'km_mul_2_add_c'
array_lo.c: 696 | km_mul_2_add_c(_t, (zn)[0], (an)[0], (b), _t); \
array_lo.c: | ^~~~~~~~~~~~~~
array_lo.c: array_lo.c:37:17: note: in expansion of macro 'mim_mul_1'
array_lo.c: 37 | mim_mul_1(an[al], an, an, al, base, buf[i]);
array_lo.c: | ^~~~~~~~~
array_lo.c: kernel.h:123:41: error: impossible constraint in 'asm'
array_lo.c: 123 | #define km_mul_2_add_c(zH, zL, a, b, c) __asm__( \
array_lo.c: | ^~~~~~~
array_lo.c: multiprecision.h:699:25: note: in expansion of macro 'km_mul_2_add_c'
array_lo.c: 699 | km_mul_2_add_c(_t, (zn)[0], (an)[0], (b), _t); \
array_lo.c: | ^~~~~~~~~~~~~~
array_lo.c: array_lo.c:37:17: note: in expansion of macro 'mim_mul_1'
array_lo.c: 37 | mim_mul_1(an[al], an, an, al, base, buf[i]);
array_lo.c: | ^~~~~~~~~
array_lo.c: kernel.h:123:41: error: impossible constraint in 'asm'
array_lo.c: 123 | #define km_mul_2_add_c(zH, zL, a, b, c) __asm__( \
array_lo.c: | ^~~~~~~
array_lo.c: multiprecision.h:700:25: note: in expansion of macro 'km_mul_2_add_c'
array_lo.c: 700 | km_mul_2_add_c(_t, (zn)[1], (an)[1], (b), _t); \
array_lo.c: ...
Number of similar (compiler,implementation) pairs: 24, namely:
CompilerImplementations
gcc -mcpu=sifive-u54 -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s01
gcc -mcpu=sifive-u54 -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s01
gcc -mcpu=sifive-u54 -O -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s01
gcc -mcpu=sifive-u54 -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s01
gcc -mcpu=sifive-u54 -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s02
gcc -mcpu=sifive-u54 -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s02
gcc -mcpu=sifive-u54 -O -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s02
gcc -mcpu=sifive-u54 -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s02
gcc -mcpu=sifive-u54 -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s04
gcc -mcpu=sifive-u54 -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s04
gcc -mcpu=sifive-u54 -O -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s04
gcc -mcpu=sifive-u54 -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s04
gcc -mcpu=sifive-u54 -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s08
gcc -mcpu=sifive-u54 -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s08
gcc -mcpu=sifive-u54 -O -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s08
gcc -mcpu=sifive-u54 -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s08
gcc -mcpu=sifive-u54 -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s16
gcc -mcpu=sifive-u54 -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s16
gcc -mcpu=sifive-u54 -O -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s16
gcc -mcpu=sifive-u54 -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s16
gcc -mcpu=sifive-u54 -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s32
gcc -mcpu=sifive-u54 -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s32
gcc -mcpu=sifive-u54 -O -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s32
gcc -mcpu=sifive-u54 -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE T:v01/w8s32