Implementation notes: mipso32, h1mips, crypto_hash/simd512

Computer: h1mips
Architecture: mipso32
CPU ID: unknown CPU ID
SUPERCOP version: 20140622
Operation: crypto_hash
Primitive: simd512

Time	Implementation	Compiler	Benchmark date	SUPERCOP version
398120	`opt`	`gcc -funroll-loops -O2 -fomit-frame-pointer`	20140528	20140525
398500	`opt`	`gcc -funroll-loops -mabi=32 -O2 -fomit-frame-pointer`	20140528	20140525
402250	`opt`	`gcc -funroll-loops -O3 -fomit-frame-pointer`	20140528	20140525
402420	`opt`	`gcc -funroll-loops -mabi=32 -O3 -fomit-frame-pointer`	20140528	20140525
407076	`opt`	`gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer`	20140528	20140525
410958	`opt`	`gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer`	20140528	20140525
420798	`opt`	`gcc -mabi=32 -O3 -fomit-frame-pointer`	20140528	20140525
420912	`opt`	`gcc -O3 -fomit-frame-pointer`	20140528	20140525
434432	`opt`	`gcc -fno-schedule-insns -O3 -fomit-frame-pointer`	20140528	20140525
451998	`sphlib-small`	`gcc -fno-schedule-insns -Os -fomit-frame-pointer`	20140528	20140525
453710	`sphlib-small`	`gcc -fno-schedule-insns -O2 -fomit-frame-pointer`	20140528	20140525
453742	`sphlib-small`	`gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer`	20140528	20140525
463248	`sphlib-small`	`gcc -funroll-loops -Os -fomit-frame-pointer`	20140528	20140525
463248	`sphlib-small`	`gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer`	20140528	20140525
463728	`sphlib-small`	`gcc -mabi=32 -Os -fomit-frame-pointer`	20140528	20140525
463750	`sphlib-small`	`gcc -Os -fomit-frame-pointer`	20140528	20140525
512552	`sphlib-small`	`gcc -O2 -fomit-frame-pointer`	20140528	20140525
513586	`sphlib-small`	`gcc -mabi=32 -O2 -fomit-frame-pointer`	20140528	20140525
528140	`opt`	`gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer`	20140528	20140525
528358	`opt`	`gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer`	20140528	20140525
529238	`opt`	`gcc -funroll-loops -O -fomit-frame-pointer`	20140528	20140525
534992	`opt`	`gcc -fno-schedule-insns -O2 -fomit-frame-pointer`	20140528	20140525
540460	`opt`	`gcc -O2 -fomit-frame-pointer`	20140528	20140525
540516	`opt`	`gcc -mabi=32 -O2 -fomit-frame-pointer`	20140528	20140525
570946	`sphlib-small`	`gcc -O -fomit-frame-pointer`	20140528	20140525
570946	`sphlib-small`	`gcc -mabi=32 -O -fomit-frame-pointer`	20140528	20140525
570958	`sphlib-small`	`gcc -fno-schedule-insns -O -fomit-frame-pointer`	20140528	20140525
577682	`opt`	`gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer`	20140528	20140525
580832	`opt`	`gcc -fno-schedule-insns -Os -fomit-frame-pointer`	20140528	20140525
589342	`opt`	`gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer`	20140528	20140525
589412	`opt`	`gcc -funroll-loops -Os -fomit-frame-pointer`	20140528	20140525
591602	`opt`	`gcc -Os -fomit-frame-pointer`	20140528	20140525
591676	`opt`	`gcc -mabi=32 -Os -fomit-frame-pointer`	20140528	20140525
643766	`opt`	`gcc -mabi=32 -O -fomit-frame-pointer`	20140528	20140525
643774	`opt`	`gcc -O -fomit-frame-pointer`	20140528	20140525
643814	`opt`	`gcc -fno-schedule-insns -O -fomit-frame-pointer`	20140528	20140525
1536880	`sphlib-small`	`cc`	20140528	20140525
1537292	`sphlib-small`	`gcc -funroll-loops`	20140528	20140525
1545064	`sphlib-small`	`gcc`	20140528	20140525
2577168	`opt`	`gcc`	20140528	20140525
2577232	`opt`	`cc`	20140528	20140525
2578698	`opt`	`gcc -funroll-loops`	20140528	20140525
22801486	`ref`	`gcc -funroll-loops -O3 -fomit-frame-pointer`	20140528	20140525
22801532	`ref`	`gcc -funroll-loops -mabi=32 -O3 -fomit-frame-pointer`	20140528	20140525
22885188	`ref`	`gcc -funroll-loops -O2 -fomit-frame-pointer`	20140528	20140525
22885434	`ref`	`gcc -funroll-loops -mabi=32 -O2 -fomit-frame-pointer`	20140528	20140525
23411248	`ref`	`gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer`	20140528	20140525
23501870	`ref`	`gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer`	20140528	20140525
23567386	`ref`	`gcc -fno-schedule-insns -O3 -fomit-frame-pointer`	20140528	20140525
23602836	`ref`	`gcc -mabi=32 -O3 -fomit-frame-pointer`	20140528	20140525
23603248	`ref`	`gcc -O3 -fomit-frame-pointer`	20140528	20140525
23667100	`ref`	`gcc -fno-schedule-insns -O2 -fomit-frame-pointer`	20140528	20140525
23700422	`ref`	`gcc -mabi=32 -O2 -fomit-frame-pointer`	20140528	20140525
23700984	`ref`	`gcc -O2 -fomit-frame-pointer`	20140528	20140525
23725114	`ref`	`gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer`	20140528	20140525
23733750	`ref`	`gcc -fno-schedule-insns -Os -fomit-frame-pointer`	20140528	20140525
23754702	`ref`	`gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer`	20140528	20140525
23754818	`ref`	`gcc -funroll-loops -Os -fomit-frame-pointer`	20140528	20140525
23758318	`ref`	`gcc -mabi=32 -Os -fomit-frame-pointer`	20140528	20140525
23758364	`ref`	`gcc -Os -fomit-frame-pointer`	20140528	20140525
23775828	`ref`	`gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer`	20140528	20140525
23775856	`ref`	`gcc -funroll-loops -O -fomit-frame-pointer`	20140528	20140525
23775966	`ref`	`gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer`	20140528	20140525
23781648	`ref`	`gcc -O -fomit-frame-pointer`	20140528	20140525
23781672	`ref`	`gcc -mabi=32 -O -fomit-frame-pointer`	20140528	20140525
23781804	`ref`	`gcc -fno-schedule-insns -O -fomit-frame-pointer`	20140528	20140525
41918606	`ref`	`gcc`	20140528	20140525
41918908	`ref`	`cc`	20140528	20140525
41918920	`ref`	`gcc -funroll-loops`	20140528	20140525

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: cc

simd.c:
simd.c: cc1: out of memory allocating 20808 bytes after a total of 5345280 bytes

Number of similar (compiler,implementation) pairs: 3, namely:

Compiler	Implementations
cc	sphlib
gcc	sphlib
gcc -funroll-loops	sphlib

Compiler output

Implementation: crypto_hash/simd512/vect128
Compiler: cc

vector.c: In file included from vector.c:5:
vector.c: vector.h:252:2: error: #error "I don't know how to vectorize on this architecture."
vector.c: In file included from vector.c:5:
vector.c: vector.h:344: error: array type has incomplete element type
vector.c: vector.h:355: error: array type has incomplete element type
vector.c: vector.h:367: error: array type has incomplete element type
vector.c: vector.c:24: error: variable 'V128' has initializer but incomplete type
vector.c: vector.c:25: error: variable 'V255' has initializer but incomplete type
vector.c: vector.c:26: error: variable 'V257' has initializer but incomplete type
vector.c: vector.c:27: error: variable 'V0' has initializer but incomplete type
vector.c: vector.c: In function 'fft64':
vector.c: vector.c:63: error: 'v16' undeclared (first use in this function)
vector.c: vector.c:63: error: (Each undeclared identifier is reported only once
vector.c: vector.c:63: error: for each function it appears in.)
vector.c: vector.c:63: error: expected expression before 'const'
vector.c: vector.c:65: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'X0'
vector.c: vector.c:65: error: 'X0' undeclared (first use in this function)
vector.c: vector.c:65: error: 'X1' undeclared (first use in this function)
vector.c: vector.c:65: error: 'X2' undeclared (first use in this function)
vector.c: vector.c:65: error: 'X3' undeclared (first use in this function)
vector.c: vector.c:65: error: 'X4' undeclared (first use in this function)
vector.c: vector.c:65: error: 'X5' undeclared (first use in this function)
vector.c: vector.c:65: error: 'X6' undeclared (first use in this function)
vector.c: vector.c:65: error: 'X7' undeclared (first use in this function)
vector.c: vector.c:75: error: 'A' undeclared (first use in this function)
vector.c: ...

Number of similar (compiler,implementation) pairs: 27, namely:

Compiler	Implementations
cc	vect128
gcc	vect128
gcc -O2 -fomit-frame-pointer	vect128
gcc -O3 -fomit-frame-pointer	vect128
gcc -O -fomit-frame-pointer	vect128
gcc -Os -fomit-frame-pointer	vect128
gcc -fno-schedule-insns -O2 -fomit-frame-pointer	vect128
gcc -fno-schedule-insns -O3 -fomit-frame-pointer	vect128
gcc -fno-schedule-insns -O -fomit-frame-pointer	vect128
gcc -fno-schedule-insns -Os -fomit-frame-pointer	vect128
gcc -funroll-loops	vect128
gcc -funroll-loops -O2 -fomit-frame-pointer	vect128
gcc -funroll-loops -O3 -fomit-frame-pointer	vect128
gcc -funroll-loops -O -fomit-frame-pointer	vect128
gcc -funroll-loops -Os -fomit-frame-pointer	vect128
gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer	vect128
gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer	vect128
gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer	vect128
gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer	vect128
gcc -funroll-loops -mabi=32 -O2 -fomit-frame-pointer	vect128
gcc -funroll-loops -mabi=32 -O3 -fomit-frame-pointer	vect128
gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer	vect128
gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer	vect128
gcc -mabi=32 -O2 -fomit-frame-pointer	vect128
gcc -mabi=32 -O3 -fomit-frame-pointer	vect128
gcc -mabi=32 -O -fomit-frame-pointer	vect128
gcc -mabi=32 -Os -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd512/ref
Compiler: clang -O3 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd512/vect128
Compiler: clang -O3 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: clang -O3 -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '+' is not a recognized feature for this target (ignoring feature)
hash.c: /tmp/cc-Jd5Umh.s: Assembler messages:
hash.c: /tmp/cc-Jd5Umh.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-Jd5Umh.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-Jd5Umh.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-Jd5Umh.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-Jd5Umh.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-Jd5Umh.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '+' is not a recognized feature for this target (ignoring feature)
simd.c: /tmp/cc-CazJzE.s: Assembler messages:
simd.c: /tmp/cc-CazJzE.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-CazJzE.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-CazJzE.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-CazJzE.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-CazJzE.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-CazJzE.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-CazJzE.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-CazJzE.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-CazJzE.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-CazJzE.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-CazJzE.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-CazJzE.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-CazJzE.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-CazJzE.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-CazJzE.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-CazJzE.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-CazJzE.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-CazJzE.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-CazJzE.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-CazJzE.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-CazJzE.s:298: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-CazJzE.s:298: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: clang -O3 -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '+' is not a recognized feature for this target (ignoring feature)
hash.c: /tmp/cc-SpBd3u.s: Assembler messages:
hash.c: /tmp/cc-SpBd3u.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-SpBd3u.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-SpBd3u.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-SpBd3u.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-SpBd3u.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-SpBd3u.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '+' is not a recognized feature for this target (ignoring feature)
simd.c: /tmp/cc-7PILwM.s: Assembler messages:
simd.c: /tmp/cc-7PILwM.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-7PILwM.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-7PILwM.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-7PILwM.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-7PILwM.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-7PILwM.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-7PILwM.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-7PILwM.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-7PILwM.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-7PILwM.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-7PILwM.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-7PILwM.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-7PILwM.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-7PILwM.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-7PILwM.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-7PILwM.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-7PILwM.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-7PILwM.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-7PILwM.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-7PILwM.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-7PILwM.s:298: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-7PILwM.s:298: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/opt
Compiler: clang -O3 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd512/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd512/vect128
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-FfPjlt.s: Assembler messages:
hash.c: /tmp/cc-FfPjlt.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-FfPjlt.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-FfPjlt.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-FfPjlt.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-FfPjlt.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-FfPjlt.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-aVCnmP.s: Assembler messages:
simd.c: /tmp/cc-aVCnmP.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-aVCnmP.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-aVCnmP.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-aVCnmP.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-aVCnmP.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-aVCnmP.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-aVCnmP.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-aVCnmP.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-aVCnmP.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-aVCnmP.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-aVCnmP.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-aVCnmP.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-aVCnmP.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-aVCnmP.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-aVCnmP.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-aVCnmP.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-aVCnmP.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-aVCnmP.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-aVCnmP.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-aVCnmP.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/opt
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-ijOryR.s: Assembler messages:
hash.c: /tmp/cc-ijOryR.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-ijOryR.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-ijOryR.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-ijOryR.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-ijOryR.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-ijOryR.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-JUMpXc.s: Assembler messages:
simd.c: /tmp/cc-JUMpXc.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JUMpXc.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JUMpXc.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JUMpXc.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JUMpXc.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JUMpXc.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JUMpXc.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JUMpXc.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JUMpXc.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JUMpXc.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JUMpXc.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JUMpXc.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JUMpXc.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JUMpXc.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JUMpXc.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JUMpXc.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JUMpXc.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JUMpXc.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JUMpXc.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JUMpXc.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-0wN1nv.s: Assembler messages:
hash.c: /tmp/cc-0wN1nv.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-0wN1nv.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-0wN1nv.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-0wN1nv.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-0wN1nv.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-0wN1nv.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-7KHoHS.s: Assembler messages:
simd.c: /tmp/cc-7KHoHS.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-7KHoHS.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-7KHoHS.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-7KHoHS.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-7KHoHS.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-7KHoHS.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-7KHoHS.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-7KHoHS.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-7KHoHS.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-7KHoHS.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-7KHoHS.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-7KHoHS.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-7KHoHS.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-7KHoHS.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-7KHoHS.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-7KHoHS.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-7KHoHS.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-7KHoHS.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-7KHoHS.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-7KHoHS.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_hash/simd512/opt
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	opt

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-e0nydg.s: Assembler messages:
hash.c: /tmp/cc-e0nydg.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-e0nydg.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-e0nydg.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-e0nydg.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-e0nydg.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-e0nydg.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-O5xtzu.s: Assembler messages:
simd.c: /tmp/cc-O5xtzu.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-O5xtzu.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-O5xtzu.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-O5xtzu.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-O5xtzu.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-O5xtzu.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-O5xtzu.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-O5xtzu.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-O5xtzu.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-O5xtzu.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-O5xtzu.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-O5xtzu.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-O5xtzu.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-O5xtzu.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-O5xtzu.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-O5xtzu.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-O5xtzu.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-O5xtzu.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-O5xtzu.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-O5xtzu.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	sphlib

Compiler output

Implementation: crypto_hash/simd512/vect128
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	vect128

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-6xQUq6.s: Assembler messages:
hash.c: /tmp/cc-6xQUq6.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-6xQUq6.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-6xQUq6.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-6xQUq6.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-6xQUq6.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-6xQUq6.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-WFdYLf.s: Assembler messages:
simd.c: /tmp/cc-WFdYLf.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WFdYLf.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WFdYLf.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WFdYLf.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WFdYLf.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WFdYLf.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WFdYLf.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WFdYLf.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WFdYLf.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WFdYLf.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WFdYLf.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WFdYLf.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WFdYLf.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WFdYLf.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WFdYLf.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WFdYLf.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WFdYLf.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WFdYLf.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WFdYLf.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WFdYLf.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/opt
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd512/vect128
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd512/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-tWawN5.s: Assembler messages:
hash.c: /tmp/cc-tWawN5.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-tWawN5.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-tWawN5.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-tWawN5.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-tWawN5.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-tWawN5.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-n7j63g.s: Assembler messages:
simd.c: /tmp/cc-n7j63g.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-n7j63g.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-n7j63g.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-n7j63g.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-n7j63g.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-n7j63g.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-n7j63g.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-n7j63g.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-n7j63g.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-n7j63g.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-n7j63g.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-n7j63g.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-n7j63g.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-n7j63g.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-n7j63g.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-n7j63g.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-n7j63g.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-n7j63g.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-n7j63g.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-n7j63g.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-6GTGta.s: Assembler messages:
hash.c: /tmp/cc-6GTGta.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-6GTGta.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-6GTGta.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-6GTGta.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-6GTGta.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-6GTGta.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-sZ6mXj.s: Assembler messages:
simd.c: /tmp/cc-sZ6mXj.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-sZ6mXj.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-sZ6mXj.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-sZ6mXj.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-sZ6mXj.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-sZ6mXj.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-sZ6mXj.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-sZ6mXj.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-sZ6mXj.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-sZ6mXj.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-sZ6mXj.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-sZ6mXj.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-sZ6mXj.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-sZ6mXj.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-sZ6mXj.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-sZ6mXj.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-sZ6mXj.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-sZ6mXj.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-sZ6mXj.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-sZ6mXj.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/opt
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	opt

Compiler output

Implementation: crypto_hash/simd512/vect128
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	vect128

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-xnXV8N.s: Assembler messages:
hash.c: /tmp/cc-xnXV8N.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-xnXV8N.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-xnXV8N.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-xnXV8N.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-xnXV8N.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-xnXV8N.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-WGmqw9.s: Assembler messages:
simd.c: /tmp/cc-WGmqw9.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WGmqw9.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WGmqw9.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WGmqw9.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WGmqw9.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WGmqw9.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WGmqw9.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WGmqw9.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WGmqw9.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WGmqw9.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WGmqw9.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WGmqw9.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WGmqw9.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WGmqw9.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WGmqw9.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WGmqw9.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WGmqw9.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WGmqw9.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WGmqw9.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WGmqw9.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	sphlib

Compiler output

Implementation: crypto_hash/simd512/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-H9fg6s.s: Assembler messages:
hash.c: /tmp/cc-H9fg6s.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-H9fg6s.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-H9fg6s.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-H9fg6s.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-H9fg6s.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-H9fg6s.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-2jpaQP.s: Assembler messages:
simd.c: /tmp/cc-2jpaQP.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-2jpaQP.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-2jpaQP.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-2jpaQP.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-2jpaQP.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-2jpaQP.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-2jpaQP.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-2jpaQP.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-2jpaQP.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-2jpaQP.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-2jpaQP.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-2jpaQP.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-2jpaQP.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-2jpaQP.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-2jpaQP.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-2jpaQP.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-2jpaQP.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-2jpaQP.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-2jpaQP.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-2jpaQP.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-dT4i5i.s: Assembler messages:
hash.c: /tmp/cc-dT4i5i.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-dT4i5i.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-dT4i5i.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-dT4i5i.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-dT4i5i.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-dT4i5i.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-sRvkKD.s: Assembler messages:
simd.c: /tmp/cc-sRvkKD.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-sRvkKD.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-sRvkKD.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-sRvkKD.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-sRvkKD.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-sRvkKD.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-sRvkKD.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-sRvkKD.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-sRvkKD.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-sRvkKD.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-sRvkKD.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-sRvkKD.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-sRvkKD.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-sRvkKD.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-sRvkKD.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-sRvkKD.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-sRvkKD.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-sRvkKD.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-sRvkKD.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-sRvkKD.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/opt
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd512/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd512/vect128
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd512/opt
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	opt

Compiler output

Implementation: crypto_hash/simd512/vect128
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	vect128

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-MLWTF9.s: Assembler messages:
hash.c: /tmp/cc-MLWTF9.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-MLWTF9.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-MLWTF9.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-MLWTF9.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-MLWTF9.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-MLWTF9.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-ObORLj.s: Assembler messages:
simd.c: /tmp/cc-ObORLj.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-ObORLj.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-ObORLj.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-ObORLj.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-ObORLj.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-ObORLj.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-ObORLj.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-ObORLj.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-ObORLj.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-ObORLj.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-ObORLj.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-ObORLj.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-ObORLj.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-ObORLj.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-ObORLj.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-ObORLj.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-ObORLj.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-ObORLj.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-ObORLj.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-ObORLj.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-j1VDWa.s: Assembler messages:
hash.c: /tmp/cc-j1VDWa.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-j1VDWa.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-j1VDWa.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-j1VDWa.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-j1VDWa.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-j1VDWa.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-iFuopv.s: Assembler messages:
simd.c: /tmp/cc-iFuopv.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-iFuopv.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-iFuopv.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-iFuopv.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-iFuopv.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-iFuopv.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-iFuopv.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-iFuopv.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-iFuopv.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-iFuopv.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-iFuopv.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-iFuopv.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-iFuopv.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-iFuopv.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-iFuopv.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-iFuopv.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-iFuopv.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-iFuopv.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-iFuopv.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-iFuopv.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	sphlib

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-076n7U.s: Assembler messages:
hash.c: /tmp/cc-076n7U.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-076n7U.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-076n7U.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-076n7U.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-076n7U.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-076n7U.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-72qTXh.s: Assembler messages:
simd.c: /tmp/cc-72qTXh.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-72qTXh.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-72qTXh.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-72qTXh.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-72qTXh.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-72qTXh.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-72qTXh.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-72qTXh.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-72qTXh.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-72qTXh.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-72qTXh.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-72qTXh.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-72qTXh.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-72qTXh.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-72qTXh.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-72qTXh.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-72qTXh.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-72qTXh.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-72qTXh.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-72qTXh.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/vect128
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-hi7v0h.s: Assembler messages:
hash.c: /tmp/cc-hi7v0h.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-hi7v0h.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-hi7v0h.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-hi7v0h.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-hi7v0h.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-hi7v0h.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-kBTpuC.s: Assembler messages:
simd.c: /tmp/cc-kBTpuC.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-kBTpuC.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-kBTpuC.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-kBTpuC.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-kBTpuC.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-kBTpuC.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-kBTpuC.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-kBTpuC.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-kBTpuC.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-kBTpuC.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-kBTpuC.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-kBTpuC.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-kBTpuC.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-kBTpuC.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-kBTpuC.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-kBTpuC.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-kBTpuC.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-kBTpuC.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-kBTpuC.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-kBTpuC.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/opt
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd512/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd512/opt
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	opt

Compiler output

Implementation: crypto_hash/simd512/vect128
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	vect128

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-I0Pnog.s: Assembler messages:
hash.c: /tmp/cc-I0Pnog.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-I0Pnog.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-I0Pnog.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-I0Pnog.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-I0Pnog.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-I0Pnog.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-fEVbHy.s: Assembler messages:
simd.c: /tmp/cc-fEVbHy.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-fEVbHy.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-fEVbHy.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-fEVbHy.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-fEVbHy.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-fEVbHy.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-fEVbHy.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-fEVbHy.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-fEVbHy.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-fEVbHy.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-fEVbHy.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-fEVbHy.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-fEVbHy.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-fEVbHy.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-fEVbHy.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-fEVbHy.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-fEVbHy.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-fEVbHy.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-fEVbHy.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-fEVbHy.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-OvkSIF.s: Assembler messages:
hash.c: /tmp/cc-OvkSIF.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-OvkSIF.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-OvkSIF.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-OvkSIF.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-OvkSIF.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-OvkSIF.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-3U9UTZ.s: Assembler messages:
simd.c: /tmp/cc-3U9UTZ.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-3U9UTZ.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-3U9UTZ.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-3U9UTZ.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-3U9UTZ.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-3U9UTZ.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-3U9UTZ.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-3U9UTZ.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-3U9UTZ.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-3U9UTZ.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-3U9UTZ.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-3U9UTZ.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-3U9UTZ.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-3U9UTZ.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-3U9UTZ.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-3U9UTZ.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-3U9UTZ.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-3U9UTZ.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-3U9UTZ.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-3U9UTZ.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	sphlib

Compiler output

Implementation: crypto_hash/simd512/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: clang -O3 -fwrapv -march=native -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-KiXpKG.s: Assembler messages:
hash.c: /tmp/cc-KiXpKG.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-KiXpKG.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-KiXpKG.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-KiXpKG.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-KiXpKG.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-KiXpKG.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-9gWtaY.s: Assembler messages:
simd.c: /tmp/cc-9gWtaY.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-9gWtaY.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-9gWtaY.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-9gWtaY.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-9gWtaY.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-9gWtaY.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-9gWtaY.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-9gWtaY.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-9gWtaY.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-9gWtaY.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-9gWtaY.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-9gWtaY.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-9gWtaY.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-9gWtaY.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-9gWtaY.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-9gWtaY.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-9gWtaY.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-9gWtaY.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-9gWtaY.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-9gWtaY.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: clang -O3 -fwrapv -march=native -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-XNx4Zb.s: Assembler messages:
hash.c: /tmp/cc-XNx4Zb.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-XNx4Zb.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-XNx4Zb.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-XNx4Zb.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-XNx4Zb.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-XNx4Zb.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-J6mLDm.s: Assembler messages:
simd.c: /tmp/cc-J6mLDm.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-J6mLDm.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-J6mLDm.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-J6mLDm.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-J6mLDm.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-J6mLDm.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-J6mLDm.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-J6mLDm.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-J6mLDm.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-J6mLDm.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-J6mLDm.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-J6mLDm.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-J6mLDm.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-J6mLDm.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-J6mLDm.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-J6mLDm.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-J6mLDm.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-J6mLDm.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-J6mLDm.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-J6mLDm.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/vect128
Compiler: clang -O3 -fwrapv -march=native -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd512/ref
Compiler: clang -O3 -fwrapv -march=native -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd512/opt
Compiler: clang -O3 -fwrapv -march=native -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-EER7zn.s: Assembler messages:
hash.c: /tmp/cc-EER7zn.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-EER7zn.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-EER7zn.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-EER7zn.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-EER7zn.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-EER7zn.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-t7eeDF.s: Assembler messages:
simd.c: /tmp/cc-t7eeDF.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-t7eeDF.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-t7eeDF.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-t7eeDF.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-t7eeDF.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-t7eeDF.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-t7eeDF.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-t7eeDF.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-t7eeDF.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-t7eeDF.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-t7eeDF.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-t7eeDF.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-t7eeDF.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-t7eeDF.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-t7eeDF.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-t7eeDF.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-t7eeDF.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-t7eeDF.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-t7eeDF.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-t7eeDF.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/opt
Compiler: clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd512/ref
Compiler: clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-sWd4Ff.s: Assembler messages:
hash.c: /tmp/cc-sWd4Ff.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-sWd4Ff.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-sWd4Ff.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-sWd4Ff.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-sWd4Ff.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-sWd4Ff.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-z7xB4z.s: Assembler messages:
simd.c: /tmp/cc-z7xB4z.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-z7xB4z.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-z7xB4z.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-z7xB4z.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-z7xB4z.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-z7xB4z.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-z7xB4z.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-z7xB4z.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-z7xB4z.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-z7xB4z.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-z7xB4z.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-z7xB4z.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-z7xB4z.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-z7xB4z.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-z7xB4z.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-z7xB4z.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-z7xB4z.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-z7xB4z.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-z7xB4z.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-z7xB4z.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/vect128
Compiler: clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd512/opt
Compiler: clang -O3 -fwrapv -mavx2 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd512/ref
Compiler: clang -O3 -fwrapv -mavx2 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd512/vect128
Compiler: clang -O3 -fwrapv -mavx2 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: clang -O3 -fwrapv -mavx2 -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '+' is not a recognized feature for this target (ignoring feature)
hash.c: /tmp/cc-dSmw7h.s: Assembler messages:
hash.c: /tmp/cc-dSmw7h.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-dSmw7h.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-dSmw7h.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-dSmw7h.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-dSmw7h.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-dSmw7h.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '+' is not a recognized feature for this target (ignoring feature)
simd.c: /tmp/cc-zPNeBq.s: Assembler messages:
simd.c: /tmp/cc-zPNeBq.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-zPNeBq.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-zPNeBq.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-zPNeBq.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-zPNeBq.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-zPNeBq.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-zPNeBq.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-zPNeBq.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-zPNeBq.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-zPNeBq.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-zPNeBq.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-zPNeBq.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-zPNeBq.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-zPNeBq.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-zPNeBq.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-zPNeBq.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-zPNeBq.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-zPNeBq.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-zPNeBq.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-zPNeBq.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-zPNeBq.s:298: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-zPNeBq.s:298: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: clang -O3 -fwrapv -mavx2 -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '+' is not a recognized feature for this target (ignoring feature)
hash.c: /tmp/cc-yajC0N.s: Assembler messages:
hash.c: /tmp/cc-yajC0N.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-yajC0N.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-yajC0N.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-yajC0N.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-yajC0N.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-yajC0N.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '+' is not a recognized feature for this target (ignoring feature)
simd.c: /tmp/cc-HAqVP8.s: Assembler messages:
simd.c: /tmp/cc-HAqVP8.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-HAqVP8.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-HAqVP8.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-HAqVP8.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-HAqVP8.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-HAqVP8.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-HAqVP8.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-HAqVP8.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-HAqVP8.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-HAqVP8.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-HAqVP8.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-HAqVP8.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-HAqVP8.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-HAqVP8.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-HAqVP8.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-HAqVP8.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-HAqVP8.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-HAqVP8.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-HAqVP8.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-HAqVP8.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-HAqVP8.s:298: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-HAqVP8.s:298: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/vect128
Compiler: clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '+' is not a recognized feature for this target (ignoring feature)
hash.c: /tmp/cc-SdqAwc.s: Assembler messages:
hash.c: /tmp/cc-SdqAwc.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-SdqAwc.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-SdqAwc.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-SdqAwc.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-SdqAwc.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-SdqAwc.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '+' is not a recognized feature for this target (ignoring feature)
simd.c: /tmp/cc-KOGhHm.s: Assembler messages:
simd.c: /tmp/cc-KOGhHm.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-KOGhHm.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-KOGhHm.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-KOGhHm.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-KOGhHm.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-KOGhHm.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-KOGhHm.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-KOGhHm.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-KOGhHm.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-KOGhHm.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-KOGhHm.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-KOGhHm.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-KOGhHm.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-KOGhHm.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-KOGhHm.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-KOGhHm.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-KOGhHm.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-KOGhHm.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-KOGhHm.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-KOGhHm.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-KOGhHm.s:298: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-KOGhHm.s:298: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/ref
Compiler: clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '+' is not a recognized feature for this target (ignoring feature)
hash.c: /tmp/cc-W8RevK.s: Assembler messages:
hash.c: /tmp/cc-W8RevK.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-W8RevK.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-W8RevK.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-W8RevK.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-W8RevK.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-W8RevK.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '+' is not a recognized feature for this target (ignoring feature)
simd.c: /tmp/cc-tDNx05.s: Assembler messages:
simd.c: /tmp/cc-tDNx05.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-tDNx05.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-tDNx05.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-tDNx05.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-tDNx05.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-tDNx05.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-tDNx05.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-tDNx05.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-tDNx05.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-tDNx05.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-tDNx05.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-tDNx05.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-tDNx05.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-tDNx05.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-tDNx05.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-tDNx05.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-tDNx05.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-tDNx05.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-tDNx05.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-tDNx05.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-tDNx05.s:298: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-tDNx05.s:298: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/opt
Compiler: clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: clang -O3 -fwrapv -mavx -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '+' is not a recognized feature for this target (ignoring feature)
hash.c: /tmp/cc-7hyNWB.s: Assembler messages:
hash.c: /tmp/cc-7hyNWB.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-7hyNWB.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-7hyNWB.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-7hyNWB.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-7hyNWB.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-7hyNWB.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '+' is not a recognized feature for this target (ignoring feature)
simd.c: /tmp/cc-GVfdeW.s: Assembler messages:
simd.c: /tmp/cc-GVfdeW.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GVfdeW.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-GVfdeW.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GVfdeW.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-GVfdeW.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GVfdeW.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-GVfdeW.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GVfdeW.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-GVfdeW.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GVfdeW.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-GVfdeW.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GVfdeW.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-GVfdeW.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GVfdeW.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-GVfdeW.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GVfdeW.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-GVfdeW.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GVfdeW.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-GVfdeW.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GVfdeW.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-GVfdeW.s:298: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GVfdeW.s:298: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: clang -O3 -fwrapv -mavx -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '+' is not a recognized feature for this target (ignoring feature)
hash.c: /tmp/cc-ZXzYdd.s: Assembler messages:
hash.c: /tmp/cc-ZXzYdd.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-ZXzYdd.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-ZXzYdd.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-ZXzYdd.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-ZXzYdd.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-ZXzYdd.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '+' is not a recognized feature for this target (ignoring feature)
simd.c: /tmp/cc-bEoebm.s: Assembler messages:
simd.c: /tmp/cc-bEoebm.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-bEoebm.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-bEoebm.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-bEoebm.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-bEoebm.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-bEoebm.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-bEoebm.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-bEoebm.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-bEoebm.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-bEoebm.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-bEoebm.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-bEoebm.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-bEoebm.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-bEoebm.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-bEoebm.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-bEoebm.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-bEoebm.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-bEoebm.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-bEoebm.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-bEoebm.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-bEoebm.s:298: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-bEoebm.s:298: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/ref
Compiler: clang -O3 -fwrapv -mavx -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd512/opt
Compiler: clang -O3 -fwrapv -mavx -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd512/vect128
Compiler: clang -O3 -fwrapv -mavx -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd512/opt
Compiler: clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd512/vect128
Compiler: clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '+' is not a recognized feature for this target (ignoring feature)
hash.c: /tmp/cc-Ezeczk.s: Assembler messages:
hash.c: /tmp/cc-Ezeczk.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-Ezeczk.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-Ezeczk.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-Ezeczk.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-Ezeczk.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-Ezeczk.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '+' is not a recognized feature for this target (ignoring feature)
simd.c: /tmp/cc-GXUSFu.s: Assembler messages:
simd.c: /tmp/cc-GXUSFu.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GXUSFu.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-GXUSFu.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GXUSFu.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-GXUSFu.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GXUSFu.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-GXUSFu.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GXUSFu.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-GXUSFu.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GXUSFu.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-GXUSFu.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GXUSFu.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-GXUSFu.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GXUSFu.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-GXUSFu.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GXUSFu.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-GXUSFu.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GXUSFu.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-GXUSFu.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GXUSFu.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-GXUSFu.s:298: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-GXUSFu.s:298: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '+' is not a recognized feature for this target (ignoring feature)
hash.c: /tmp/cc-jJ3IBf.s: Assembler messages:
hash.c: /tmp/cc-jJ3IBf.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-jJ3IBf.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-jJ3IBf.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-jJ3IBf.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-jJ3IBf.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-jJ3IBf.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '+' is not a recognized feature for this target (ignoring feature)
simd.c: /tmp/cc-JoKsno.s: Assembler messages:
simd.c: /tmp/cc-JoKsno.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JoKsno.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JoKsno.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JoKsno.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JoKsno.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JoKsno.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JoKsno.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JoKsno.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JoKsno.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JoKsno.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JoKsno.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JoKsno.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JoKsno.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JoKsno.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JoKsno.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JoKsno.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JoKsno.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JoKsno.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JoKsno.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JoKsno.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JoKsno.s:298: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JoKsno.s:298: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/ref
Compiler: clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: gcc -O2 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 3978240 bytes after a total of 3497984 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -O2 -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: gcc -O3 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 1784160 bytes after a total of 3502080 bytes

Number of similar (compiler,implementation) pairs: 3, namely:

Compiler	Implementations
gcc -O3 -fomit-frame-pointer	sphlib
gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer	sphlib
gcc -funroll-loops -mabi=32 -O3 -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: gcc -O3 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 8041320 bytes after a total of 3608576 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -O3 -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: gcc -O -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 392 bytes after a total of 5713920 bytes

Number of similar (compiler,implementation) pairs: 2, namely:

Compiler	Implementations
gcc -O -fomit-frame-pointer	sphlib
gcc -mabi=32 -O -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: gcc -Os -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 116088 bytes after a total of 5361664 bytes

Number of similar (compiler,implementation) pairs: 2, namely:

Compiler	Implementations
gcc -Os -fomit-frame-pointer	sphlib
gcc -mabi=32 -Os -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: gcc -fno-schedule-insns -O2 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 3978240 bytes after a total of 3489792 bytes

Number of similar (compiler,implementation) pairs: 2, namely:

Compiler	Implementations
gcc -fno-schedule-insns -O2 -fomit-frame-pointer	sphlib
gcc -mabi=32 -O2 -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: gcc -fno-schedule-insns -O3 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 1784160 bytes after a total of 3252224 bytes

Number of similar (compiler,implementation) pairs: 3, namely:

Compiler	Implementations
gcc -fno-schedule-insns -O3 -fomit-frame-pointer	sphlib
gcc -funroll-loops -O3 -fomit-frame-pointer	sphlib
gcc -mabi=32 -O3 -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: gcc -fno-schedule-insns -O3 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 8041320 bytes after a total of 3588096 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -fno-schedule-insns -O3 -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: gcc -fno-schedule-insns -O -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 392 bytes after a total of 5718016 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -fno-schedule-insns -O -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: gcc -fno-schedule-insns -Os -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 4072 bytes after a total of 5439488 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -fno-schedule-insns -Os -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: gcc -funroll-loops -O2 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 3978240 bytes after a total of 3354624 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -funroll-loops -O2 -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: gcc -funroll-loops -O2 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 8041320 bytes after a total of 3637248 bytes

Number of similar (compiler,implementation) pairs: 2, namely:

Compiler	Implementations
gcc -funroll-loops -O2 -fomit-frame-pointer	sphlib-small
gcc -funroll-loops -mabi=32 -O2 -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: gcc -funroll-loops -O3 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 8041320 bytes after a total of 3555328 bytes

Number of similar (compiler,implementation) pairs: 2, namely:

Compiler	Implementations
gcc -funroll-loops -O3 -fomit-frame-pointer	sphlib-small
gcc -funroll-loops -mabi=32 -O3 -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: gcc -funroll-loops -O -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 3978240 bytes after a total of 2908160 bytes

Number of similar (compiler,implementation) pairs: 3, namely:

Compiler	Implementations
gcc -funroll-loops -O -fomit-frame-pointer	sphlib
gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer	sphlib
gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: gcc -funroll-loops -O -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 8097600 bytes after a total of 3637248 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -funroll-loops -O -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: gcc -funroll-loops -Os -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 212 bytes after a total of 5517312 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -funroll-loops -Os -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 3978240 bytes after a total of 3358720 bytes

Number of similar (compiler,implementation) pairs: 2, namely:

Compiler	Implementations
gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer	sphlib
gcc -funroll-loops -mabi=32 -O2 -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 8041320 bytes after a total of 3571712 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 8041320 bytes after a total of 3502080 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 8097600 bytes after a total of 3723264 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 4808 bytes after a total of 5517312 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 8097600 bytes after a total of 3674112 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd512/sphlib
Compiler: gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 204 bytes after a total of 5509120 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd512/sphlib-small
Compiler: gcc -mabi=32 -O3 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 8041320 bytes after a total of 3584000 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -mabi=32 -O3 -fomit-frame-pointer	sphlib-small