Implementation notes: mipso32, h1mips, crypto_hash/simd256

Computer: h1mips
Architecture: mipso32
CPU ID: unknown CPU ID
SUPERCOP version: 20140622
Operation: crypto_hash
Primitive: simd256

Time	Implementation	Compiler	Benchmark date	SUPERCOP version
395628	`sphlib-small`	`gcc -fno-schedule-insns -Os -fomit-frame-pointer`	20140528	20140525
396134	`sphlib-small`	`gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer`	20140528	20140525
400474	`sphlib-small`	`gcc -fno-schedule-insns -O2 -fomit-frame-pointer`	20140528	20140525
403004	`opt`	`gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer`	20140528	20140525
403914	`sphlib-small`	`gcc -mabi=32 -Os -fomit-frame-pointer`	20140528	20140525
404210	`opt`	`gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer`	20140528	20140525
405678	`sphlib-small`	`gcc -funroll-loops -Os -fomit-frame-pointer`	20140528	20140525
405678	`sphlib-small`	`gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer`	20140528	20140525
406466	`sphlib-small`	`gcc -Os -fomit-frame-pointer`	20140528	20140525
410076	`sphlib-small`	`gcc -O2 -fomit-frame-pointer`	20140528	20140525
410432	`opt`	`gcc -funroll-loops -mabi=32 -O2 -fomit-frame-pointer`	20140528	20140525
410536	`opt`	`gcc -funroll-loops -O2 -fomit-frame-pointer`	20140528	20140525
410556	`opt`	`gcc -funroll-loops -mabi=32 -O3 -fomit-frame-pointer`	20140528	20140525
410642	`opt`	`gcc -funroll-loops -O3 -fomit-frame-pointer`	20140528	20140525
412540	`sphlib-small`	`gcc -mabi=32 -O2 -fomit-frame-pointer`	20140528	20140525
415590	`opt`	`gcc -fno-schedule-insns -O3 -fomit-frame-pointer`	20140528	20140525
427276	`opt`	`gcc -mabi=32 -O3 -fomit-frame-pointer`	20140528	20140525
431860	`opt`	`gcc -O3 -fomit-frame-pointer`	20140528	20140525
477026	`sphlib-small`	`gcc -fno-schedule-insns -O -fomit-frame-pointer`	20140528	20140525
477034	`sphlib-small`	`gcc -O -fomit-frame-pointer`	20140528	20140525
478594	`sphlib-small`	`gcc -mabi=32 -O -fomit-frame-pointer`	20140528	20140525
527610	`opt`	`gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer`	20140528	20140525
527936	`opt`	`gcc -funroll-loops -O -fomit-frame-pointer`	20140528	20140525
527944	`opt`	`gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer`	20140528	20140525
534102	`opt`	`gcc -fno-schedule-insns -O2 -fomit-frame-pointer`	20140528	20140525
534672	`opt`	`gcc -mabi=32 -O2 -fomit-frame-pointer`	20140528	20140525
534782	`opt`	`gcc -O2 -fomit-frame-pointer`	20140528	20140525
616782	`opt`	`gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer`	20140528	20140525
620792	`opt`	`gcc -funroll-loops -Os -fomit-frame-pointer`	20140528	20140525
621090	`opt`	`gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer`	20140528	20140525
621696	`opt`	`gcc -fno-schedule-insns -Os -fomit-frame-pointer`	20140528	20140525
625000	`opt`	`gcc -mabi=32 -Os -fomit-frame-pointer`	20140528	20140525
625148	`opt`	`gcc -Os -fomit-frame-pointer`	20140528	20140525
642228	`opt`	`gcc -O -fomit-frame-pointer`	20140528	20140525
642278	`opt`	`gcc -mabi=32 -O -fomit-frame-pointer`	20140528	20140525
642308	`opt`	`gcc -fno-schedule-insns -O -fomit-frame-pointer`	20140528	20140525
1296036	`sphlib-small`	`gcc -funroll-loops`	20140528	20140525
1296172	`sphlib-small`	`cc`	20140528	20140525
1296440	`sphlib-small`	`gcc`	20140528	20140525
2309622	`opt`	`gcc`	20140528	20140525
2309828	`opt`	`gcc -funroll-loops`	20140528	20140525
2310394	`opt`	`cc`	20140528	20140525
11275820	`ref`	`gcc -funroll-loops -O3 -fomit-frame-pointer`	20140528	20140525
11276076	`ref`	`gcc -funroll-loops -mabi=32 -O3 -fomit-frame-pointer`	20140528	20140525
11374600	`ref`	`gcc -funroll-loops -mabi=32 -O2 -fomit-frame-pointer`	20140528	20140525
11374688	`ref`	`gcc -funroll-loops -O2 -fomit-frame-pointer`	20140528	20140525
11555754	`ref`	`gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer`	20140528	20140525
11658092	`ref`	`gcc -fno-schedule-insns -O3 -fomit-frame-pointer`	20140528	20140525
11660612	`ref`	`gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer`	20140528	20140525
11694036	`ref`	`gcc -mabi=32 -O3 -fomit-frame-pointer`	20140528	20140525
11694092	`ref`	`gcc -O3 -fomit-frame-pointer`	20140528	20140525
11769454	`ref`	`gcc -fno-schedule-insns -O2 -fomit-frame-pointer`	20140528	20140525
11800644	`ref`	`gcc -mabi=32 -O2 -fomit-frame-pointer`	20140528	20140525
11801058	`ref`	`gcc -O2 -fomit-frame-pointer`	20140528	20140525
11821932	`ref`	`gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer`	20140528	20140525
11830852	`ref`	`gcc -fno-schedule-insns -Os -fomit-frame-pointer`	20140528	20140525
11850020	`ref`	`gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer`	20140528	20140525
11850490	`ref`	`gcc -funroll-loops -Os -fomit-frame-pointer`	20140528	20140525
11854102	`ref`	`gcc -Os -fomit-frame-pointer`	20140528	20140525
11854986	`ref`	`gcc -mabi=32 -Os -fomit-frame-pointer`	20140528	20140525
11875534	`ref`	`gcc -O -fomit-frame-pointer`	20140528	20140525
11875674	`ref`	`gcc -fno-schedule-insns -O -fomit-frame-pointer`	20140528	20140525
11876384	`ref`	`gcc -mabi=32 -O -fomit-frame-pointer`	20140528	20140525
11877808	`ref`	`gcc -funroll-loops -O -fomit-frame-pointer`	20140528	20140525
11877928	`ref`	`gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer`	20140528	20140525
11877960	`ref`	`gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer`	20140528	20140525
21132260	`ref`	`gcc`	20140528	20140525
21132412	`ref`	`gcc -funroll-loops`	20140528	20140525
21132434	`ref`	`cc`	20140528	20140525

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: cc

simd.c:
simd.c: cc1: out of memory allocating 20808 bytes after a total of 5345280 bytes

Number of similar (compiler,implementation) pairs: 3, namely:

Compiler	Implementations
cc	sphlib
gcc	sphlib
gcc -funroll-loops	sphlib

Compiler output

Implementation: crypto_hash/simd256/vect128
Compiler: cc

vector.c: In file included from vector.c:5:
vector.c: vector.h:252:2: error: #error "I don't know how to vectorize on this architecture."
vector.c: In file included from vector.c:5:
vector.c: vector.h:344: error: array type has incomplete element type
vector.c: vector.h:355: error: array type has incomplete element type
vector.c: vector.h:367: error: array type has incomplete element type
vector.c: vector.c:24: error: variable 'V128' has initializer but incomplete type
vector.c: vector.c:25: error: variable 'V255' has initializer but incomplete type
vector.c: vector.c:26: error: variable 'V257' has initializer but incomplete type
vector.c: vector.c:27: error: variable 'V0' has initializer but incomplete type
vector.c: vector.c: In function 'fft64':
vector.c: vector.c:63: error: 'v16' undeclared (first use in this function)
vector.c: vector.c:63: error: (Each undeclared identifier is reported only once
vector.c: vector.c:63: error: for each function it appears in.)
vector.c: vector.c:63: error: expected expression before 'const'
vector.c: vector.c:65: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'X0'
vector.c: vector.c:65: error: 'X0' undeclared (first use in this function)
vector.c: vector.c:65: error: 'X1' undeclared (first use in this function)
vector.c: vector.c:65: error: 'X2' undeclared (first use in this function)
vector.c: vector.c:65: error: 'X3' undeclared (first use in this function)
vector.c: vector.c:65: error: 'X4' undeclared (first use in this function)
vector.c: vector.c:65: error: 'X5' undeclared (first use in this function)
vector.c: vector.c:65: error: 'X6' undeclared (first use in this function)
vector.c: vector.c:65: error: 'X7' undeclared (first use in this function)
vector.c: vector.c:75: error: 'A' undeclared (first use in this function)
vector.c: ...

Number of similar (compiler,implementation) pairs: 27, namely:

Compiler	Implementations
cc	vect128
gcc	vect128
gcc -O2 -fomit-frame-pointer	vect128
gcc -O3 -fomit-frame-pointer	vect128
gcc -O -fomit-frame-pointer	vect128
gcc -Os -fomit-frame-pointer	vect128
gcc -fno-schedule-insns -O2 -fomit-frame-pointer	vect128
gcc -fno-schedule-insns -O3 -fomit-frame-pointer	vect128
gcc -fno-schedule-insns -O -fomit-frame-pointer	vect128
gcc -fno-schedule-insns -Os -fomit-frame-pointer	vect128
gcc -funroll-loops	vect128
gcc -funroll-loops -O2 -fomit-frame-pointer	vect128
gcc -funroll-loops -O3 -fomit-frame-pointer	vect128
gcc -funroll-loops -O -fomit-frame-pointer	vect128
gcc -funroll-loops -Os -fomit-frame-pointer	vect128
gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer	vect128
gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer	vect128
gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer	vect128
gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer	vect128
gcc -funroll-loops -mabi=32 -O2 -fomit-frame-pointer	vect128
gcc -funroll-loops -mabi=32 -O3 -fomit-frame-pointer	vect128
gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer	vect128
gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer	vect128
gcc -mabi=32 -O2 -fomit-frame-pointer	vect128
gcc -mabi=32 -O3 -fomit-frame-pointer	vect128
gcc -mabi=32 -O -fomit-frame-pointer	vect128
gcc -mabi=32 -Os -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd256/ref
Compiler: clang -O3 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: clang -O3 -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '+' is not a recognized feature for this target (ignoring feature)
hash.c: /tmp/cc-BFAsza.s: Assembler messages:
hash.c: /tmp/cc-BFAsza.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-BFAsza.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-BFAsza.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-BFAsza.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-BFAsza.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-BFAsza.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '+' is not a recognized feature for this target (ignoring feature)
simd.c: /tmp/cc-r0MMPl.s: Assembler messages:
simd.c: /tmp/cc-r0MMPl.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-r0MMPl.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-r0MMPl.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-r0MMPl.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-r0MMPl.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-r0MMPl.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-r0MMPl.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-r0MMPl.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-r0MMPl.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-r0MMPl.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-r0MMPl.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-r0MMPl.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-r0MMPl.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-r0MMPl.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-r0MMPl.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-r0MMPl.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-r0MMPl.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-r0MMPl.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-r0MMPl.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-r0MMPl.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-r0MMPl.s:298: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-r0MMPl.s:298: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/opt
Compiler: clang -O3 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd256/vect128
Compiler: clang -O3 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: clang -O3 -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '+' is not a recognized feature for this target (ignoring feature)
hash.c: /tmp/cc-dzwJXd.s: Assembler messages:
hash.c: /tmp/cc-dzwJXd.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-dzwJXd.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-dzwJXd.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-dzwJXd.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-dzwJXd.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-dzwJXd.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '+' is not a recognized feature for this target (ignoring feature)
simd.c: /tmp/cc-PMbFmp.s: Assembler messages:
simd.c: /tmp/cc-PMbFmp.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-PMbFmp.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-PMbFmp.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-PMbFmp.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-PMbFmp.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-PMbFmp.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-PMbFmp.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-PMbFmp.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-PMbFmp.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-PMbFmp.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-PMbFmp.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-PMbFmp.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-PMbFmp.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-PMbFmp.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-PMbFmp.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-PMbFmp.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-PMbFmp.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-PMbFmp.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-PMbFmp.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-PMbFmp.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-PMbFmp.s:298: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-PMbFmp.s:298: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/vect128
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd256/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-XXvypz.s: Assembler messages:
hash.c: /tmp/cc-XXvypz.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-XXvypz.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-XXvypz.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-XXvypz.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-XXvypz.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-XXvypz.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-msVkMU.s: Assembler messages:
simd.c: /tmp/cc-msVkMU.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-msVkMU.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-msVkMU.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-msVkMU.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-msVkMU.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-msVkMU.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-msVkMU.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-msVkMU.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-msVkMU.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-msVkMU.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-msVkMU.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-msVkMU.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-msVkMU.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-msVkMU.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-msVkMU.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-msVkMU.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-msVkMU.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-msVkMU.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-msVkMU.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-msVkMU.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/opt
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-ti4rHA.s: Assembler messages:
hash.c: /tmp/cc-ti4rHA.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-ti4rHA.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-ti4rHA.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-ti4rHA.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-ti4rHA.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-ti4rHA.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-c0Qu3U.s: Assembler messages:
simd.c: /tmp/cc-c0Qu3U.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-c0Qu3U.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-c0Qu3U.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-c0Qu3U.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-c0Qu3U.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-c0Qu3U.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-c0Qu3U.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-c0Qu3U.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-c0Qu3U.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-c0Qu3U.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-c0Qu3U.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-c0Qu3U.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-c0Qu3U.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-c0Qu3U.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-c0Qu3U.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-c0Qu3U.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-c0Qu3U.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-c0Qu3U.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-c0Qu3U.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-c0Qu3U.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/vect128
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	vect128

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-GU14vy.s: Assembler messages:
hash.c: /tmp/cc-GU14vy.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-GU14vy.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-GU14vy.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-GU14vy.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-GU14vy.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-GU14vy.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-XaWOBU.s: Assembler messages:
simd.c: /tmp/cc-XaWOBU.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-XaWOBU.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-XaWOBU.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-XaWOBU.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-XaWOBU.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-XaWOBU.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-XaWOBU.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-XaWOBU.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-XaWOBU.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-XaWOBU.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-XaWOBU.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-XaWOBU.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-XaWOBU.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-XaWOBU.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-XaWOBU.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-XaWOBU.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-XaWOBU.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-XaWOBU.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-XaWOBU.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-XaWOBU.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-MbIIgb.s: Assembler messages:
hash.c: /tmp/cc-MbIIgb.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-MbIIgb.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-MbIIgb.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-MbIIgb.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-MbIIgb.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-MbIIgb.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-LTaoIv.s: Assembler messages:
simd.c: /tmp/cc-LTaoIv.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-LTaoIv.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-LTaoIv.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-LTaoIv.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-LTaoIv.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-LTaoIv.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-LTaoIv.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-LTaoIv.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-LTaoIv.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-LTaoIv.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-LTaoIv.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-LTaoIv.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-LTaoIv.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-LTaoIv.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-LTaoIv.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-LTaoIv.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-LTaoIv.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-LTaoIv.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-LTaoIv.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-LTaoIv.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	sphlib

Compiler output

Implementation: crypto_hash/simd256/opt
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	opt

Compiler output

Implementation: crypto_hash/simd256/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_hash/simd256/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-81BCeC.s: Assembler messages:
hash.c: /tmp/cc-81BCeC.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-81BCeC.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-81BCeC.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-81BCeC.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-81BCeC.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-81BCeC.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-rVlLFW.s: Assembler messages:
simd.c: /tmp/cc-rVlLFW.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-rVlLFW.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-rVlLFW.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-rVlLFW.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-rVlLFW.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-rVlLFW.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-rVlLFW.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-rVlLFW.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-rVlLFW.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-rVlLFW.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-rVlLFW.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-rVlLFW.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-rVlLFW.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-rVlLFW.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-rVlLFW.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-rVlLFW.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-rVlLFW.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-rVlLFW.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-rVlLFW.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-rVlLFW.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/vect128
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd256/opt
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-vDeaIR.s: Assembler messages:
hash.c: /tmp/cc-vDeaIR.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-vDeaIR.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-vDeaIR.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-vDeaIR.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-vDeaIR.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-vDeaIR.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-2V9E1c.s: Assembler messages:
simd.c: /tmp/cc-2V9E1c.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-2V9E1c.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-2V9E1c.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-2V9E1c.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-2V9E1c.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-2V9E1c.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-2V9E1c.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-2V9E1c.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-2V9E1c.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-2V9E1c.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-2V9E1c.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-2V9E1c.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-2V9E1c.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-2V9E1c.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-2V9E1c.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-2V9E1c.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-2V9E1c.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-2V9E1c.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-2V9E1c.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-2V9E1c.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/vect128
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	vect128

Compiler output

Implementation: crypto_hash/simd256/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-pQYDMD.s: Assembler messages:
hash.c: /tmp/cc-pQYDMD.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-pQYDMD.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-pQYDMD.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-pQYDMD.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-pQYDMD.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-pQYDMD.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-CxxpcV.s: Assembler messages:
simd.c: /tmp/cc-CxxpcV.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-CxxpcV.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-CxxpcV.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-CxxpcV.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-CxxpcV.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-CxxpcV.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-CxxpcV.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-CxxpcV.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-CxxpcV.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-CxxpcV.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-CxxpcV.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-CxxpcV.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-CxxpcV.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-CxxpcV.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-CxxpcV.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-CxxpcV.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-CxxpcV.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-CxxpcV.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-CxxpcV.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-CxxpcV.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/opt
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	opt

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-xURqmp.s: Assembler messages:
hash.c: /tmp/cc-xURqmp.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-xURqmp.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-xURqmp.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-xURqmp.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-xURqmp.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-xURqmp.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-mI2GyJ.s: Assembler messages:
simd.c: /tmp/cc-mI2GyJ.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-mI2GyJ.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-mI2GyJ.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-mI2GyJ.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-mI2GyJ.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-mI2GyJ.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-mI2GyJ.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-mI2GyJ.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-mI2GyJ.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-mI2GyJ.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-mI2GyJ.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-mI2GyJ.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-mI2GyJ.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-mI2GyJ.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-mI2GyJ.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-mI2GyJ.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-mI2GyJ.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-mI2GyJ.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-mI2GyJ.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-mI2GyJ.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	sphlib

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-1chp9z.s: Assembler messages:
hash.c: /tmp/cc-1chp9z.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-1chp9z.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-1chp9z.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-1chp9z.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-1chp9z.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-1chp9z.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-oHUNPW.s: Assembler messages:
simd.c: /tmp/cc-oHUNPW.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-oHUNPW.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-oHUNPW.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-oHUNPW.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-oHUNPW.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-oHUNPW.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-oHUNPW.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-oHUNPW.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-oHUNPW.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-oHUNPW.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-oHUNPW.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-oHUNPW.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-oHUNPW.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-oHUNPW.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-oHUNPW.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-oHUNPW.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-oHUNPW.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-oHUNPW.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-oHUNPW.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-oHUNPW.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-JVXoOz.s: Assembler messages:
hash.c: /tmp/cc-JVXoOz.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-JVXoOz.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-JVXoOz.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-JVXoOz.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-JVXoOz.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-JVXoOz.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-SJci3T.s: Assembler messages:
simd.c: /tmp/cc-SJci3T.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-SJci3T.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-SJci3T.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-SJci3T.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-SJci3T.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-SJci3T.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-SJci3T.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-SJci3T.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-SJci3T.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-SJci3T.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-SJci3T.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-SJci3T.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-SJci3T.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-SJci3T.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-SJci3T.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-SJci3T.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-SJci3T.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-SJci3T.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-SJci3T.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-SJci3T.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/vect128
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd256/opt
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-5aiRJD.s: Assembler messages:
hash.c: /tmp/cc-5aiRJD.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-5aiRJD.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-5aiRJD.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-5aiRJD.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-5aiRJD.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-5aiRJD.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-8ASGKV.s: Assembler messages:
simd.c: /tmp/cc-8ASGKV.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-8ASGKV.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-8ASGKV.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-8ASGKV.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-8ASGKV.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-8ASGKV.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-8ASGKV.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-8ASGKV.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-8ASGKV.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-8ASGKV.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-8ASGKV.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-8ASGKV.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-8ASGKV.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-8ASGKV.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-8ASGKV.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-8ASGKV.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-8ASGKV.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-8ASGKV.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-8ASGKV.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-8ASGKV.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/opt
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	opt

Compiler output

Implementation: crypto_hash/simd256/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-fWHtob.s: Assembler messages:
hash.c: /tmp/cc-fWHtob.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-fWHtob.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-fWHtob.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-fWHtob.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-fWHtob.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-fWHtob.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-ngPoWj.s: Assembler messages:
simd.c: /tmp/cc-ngPoWj.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-ngPoWj.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-ngPoWj.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-ngPoWj.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-ngPoWj.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-ngPoWj.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-ngPoWj.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-ngPoWj.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-ngPoWj.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-ngPoWj.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-ngPoWj.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-ngPoWj.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-ngPoWj.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-ngPoWj.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-ngPoWj.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-ngPoWj.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-ngPoWj.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-ngPoWj.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-ngPoWj.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-ngPoWj.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	sphlib

Compiler output

Implementation: crypto_hash/simd256/vect128
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	vect128

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-18PYmi.s: Assembler messages:
hash.c: /tmp/cc-18PYmi.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-18PYmi.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-18PYmi.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-18PYmi.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-18PYmi.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-18PYmi.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-WnsDOD.s: Assembler messages:
simd.c: /tmp/cc-WnsDOD.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WnsDOD.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WnsDOD.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WnsDOD.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WnsDOD.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WnsDOD.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WnsDOD.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WnsDOD.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WnsDOD.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WnsDOD.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WnsDOD.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WnsDOD.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WnsDOD.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WnsDOD.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WnsDOD.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WnsDOD.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WnsDOD.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WnsDOD.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WnsDOD.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WnsDOD.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd256/opt
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd256/vect128
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-phYdmN.s: Assembler messages:
hash.c: /tmp/cc-phYdmN.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-phYdmN.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-phYdmN.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-phYdmN.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-phYdmN.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-phYdmN.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-650814.s: Assembler messages:
simd.c: /tmp/cc-650814.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-650814.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-650814.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-650814.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-650814.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-650814.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-650814.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-650814.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-650814.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-650814.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-650814.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-650814.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-650814.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-650814.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-650814.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-650814.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-650814.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-650814.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-650814.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-650814.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/vect128
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	vect128

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-OdtgvJ.s: Assembler messages:
hash.c: /tmp/cc-OdtgvJ.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-OdtgvJ.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-OdtgvJ.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-OdtgvJ.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-OdtgvJ.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-OdtgvJ.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-vnb9n6.s: Assembler messages:
simd.c: /tmp/cc-vnb9n6.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-vnb9n6.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-vnb9n6.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-vnb9n6.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-vnb9n6.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-vnb9n6.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-vnb9n6.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-vnb9n6.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-vnb9n6.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-vnb9n6.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-vnb9n6.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-vnb9n6.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-vnb9n6.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-vnb9n6.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-vnb9n6.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-vnb9n6.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-vnb9n6.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-vnb9n6.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-vnb9n6.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-vnb9n6.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-aqX5Cd.s: Assembler messages:
hash.c: /tmp/cc-aqX5Cd.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-aqX5Cd.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-aqX5Cd.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-aqX5Cd.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-aqX5Cd.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-aqX5Cd.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-LXIeRx.s: Assembler messages:
simd.c: /tmp/cc-LXIeRx.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-LXIeRx.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-LXIeRx.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-LXIeRx.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-LXIeRx.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-LXIeRx.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-LXIeRx.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-LXIeRx.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-LXIeRx.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-LXIeRx.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-LXIeRx.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-LXIeRx.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-LXIeRx.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-LXIeRx.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-LXIeRx.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-LXIeRx.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-LXIeRx.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-LXIeRx.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-LXIeRx.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-LXIeRx.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	sphlib

Compiler output

Implementation: crypto_hash/simd256/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_hash/simd256/opt
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	opt

Compiler output

Implementation: crypto_hash/simd256/ref
Compiler: clang -O3 -fwrapv -march=native -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd256/opt
Compiler: clang -O3 -fwrapv -march=native -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: clang -O3 -fwrapv -march=native -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-4vYyld.s: Assembler messages:
hash.c: /tmp/cc-4vYyld.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-4vYyld.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-4vYyld.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-4vYyld.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-4vYyld.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-4vYyld.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-zpR5cy.s: Assembler messages:
simd.c: /tmp/cc-zpR5cy.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-zpR5cy.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-zpR5cy.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-zpR5cy.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-zpR5cy.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-zpR5cy.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-zpR5cy.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-zpR5cy.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-zpR5cy.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-zpR5cy.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-zpR5cy.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-zpR5cy.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-zpR5cy.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-zpR5cy.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-zpR5cy.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-zpR5cy.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-zpR5cy.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-zpR5cy.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-zpR5cy.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-zpR5cy.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/vect128
Compiler: clang -O3 -fwrapv -march=native -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: clang -O3 -fwrapv -march=native -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-sVAHm4.s: Assembler messages:
hash.c: /tmp/cc-sVAHm4.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-sVAHm4.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-sVAHm4.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-sVAHm4.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-sVAHm4.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-sVAHm4.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-WZ8HMc.s: Assembler messages:
simd.c: /tmp/cc-WZ8HMc.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WZ8HMc.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WZ8HMc.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WZ8HMc.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WZ8HMc.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WZ8HMc.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WZ8HMc.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WZ8HMc.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WZ8HMc.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WZ8HMc.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WZ8HMc.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WZ8HMc.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WZ8HMc.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WZ8HMc.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WZ8HMc.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WZ8HMc.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WZ8HMc.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WZ8HMc.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WZ8HMc.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WZ8HMc.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/vect128
Compiler: clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd256/ref
Compiler: clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-g19k5b.s: Assembler messages:
hash.c: /tmp/cc-g19k5b.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-g19k5b.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-g19k5b.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-g19k5b.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-g19k5b.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-g19k5b.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-W7vtEp.s: Assembler messages:
simd.c: /tmp/cc-W7vtEp.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-W7vtEp.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-W7vtEp.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-W7vtEp.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-W7vtEp.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-W7vtEp.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-W7vtEp.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-W7vtEp.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-W7vtEp.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-W7vtEp.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-W7vtEp.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-W7vtEp.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-W7vtEp.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-W7vtEp.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-W7vtEp.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-W7vtEp.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-W7vtEp.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-W7vtEp.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-W7vtEp.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-W7vtEp.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: '+0' is not a recognized feature for this target (ignoring feature)
hash.c: '0' is not a recognized processor for this target (ignoring processor)
hash.c: /tmp/cc-uBS83Z.s: Assembler messages:
hash.c: /tmp/cc-uBS83Z.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-uBS83Z.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-uBS83Z.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-uBS83Z.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-uBS83Z.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-uBS83Z.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: '+0' is not a recognized feature for this target (ignoring feature)
simd.c: '0' is not a recognized processor for this target (ignoring processor)
simd.c: /tmp/cc-65Y5ha.s: Assembler messages:
simd.c: /tmp/cc-65Y5ha.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-65Y5ha.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-65Y5ha.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-65Y5ha.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-65Y5ha.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-65Y5ha.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-65Y5ha.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-65Y5ha.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-65Y5ha.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-65Y5ha.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-65Y5ha.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-65Y5ha.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-65Y5ha.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-65Y5ha.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-65Y5ha.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-65Y5ha.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-65Y5ha.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-65Y5ha.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-65Y5ha.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-65Y5ha.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/opt
Compiler: clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd256/vect128
Compiler: clang -O3 -fwrapv -mavx2 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd256/opt
Compiler: clang -O3 -fwrapv -mavx2 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd256/ref
Compiler: clang -O3 -fwrapv -mavx2 -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: clang -O3 -fwrapv -mavx2 -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '+' is not a recognized feature for this target (ignoring feature)
hash.c: /tmp/cc-nb2qxt.s: Assembler messages:
hash.c: /tmp/cc-nb2qxt.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-nb2qxt.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-nb2qxt.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-nb2qxt.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-nb2qxt.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-nb2qxt.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '+' is not a recognized feature for this target (ignoring feature)
simd.c: /tmp/cc-WB4guO.s: Assembler messages:
simd.c: /tmp/cc-WB4guO.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WB4guO.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WB4guO.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WB4guO.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WB4guO.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WB4guO.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WB4guO.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WB4guO.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WB4guO.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WB4guO.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WB4guO.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WB4guO.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WB4guO.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WB4guO.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WB4guO.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WB4guO.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WB4guO.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WB4guO.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WB4guO.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WB4guO.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-WB4guO.s:298: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-WB4guO.s:298: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: clang -O3 -fwrapv -mavx2 -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '+' is not a recognized feature for this target (ignoring feature)
hash.c: /tmp/cc-tPbXzh.s: Assembler messages:
hash.c: /tmp/cc-tPbXzh.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-tPbXzh.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-tPbXzh.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-tPbXzh.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-tPbXzh.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-tPbXzh.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '+' is not a recognized feature for this target (ignoring feature)
simd.c: /tmp/cc-8l3n3D.s: Assembler messages:
simd.c: /tmp/cc-8l3n3D.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-8l3n3D.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-8l3n3D.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-8l3n3D.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-8l3n3D.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-8l3n3D.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-8l3n3D.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-8l3n3D.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-8l3n3D.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-8l3n3D.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-8l3n3D.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-8l3n3D.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-8l3n3D.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-8l3n3D.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-8l3n3D.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-8l3n3D.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-8l3n3D.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-8l3n3D.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-8l3n3D.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-8l3n3D.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-8l3n3D.s:298: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-8l3n3D.s:298: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/opt
Compiler: clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd256/vect128
Compiler: clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd256/ref
Compiler: clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '+' is not a recognized feature for this target (ignoring feature)
hash.c: /tmp/cc-uuFZts.s: Assembler messages:
hash.c: /tmp/cc-uuFZts.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-uuFZts.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-uuFZts.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-uuFZts.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-uuFZts.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-uuFZts.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '+' is not a recognized feature for this target (ignoring feature)
simd.c: /tmp/cc-1YImXM.s: Assembler messages:
simd.c: /tmp/cc-1YImXM.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-1YImXM.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-1YImXM.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-1YImXM.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-1YImXM.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-1YImXM.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-1YImXM.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-1YImXM.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-1YImXM.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-1YImXM.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-1YImXM.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-1YImXM.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-1YImXM.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-1YImXM.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-1YImXM.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-1YImXM.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-1YImXM.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-1YImXM.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-1YImXM.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-1YImXM.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-1YImXM.s:298: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-1YImXM.s:298: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '+' is not a recognized feature for this target (ignoring feature)
hash.c: /tmp/cc-ylLCpT.s: Assembler messages:
hash.c: /tmp/cc-ylLCpT.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-ylLCpT.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-ylLCpT.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-ylLCpT.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-ylLCpT.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-ylLCpT.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '+' is not a recognized feature for this target (ignoring feature)
simd.c: /tmp/cc-JLqB2d.s: Assembler messages:
simd.c: /tmp/cc-JLqB2d.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JLqB2d.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JLqB2d.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JLqB2d.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JLqB2d.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JLqB2d.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JLqB2d.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JLqB2d.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JLqB2d.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JLqB2d.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JLqB2d.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JLqB2d.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JLqB2d.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JLqB2d.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JLqB2d.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JLqB2d.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JLqB2d.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JLqB2d.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JLqB2d.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JLqB2d.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JLqB2d.s:298: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JLqB2d.s:298: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/vect128
Compiler: clang -O3 -fwrapv -mavx -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd256/opt
Compiler: clang -O3 -fwrapv -mavx -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: clang -O3 -fwrapv -mavx -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '+' is not a recognized feature for this target (ignoring feature)
hash.c: /tmp/cc-FvNfNk.s: Assembler messages:
hash.c: /tmp/cc-FvNfNk.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-FvNfNk.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-FvNfNk.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-FvNfNk.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-FvNfNk.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-FvNfNk.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '+' is not a recognized feature for this target (ignoring feature)
simd.c: /tmp/cc-IKTMsD.s: Assembler messages:
simd.c: /tmp/cc-IKTMsD.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-IKTMsD.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-IKTMsD.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-IKTMsD.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-IKTMsD.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-IKTMsD.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-IKTMsD.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-IKTMsD.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-IKTMsD.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-IKTMsD.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-IKTMsD.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-IKTMsD.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-IKTMsD.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-IKTMsD.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-IKTMsD.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-IKTMsD.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-IKTMsD.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-IKTMsD.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-IKTMsD.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-IKTMsD.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-IKTMsD.s:298: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-IKTMsD.s:298: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/ref
Compiler: clang -O3 -fwrapv -mavx -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: clang -O3 -fwrapv -mavx -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '+' is not a recognized feature for this target (ignoring feature)
hash.c: /tmp/cc-hmDbub.s: Assembler messages:
hash.c: /tmp/cc-hmDbub.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-hmDbub.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-hmDbub.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-hmDbub.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-hmDbub.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-hmDbub.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '+' is not a recognized feature for this target (ignoring feature)
simd.c: /tmp/cc-hyfdPp.s: Assembler messages:
simd.c: /tmp/cc-hyfdPp.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hyfdPp.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-hyfdPp.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hyfdPp.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-hyfdPp.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hyfdPp.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-hyfdPp.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hyfdPp.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-hyfdPp.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hyfdPp.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-hyfdPp.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hyfdPp.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-hyfdPp.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hyfdPp.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-hyfdPp.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hyfdPp.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-hyfdPp.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hyfdPp.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-hyfdPp.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hyfdPp.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-hyfdPp.s:298: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hyfdPp.s:298: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/ref
Compiler: clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '+' is not a recognized feature for this target (ignoring feature)
hash.c: /tmp/cc-aRFotm.s: Assembler messages:
hash.c: /tmp/cc-aRFotm.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-aRFotm.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-aRFotm.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-aRFotm.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-aRFotm.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-aRFotm.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '+' is not a recognized feature for this target (ignoring feature)
simd.c: /tmp/cc-JCRd7G.s: Assembler messages:
simd.c: /tmp/cc-JCRd7G.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JCRd7G.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JCRd7G.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JCRd7G.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JCRd7G.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JCRd7G.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JCRd7G.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JCRd7G.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JCRd7G.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JCRd7G.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JCRd7G.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JCRd7G.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JCRd7G.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JCRd7G.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JCRd7G.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JCRd7G.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JCRd7G.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JCRd7G.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JCRd7G.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JCRd7G.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-JCRd7G.s:298: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-JCRd7G.s:298: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

hash.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
hash.c: '+' is not a recognized feature for this target (ignoring feature)
hash.c: /tmp/cc-c7lFHV.s: Assembler messages:
hash.c: /tmp/cc-c7lFHV.s:27: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-c7lFHV.s:27: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-c7lFHV.s:33: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-c7lFHV.s:33: Warning: Macro instruction expanded into multiple instructions
hash.c: /tmp/cc-c7lFHV.s:37: Warning: No .cprestore pseudo-op used in PIC code
hash.c: /tmp/cc-c7lFHV.s:37: Warning: Macro instruction expanded into multiple instructions
simd.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
simd.c: '+' is not a recognized feature for this target (ignoring feature)
simd.c: /tmp/cc-hScGig.s: Assembler messages:
simd.c: /tmp/cc-hScGig.s:23: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hScGig.s:23: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-hScGig.s:77: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hScGig.s:77: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-hScGig.s:89: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hScGig.s:89: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-hScGig.s:152: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hScGig.s:152: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-hScGig.s:158: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hScGig.s:158: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-hScGig.s:191: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hScGig.s:191: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-hScGig.s:197: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hScGig.s:197: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-hScGig.s:247: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hScGig.s:247: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-hScGig.s:260: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hScGig.s:260: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-hScGig.s:268: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hScGig.s:268: Warning: Macro instruction expanded into multiple instructions
simd.c: /tmp/cc-hScGig.s:298: Warning: No .cprestore pseudo-op used in PIC code
simd.c: /tmp/cc-hScGig.s:298: Warning: Macro instruction expanded into multiple instructions
simd.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/vect128
Compiler: clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	vect128

Compiler output

Implementation: crypto_hash/simd256/opt
Compiler: clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	opt

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: gcc -O2 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 3978240 bytes after a total of 3497984 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -O2 -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: gcc -O3 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 1784160 bytes after a total of 3502080 bytes

Number of similar (compiler,implementation) pairs: 3, namely:

Compiler	Implementations
gcc -O3 -fomit-frame-pointer	sphlib
gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer	sphlib
gcc -funroll-loops -mabi=32 -O3 -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: gcc -O3 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 8041320 bytes after a total of 3608576 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -O3 -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: gcc -O -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 392 bytes after a total of 5713920 bytes

Number of similar (compiler,implementation) pairs: 2, namely:

Compiler	Implementations
gcc -O -fomit-frame-pointer	sphlib
gcc -mabi=32 -O -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: gcc -Os -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 116088 bytes after a total of 5361664 bytes

Number of similar (compiler,implementation) pairs: 2, namely:

Compiler	Implementations
gcc -Os -fomit-frame-pointer	sphlib
gcc -mabi=32 -Os -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: gcc -fno-schedule-insns -O2 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 3978240 bytes after a total of 3489792 bytes

Number of similar (compiler,implementation) pairs: 2, namely:

Compiler	Implementations
gcc -fno-schedule-insns -O2 -fomit-frame-pointer	sphlib
gcc -mabi=32 -O2 -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: gcc -fno-schedule-insns -O3 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 1784160 bytes after a total of 3252224 bytes

Number of similar (compiler,implementation) pairs: 3, namely:

Compiler	Implementations
gcc -fno-schedule-insns -O3 -fomit-frame-pointer	sphlib
gcc -funroll-loops -O3 -fomit-frame-pointer	sphlib
gcc -mabi=32 -O3 -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: gcc -fno-schedule-insns -O3 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 8041320 bytes after a total of 3588096 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -fno-schedule-insns -O3 -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: gcc -fno-schedule-insns -O -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 392 bytes after a total of 5718016 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -fno-schedule-insns -O -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: gcc -fno-schedule-insns -Os -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 4072 bytes after a total of 5439488 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -fno-schedule-insns -Os -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: gcc -funroll-loops -O2 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 3978240 bytes after a total of 3354624 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -funroll-loops -O2 -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: gcc -funroll-loops -O2 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 8041320 bytes after a total of 3637248 bytes

Number of similar (compiler,implementation) pairs: 2, namely:

Compiler	Implementations
gcc -funroll-loops -O2 -fomit-frame-pointer	sphlib-small
gcc -funroll-loops -mabi=32 -O2 -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: gcc -funroll-loops -O3 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 8041320 bytes after a total of 3555328 bytes

Number of similar (compiler,implementation) pairs: 2, namely:

Compiler	Implementations
gcc -funroll-loops -O3 -fomit-frame-pointer	sphlib-small
gcc -funroll-loops -mabi=32 -O3 -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: gcc -funroll-loops -O -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 3978240 bytes after a total of 2908160 bytes

Number of similar (compiler,implementation) pairs: 3, namely:

Compiler	Implementations
gcc -funroll-loops -O -fomit-frame-pointer	sphlib
gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer	sphlib
gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: gcc -funroll-loops -O -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 8097600 bytes after a total of 3637248 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -funroll-loops -O -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: gcc -funroll-loops -Os -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 212 bytes after a total of 5517312 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -funroll-loops -Os -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 3978240 bytes after a total of 3358720 bytes

Number of similar (compiler,implementation) pairs: 2, namely:

Compiler	Implementations
gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer	sphlib
gcc -funroll-loops -mabi=32 -O2 -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 8041320 bytes after a total of 3571712 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 8041320 bytes after a total of 3502080 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 8097600 bytes after a total of 3723264 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 4808 bytes after a total of 5517312 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 8097600 bytes after a total of 3674112 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer	sphlib-small

Compiler output

Implementation: crypto_hash/simd256/sphlib
Compiler: gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 204 bytes after a total of 5509120 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer	sphlib

Compiler output

Implementation: crypto_hash/simd256/sphlib-small
Compiler: gcc -mabi=32 -O3 -fomit-frame-pointer

simd.c:
simd.c: cc1: out of memory allocating 8041320 bytes after a total of 3584000 bytes

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -mabi=32 -O3 -fomit-frame-pointer	sphlib-small