Implementation notes: mipso32, h1mips, crypto_aead/omdsha512k512n256tau256v1

Computer: h1mips
Architecture: mipso32
CPU ID: unknown CPU ID
SUPERCOP version: 20140622
Operation: crypto_aead
Primitive: omdsha512k512n256tau256v1

Time	Implementation	Compiler	Benchmark date	SUPERCOP version
1359356	`ref`	`gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer`	20140602	20140525
1361702	`ref`	`gcc -fno-schedule-insns -O3 -fomit-frame-pointer`	20140602	20140525
1451922	`ref`	`gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer`	20140602	20140525
1471596	`ref`	`gcc -fno-schedule-insns -O2 -fomit-frame-pointer`	20140602	20140525
1519746	`ref`	`gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer`	20140602	20140525
1521792	`ref`	`gcc -fno-schedule-insns -Os -fomit-frame-pointer`	20140602	20140525
1540144	`ref`	`gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer`	20140602	20140525
1540158	`ref`	`gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer`	20140602	20140525
1540172	`ref`	`gcc -funroll-loops -O -fomit-frame-pointer`	20140602	20140525
1556372	`ref`	`gcc -mabi=32 -O -fomit-frame-pointer`	20140602	20140525
1556394	`ref`	`gcc -fno-schedule-insns -O -fomit-frame-pointer`	20140602	20140525
1556564	`ref`	`gcc -O -fomit-frame-pointer`	20140602	20140525
1649166	`ref`	`gcc -funroll-loops -mabi=32 -O3 -fomit-frame-pointer`	20140602	20140525
1649354	`ref`	`gcc -funroll-loops -O3 -fomit-frame-pointer`	20140602	20140525
1650642	`ref`	`gcc -mabi=32 -O3 -fomit-frame-pointer`	20140602	20140525
1650768	`ref`	`gcc -O3 -fomit-frame-pointer`	20140602	20140525
1748422	`ref`	`gcc -funroll-loops -mabi=32 -O2 -fomit-frame-pointer`	20140602	20140525
1749006	`ref`	`gcc -funroll-loops -O2 -fomit-frame-pointer`	20140602	20140525
1770456	`ref`	`gcc -mabi=32 -O2 -fomit-frame-pointer`	20140602	20140525
1780838	`ref`	`gcc -O2 -fomit-frame-pointer`	20140602	20140525
1902634	`ref`	`gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer`	20140602	20140525
1912820	`ref`	`gcc -funroll-loops -Os -fomit-frame-pointer`	20140602	20140525
1913014	`ref`	`gcc -mabi=32 -Os -fomit-frame-pointer`	20140602	20140525
1913520	`ref`	`gcc -Os -fomit-frame-pointer`	20140602	20140525
4615906	`ref`	`gcc -funroll-loops`	20140602	20140525
4615914	`ref`	`cc`	20140602	20140525
4615962	`ref`	`gcc`	20140602	20140525

Compiler output

Implementation: crypto_aead/omdsha512k512n256tau256v1/ref
Compiler: cc

sha512.c: sha512.c: In function 'sha512_comp':
sha512.c: sha512.c:206: warning: initialization from incompatible pointer type

Number of similar (compiler,implementation) pairs: 27, namely:

Compiler	Implementations
cc	ref
gcc	ref
gcc -O2 -fomit-frame-pointer	ref
gcc -O3 -fomit-frame-pointer	ref
gcc -O -fomit-frame-pointer	ref
gcc -Os -fomit-frame-pointer	ref
gcc -fno-schedule-insns -O2 -fomit-frame-pointer	ref
gcc -fno-schedule-insns -O3 -fomit-frame-pointer	ref
gcc -fno-schedule-insns -O -fomit-frame-pointer	ref
gcc -fno-schedule-insns -Os -fomit-frame-pointer	ref
gcc -funroll-loops	ref
gcc -funroll-loops -O2 -fomit-frame-pointer	ref
gcc -funroll-loops -O3 -fomit-frame-pointer	ref
gcc -funroll-loops -O -fomit-frame-pointer	ref
gcc -funroll-loops -Os -fomit-frame-pointer	ref
gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer	ref
gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer	ref
gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer	ref
gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer	ref
gcc -funroll-loops -mabi=32 -O2 -fomit-frame-pointer	ref
gcc -funroll-loops -mabi=32 -O3 -fomit-frame-pointer	ref
gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer	ref
gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer	ref
gcc -mabi=32 -O2 -fomit-frame-pointer	ref
gcc -mabi=32 -O3 -fomit-frame-pointer	ref
gcc -mabi=32 -O -fomit-frame-pointer	ref
gcc -mabi=32 -Os -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k512n256tau256v1/ref
Compiler: clang -O3 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-WjOWhe.s: Assembler messages:
encrypt.c: /tmp/cc-WjOWhe.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-WjOWhe.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-WjOWhe.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-WjOWhe.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha512.c: /tmp/cc-0aaSjo.s: Assembler messages:
omdsha512.c: /tmp/cc-0aaSjo.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-0aaSjo.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-0aaSjo.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-0aaSjo.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-0aaSjo.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-0aaSjo.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-0aaSjo.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-0aaSjo.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-0aaSjo.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-0aaSjo.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-0aaSjo.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-0aaSjo.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-0aaSjo.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-0aaSjo.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-0aaSjo.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-0aaSjo.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-0aaSjo.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-0aaSjo.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-0aaSjo.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-0aaSjo.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-0aaSjo.s:812: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-0aaSjo.s:812: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k512n256tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-aC09HK.s: Assembler messages:
encrypt.c: /tmp/cc-aC09HK.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-aC09HK.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-aC09HK.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-aC09HK.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-tKMD42.s: Assembler messages:
omdsha512.c: /tmp/cc-tKMD42.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-tKMD42.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-tKMD42.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-tKMD42.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-tKMD42.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-tKMD42.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-tKMD42.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-tKMD42.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-tKMD42.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-tKMD42.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-tKMD42.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-tKMD42.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-tKMD42.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-tKMD42.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-tKMD42.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-tKMD42.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-tKMD42.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-tKMD42.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-tKMD42.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-tKMD42.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k512n256tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-lVNXbf.s: Assembler messages:
encrypt.c: /tmp/cc-lVNXbf.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-lVNXbf.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-lVNXbf.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-lVNXbf.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-l5Xhzo.s: Assembler messages:
omdsha512.c: /tmp/cc-l5Xhzo.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-l5Xhzo.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-l5Xhzo.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-l5Xhzo.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-l5Xhzo.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-l5Xhzo.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-l5Xhzo.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-l5Xhzo.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-l5Xhzo.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-l5Xhzo.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-l5Xhzo.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-l5Xhzo.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-l5Xhzo.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-l5Xhzo.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-l5Xhzo.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-l5Xhzo.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-l5Xhzo.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-l5Xhzo.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-l5Xhzo.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-l5Xhzo.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha512k512n256tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-aBjKop.s: Assembler messages:
encrypt.c: /tmp/cc-aBjKop.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-aBjKop.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-aBjKop.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-aBjKop.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-nWKNfL.s: Assembler messages:
omdsha512.c: /tmp/cc-nWKNfL.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-nWKNfL.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-nWKNfL.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-nWKNfL.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-nWKNfL.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-nWKNfL.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-nWKNfL.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-nWKNfL.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-nWKNfL.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-nWKNfL.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-nWKNfL.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-nWKNfL.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-nWKNfL.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-nWKNfL.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-nWKNfL.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-nWKNfL.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-nWKNfL.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-nWKNfL.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-nWKNfL.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-nWKNfL.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k512n256tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-IxwXKa.s: Assembler messages:
encrypt.c: /tmp/cc-IxwXKa.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-IxwXKa.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-IxwXKa.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-IxwXKa.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-eBuqVk.s: Assembler messages:
omdsha512.c: /tmp/cc-eBuqVk.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-eBuqVk.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-eBuqVk.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-eBuqVk.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-eBuqVk.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-eBuqVk.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-eBuqVk.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-eBuqVk.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-eBuqVk.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-eBuqVk.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-eBuqVk.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-eBuqVk.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-eBuqVk.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-eBuqVk.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-eBuqVk.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-eBuqVk.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-eBuqVk.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-eBuqVk.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-eBuqVk.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-eBuqVk.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha512k512n256tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-ENHeHf.s: Assembler messages:
encrypt.c: /tmp/cc-ENHeHf.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-ENHeHf.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-ENHeHf.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-ENHeHf.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-cufYgq.s: Assembler messages:
omdsha512.c: /tmp/cc-cufYgq.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-cufYgq.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-cufYgq.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-cufYgq.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-cufYgq.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-cufYgq.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-cufYgq.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-cufYgq.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-cufYgq.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-cufYgq.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-cufYgq.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-cufYgq.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-cufYgq.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-cufYgq.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-cufYgq.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-cufYgq.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-cufYgq.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-cufYgq.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-cufYgq.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-cufYgq.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k512n256tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-v9EZ5P.s: Assembler messages:
encrypt.c: /tmp/cc-v9EZ5P.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-v9EZ5P.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-v9EZ5P.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-v9EZ5P.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-iqMSCa.s: Assembler messages:
omdsha512.c: /tmp/cc-iqMSCa.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-iqMSCa.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-iqMSCa.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-iqMSCa.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-iqMSCa.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-iqMSCa.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-iqMSCa.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-iqMSCa.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-iqMSCa.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-iqMSCa.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-iqMSCa.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-iqMSCa.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-iqMSCa.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-iqMSCa.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-iqMSCa.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-iqMSCa.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-iqMSCa.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-iqMSCa.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-iqMSCa.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-iqMSCa.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha512k512n256tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-xa3FYK.s: Assembler messages:
encrypt.c: /tmp/cc-xa3FYK.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-xa3FYK.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-xa3FYK.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-xa3FYK.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-yKMZh2.s: Assembler messages:
omdsha512.c: /tmp/cc-yKMZh2.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-yKMZh2.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-yKMZh2.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-yKMZh2.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-yKMZh2.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-yKMZh2.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-yKMZh2.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-yKMZh2.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-yKMZh2.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-yKMZh2.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-yKMZh2.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-yKMZh2.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-yKMZh2.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-yKMZh2.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-yKMZh2.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-yKMZh2.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-yKMZh2.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-yKMZh2.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-yKMZh2.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-yKMZh2.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k512n256tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-m1T3Ki.s: Assembler messages:
encrypt.c: /tmp/cc-m1T3Ki.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-m1T3Ki.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-m1T3Ki.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-m1T3Ki.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-rsmpZA.s: Assembler messages:
omdsha512.c: /tmp/cc-rsmpZA.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-rsmpZA.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-rsmpZA.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-rsmpZA.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-rsmpZA.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-rsmpZA.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-rsmpZA.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-rsmpZA.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-rsmpZA.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-rsmpZA.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-rsmpZA.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-rsmpZA.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-rsmpZA.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-rsmpZA.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-rsmpZA.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-rsmpZA.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-rsmpZA.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-rsmpZA.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-rsmpZA.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-rsmpZA.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha512k512n256tau256v1/ref
Compiler: clang -O3 -fwrapv -march=native -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-71TkaQ.s: Assembler messages:
encrypt.c: /tmp/cc-71TkaQ.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-71TkaQ.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-71TkaQ.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-71TkaQ.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-ujnDq7.s: Assembler messages:
omdsha512.c: /tmp/cc-ujnDq7.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ujnDq7.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ujnDq7.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ujnDq7.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ujnDq7.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ujnDq7.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ujnDq7.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ujnDq7.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ujnDq7.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ujnDq7.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ujnDq7.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ujnDq7.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ujnDq7.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ujnDq7.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ujnDq7.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ujnDq7.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ujnDq7.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ujnDq7.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ujnDq7.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ujnDq7.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k512n256tau256v1/ref
Compiler: clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-8yfnSo.s: Assembler messages:
encrypt.c: /tmp/cc-8yfnSo.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-8yfnSo.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-8yfnSo.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-8yfnSo.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-5BszDJ.s: Assembler messages:
omdsha512.c: /tmp/cc-5BszDJ.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-5BszDJ.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-5BszDJ.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-5BszDJ.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-5BszDJ.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-5BszDJ.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-5BszDJ.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-5BszDJ.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-5BszDJ.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-5BszDJ.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-5BszDJ.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-5BszDJ.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-5BszDJ.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-5BszDJ.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-5BszDJ.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-5BszDJ.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-5BszDJ.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-5BszDJ.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-5BszDJ.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-5BszDJ.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k512n256tau256v1/ref
Compiler: clang -O3 -fwrapv -mavx2 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-DeYg1U.s: Assembler messages:
encrypt.c: /tmp/cc-DeYg1U.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-DeYg1U.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-DeYg1U.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-DeYg1U.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha512.c: /tmp/cc-IYgs6e.s: Assembler messages:
omdsha512.c: /tmp/cc-IYgs6e.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-IYgs6e.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-IYgs6e.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-IYgs6e.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-IYgs6e.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-IYgs6e.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-IYgs6e.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-IYgs6e.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-IYgs6e.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-IYgs6e.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-IYgs6e.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-IYgs6e.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-IYgs6e.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-IYgs6e.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-IYgs6e.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-IYgs6e.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-IYgs6e.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-IYgs6e.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-IYgs6e.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-IYgs6e.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-IYgs6e.s:812: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-IYgs6e.s:812: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k512n256tau256v1/ref
Compiler: clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-retZCg.s: Assembler messages:
encrypt.c: /tmp/cc-retZCg.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-retZCg.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-retZCg.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-retZCg.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha512.c: /tmp/cc-AkEddB.s: Assembler messages:
omdsha512.c: /tmp/cc-AkEddB.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-AkEddB.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-AkEddB.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-AkEddB.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-AkEddB.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-AkEddB.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-AkEddB.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-AkEddB.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-AkEddB.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-AkEddB.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-AkEddB.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-AkEddB.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-AkEddB.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-AkEddB.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-AkEddB.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-AkEddB.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-AkEddB.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-AkEddB.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-AkEddB.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-AkEddB.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-AkEddB.s:812: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-AkEddB.s:812: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k512n256tau256v1/ref
Compiler: clang -O3 -fwrapv -mavx -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-0PxKAa.s: Assembler messages:
encrypt.c: /tmp/cc-0PxKAa.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-0PxKAa.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-0PxKAa.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-0PxKAa.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha512.c: /tmp/cc-QjpiHl.s: Assembler messages:
omdsha512.c: /tmp/cc-QjpiHl.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-QjpiHl.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-QjpiHl.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-QjpiHl.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-QjpiHl.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-QjpiHl.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-QjpiHl.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-QjpiHl.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-QjpiHl.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-QjpiHl.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-QjpiHl.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-QjpiHl.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-QjpiHl.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-QjpiHl.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-QjpiHl.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-QjpiHl.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-QjpiHl.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-QjpiHl.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-QjpiHl.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-QjpiHl.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-QjpiHl.s:812: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-QjpiHl.s:812: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k512n256tau256v1/ref
Compiler: clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-nvwSYS.s: Assembler messages:
encrypt.c: /tmp/cc-nvwSYS.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-nvwSYS.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-nvwSYS.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-nvwSYS.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha512.c: /tmp/cc-MHBIzf.s: Assembler messages:
omdsha512.c: /tmp/cc-MHBIzf.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-MHBIzf.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-MHBIzf.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-MHBIzf.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-MHBIzf.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-MHBIzf.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-MHBIzf.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-MHBIzf.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-MHBIzf.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-MHBIzf.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-MHBIzf.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-MHBIzf.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-MHBIzf.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-MHBIzf.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-MHBIzf.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-MHBIzf.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-MHBIzf.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-MHBIzf.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-MHBIzf.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-MHBIzf.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-MHBIzf.s:812: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-MHBIzf.s:812: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref