Implementation notes: mipso32, h1mips, crypto_aead/omdsha512k256n256tau256v1

Computer: h1mips
Architecture: mipso32
CPU ID: unknown CPU ID
SUPERCOP version: 20140622
Operation: crypto_aead
Primitive: omdsha512k256n256tau256v1

Time	Implementation	Compiler	Benchmark date	SUPERCOP version
1359294	`ref`	`gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer`	20140602	20140525
1361788	`ref`	`gcc -fno-schedule-insns -O3 -fomit-frame-pointer`	20140602	20140525
1452400	`ref`	`gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer`	20140602	20140525
1471338	`ref`	`gcc -fno-schedule-insns -O2 -fomit-frame-pointer`	20140602	20140525
1519416	`ref`	`gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer`	20140602	20140525
1522138	`ref`	`gcc -fno-schedule-insns -Os -fomit-frame-pointer`	20140602	20140525
1540734	`ref`	`gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer`	20140602	20140525
1540748	`ref`	`gcc -funroll-loops -O -fomit-frame-pointer`	20140602	20140525
1540994	`ref`	`gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer`	20140602	20140525
1556252	`ref`	`gcc -fno-schedule-insns -O -fomit-frame-pointer`	20140602	20140525
1556262	`ref`	`gcc -mabi=32 -O -fomit-frame-pointer`	20140602	20140525
1556266	`ref`	`gcc -O -fomit-frame-pointer`	20140602	20140525
1650354	`ref`	`gcc -funroll-loops -mabi=32 -O3 -fomit-frame-pointer`	20140602	20140525
1650402	`ref`	`gcc -O3 -fomit-frame-pointer`	20140602	20140525
1650490	`ref`	`gcc -funroll-loops -O3 -fomit-frame-pointer`	20140602	20140525
1650514	`ref`	`gcc -mabi=32 -O3 -fomit-frame-pointer`	20140602	20140525
1747910	`ref`	`gcc -funroll-loops -O2 -fomit-frame-pointer`	20140602	20140525
1747954	`ref`	`gcc -funroll-loops -mabi=32 -O2 -fomit-frame-pointer`	20140602	20140525
1780380	`ref`	`gcc -mabi=32 -O2 -fomit-frame-pointer`	20140602	20140525
1780390	`ref`	`gcc -O2 -fomit-frame-pointer`	20140602	20140525
1903142	`ref`	`gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer`	20140602	20140525
1912638	`ref`	`gcc -funroll-loops -Os -fomit-frame-pointer`	20140602	20140525
1913336	`ref`	`gcc -Os -fomit-frame-pointer`	20140602	20140525
1913336	`ref`	`gcc -mabi=32 -Os -fomit-frame-pointer`	20140602	20140525
4615692	`ref`	`cc`	20140602	20140525
4615896	`ref`	`gcc -funroll-loops`	20140602	20140525
4616342	`ref`	`gcc`	20140602	20140525

Compiler output

Implementation: crypto_aead/omdsha512k256n256tau256v1/ref
Compiler: cc

sha512.c: sha512.c: In function 'sha512_comp':
sha512.c: sha512.c:206: warning: initialization from incompatible pointer type

Number of similar (compiler,implementation) pairs: 27, namely:

Compiler	Implementations
cc	ref
gcc	ref
gcc -O2 -fomit-frame-pointer	ref
gcc -O3 -fomit-frame-pointer	ref
gcc -O -fomit-frame-pointer	ref
gcc -Os -fomit-frame-pointer	ref
gcc -fno-schedule-insns -O2 -fomit-frame-pointer	ref
gcc -fno-schedule-insns -O3 -fomit-frame-pointer	ref
gcc -fno-schedule-insns -O -fomit-frame-pointer	ref
gcc -fno-schedule-insns -Os -fomit-frame-pointer	ref
gcc -funroll-loops	ref
gcc -funroll-loops -O2 -fomit-frame-pointer	ref
gcc -funroll-loops -O3 -fomit-frame-pointer	ref
gcc -funroll-loops -O -fomit-frame-pointer	ref
gcc -funroll-loops -Os -fomit-frame-pointer	ref
gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer	ref
gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer	ref
gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer	ref
gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer	ref
gcc -funroll-loops -mabi=32 -O2 -fomit-frame-pointer	ref
gcc -funroll-loops -mabi=32 -O3 -fomit-frame-pointer	ref
gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer	ref
gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer	ref
gcc -mabi=32 -O2 -fomit-frame-pointer	ref
gcc -mabi=32 -O3 -fomit-frame-pointer	ref
gcc -mabi=32 -O -fomit-frame-pointer	ref
gcc -mabi=32 -Os -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k256n256tau256v1/ref
Compiler: clang -O3 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-PjXndX.s: Assembler messages:
encrypt.c: /tmp/cc-PjXndX.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-PjXndX.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-PjXndX.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-PjXndX.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha512.c: /tmp/cc-ChlAVe.s: Assembler messages:
omdsha512.c: /tmp/cc-ChlAVe.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ChlAVe.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ChlAVe.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ChlAVe.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ChlAVe.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ChlAVe.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ChlAVe.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ChlAVe.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ChlAVe.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ChlAVe.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ChlAVe.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ChlAVe.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ChlAVe.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ChlAVe.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ChlAVe.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ChlAVe.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ChlAVe.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ChlAVe.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ChlAVe.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ChlAVe.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ChlAVe.s:812: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ChlAVe.s:812: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k256n256tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-cSAitx.s: Assembler messages:
encrypt.c: /tmp/cc-cSAitx.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-cSAitx.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-cSAitx.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-cSAitx.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-lk3XMO.s: Assembler messages:
omdsha512.c: /tmp/cc-lk3XMO.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lk3XMO.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lk3XMO.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lk3XMO.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lk3XMO.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lk3XMO.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lk3XMO.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lk3XMO.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lk3XMO.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lk3XMO.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lk3XMO.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lk3XMO.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lk3XMO.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lk3XMO.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lk3XMO.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lk3XMO.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lk3XMO.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lk3XMO.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lk3XMO.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lk3XMO.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k256n256tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-ErD7ef.s: Assembler messages:
encrypt.c: /tmp/cc-ErD7ef.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-ErD7ef.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-ErD7ef.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-ErD7ef.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-Yyp1bq.s: Assembler messages:
omdsha512.c: /tmp/cc-Yyp1bq.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Yyp1bq.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Yyp1bq.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Yyp1bq.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Yyp1bq.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Yyp1bq.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Yyp1bq.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Yyp1bq.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Yyp1bq.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Yyp1bq.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Yyp1bq.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Yyp1bq.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Yyp1bq.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Yyp1bq.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Yyp1bq.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Yyp1bq.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Yyp1bq.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Yyp1bq.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Yyp1bq.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Yyp1bq.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha512k256n256tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-oJYBv4.s: Assembler messages:
encrypt.c: /tmp/cc-oJYBv4.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-oJYBv4.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-oJYBv4.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-oJYBv4.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-EQvnJf.s: Assembler messages:
omdsha512.c: /tmp/cc-EQvnJf.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-EQvnJf.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-EQvnJf.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-EQvnJf.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-EQvnJf.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-EQvnJf.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-EQvnJf.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-EQvnJf.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-EQvnJf.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-EQvnJf.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-EQvnJf.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-EQvnJf.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-EQvnJf.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-EQvnJf.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-EQvnJf.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-EQvnJf.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-EQvnJf.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-EQvnJf.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-EQvnJf.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-EQvnJf.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k256n256tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-2Ao6GU.s: Assembler messages:
encrypt.c: /tmp/cc-2Ao6GU.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-2Ao6GU.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-2Ao6GU.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-2Ao6GU.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-fddhWf.s: Assembler messages:
omdsha512.c: /tmp/cc-fddhWf.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-fddhWf.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-fddhWf.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-fddhWf.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-fddhWf.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-fddhWf.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-fddhWf.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-fddhWf.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-fddhWf.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-fddhWf.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-fddhWf.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-fddhWf.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-fddhWf.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-fddhWf.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-fddhWf.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-fddhWf.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-fddhWf.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-fddhWf.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-fddhWf.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-fddhWf.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha512k256n256tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-bIgSGM.s: Assembler messages:
encrypt.c: /tmp/cc-bIgSGM.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-bIgSGM.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-bIgSGM.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-bIgSGM.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-QLlgA8.s: Assembler messages:
omdsha512.c: /tmp/cc-QLlgA8.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-QLlgA8.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-QLlgA8.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-QLlgA8.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-QLlgA8.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-QLlgA8.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-QLlgA8.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-QLlgA8.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-QLlgA8.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-QLlgA8.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-QLlgA8.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-QLlgA8.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-QLlgA8.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-QLlgA8.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-QLlgA8.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-QLlgA8.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-QLlgA8.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-QLlgA8.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-QLlgA8.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-QLlgA8.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k256n256tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-sCEK3l.s: Assembler messages:
encrypt.c: /tmp/cc-sCEK3l.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-sCEK3l.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-sCEK3l.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-sCEK3l.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-DH2vjH.s: Assembler messages:
omdsha512.c: /tmp/cc-DH2vjH.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-DH2vjH.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-DH2vjH.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-DH2vjH.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-DH2vjH.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-DH2vjH.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-DH2vjH.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-DH2vjH.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-DH2vjH.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-DH2vjH.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-DH2vjH.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-DH2vjH.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-DH2vjH.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-DH2vjH.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-DH2vjH.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-DH2vjH.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-DH2vjH.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-DH2vjH.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-DH2vjH.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-DH2vjH.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha512k256n256tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-Sd3p2q.s: Assembler messages:
encrypt.c: /tmp/cc-Sd3p2q.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-Sd3p2q.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-Sd3p2q.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-Sd3p2q.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-ZGKs3M.s: Assembler messages:
omdsha512.c: /tmp/cc-ZGKs3M.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ZGKs3M.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ZGKs3M.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ZGKs3M.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ZGKs3M.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ZGKs3M.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ZGKs3M.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ZGKs3M.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ZGKs3M.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ZGKs3M.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ZGKs3M.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ZGKs3M.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ZGKs3M.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ZGKs3M.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ZGKs3M.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ZGKs3M.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ZGKs3M.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ZGKs3M.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-ZGKs3M.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-ZGKs3M.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k256n256tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-u4nV3a.s: Assembler messages:
encrypt.c: /tmp/cc-u4nV3a.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-u4nV3a.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-u4nV3a.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-u4nV3a.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-I0bWXj.s: Assembler messages:
omdsha512.c: /tmp/cc-I0bWXj.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-I0bWXj.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-I0bWXj.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-I0bWXj.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-I0bWXj.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-I0bWXj.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-I0bWXj.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-I0bWXj.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-I0bWXj.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-I0bWXj.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-I0bWXj.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-I0bWXj.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-I0bWXj.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-I0bWXj.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-I0bWXj.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-I0bWXj.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-I0bWXj.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-I0bWXj.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-I0bWXj.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-I0bWXj.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha512k256n256tau256v1/ref
Compiler: clang -O3 -fwrapv -march=native -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-2xee1w.s: Assembler messages:
encrypt.c: /tmp/cc-2xee1w.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-2xee1w.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-2xee1w.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-2xee1w.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-lHalPO.s: Assembler messages:
omdsha512.c: /tmp/cc-lHalPO.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lHalPO.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lHalPO.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lHalPO.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lHalPO.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lHalPO.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lHalPO.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lHalPO.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lHalPO.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lHalPO.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lHalPO.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lHalPO.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lHalPO.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lHalPO.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lHalPO.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lHalPO.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lHalPO.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lHalPO.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lHalPO.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lHalPO.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k256n256tau256v1/ref
Compiler: clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-OsG2Qs.s: Assembler messages:
encrypt.c: /tmp/cc-OsG2Qs.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-OsG2Qs.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-OsG2Qs.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-OsG2Qs.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-lvzL9J.s: Assembler messages:
omdsha512.c: /tmp/cc-lvzL9J.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lvzL9J.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lvzL9J.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lvzL9J.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lvzL9J.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lvzL9J.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lvzL9J.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lvzL9J.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lvzL9J.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lvzL9J.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lvzL9J.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lvzL9J.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lvzL9J.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lvzL9J.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lvzL9J.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lvzL9J.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lvzL9J.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lvzL9J.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lvzL9J.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lvzL9J.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k256n256tau256v1/ref
Compiler: clang -O3 -fwrapv -mavx2 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-Mbb9uo.s: Assembler messages:
encrypt.c: /tmp/cc-Mbb9uo.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-Mbb9uo.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-Mbb9uo.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-Mbb9uo.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha512.c: /tmp/cc-nMm9EJ.s: Assembler messages:
omdsha512.c: /tmp/cc-nMm9EJ.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-nMm9EJ.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-nMm9EJ.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-nMm9EJ.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-nMm9EJ.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-nMm9EJ.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-nMm9EJ.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-nMm9EJ.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-nMm9EJ.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-nMm9EJ.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-nMm9EJ.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-nMm9EJ.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-nMm9EJ.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-nMm9EJ.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-nMm9EJ.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-nMm9EJ.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-nMm9EJ.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-nMm9EJ.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-nMm9EJ.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-nMm9EJ.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-nMm9EJ.s:812: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-nMm9EJ.s:812: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k256n256tau256v1/ref
Compiler: clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-UKAvFb.s: Assembler messages:
encrypt.c: /tmp/cc-UKAvFb.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-UKAvFb.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-UKAvFb.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-UKAvFb.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha512.c: /tmp/cc-m25vBm.s: Assembler messages:
omdsha512.c: /tmp/cc-m25vBm.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-m25vBm.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-m25vBm.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-m25vBm.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-m25vBm.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-m25vBm.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-m25vBm.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-m25vBm.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-m25vBm.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-m25vBm.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-m25vBm.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-m25vBm.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-m25vBm.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-m25vBm.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-m25vBm.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-m25vBm.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-m25vBm.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-m25vBm.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-m25vBm.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-m25vBm.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-m25vBm.s:812: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-m25vBm.s:812: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k256n256tau256v1/ref
Compiler: clang -O3 -fwrapv -mavx -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-WxDO1r.s: Assembler messages:
encrypt.c: /tmp/cc-WxDO1r.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-WxDO1r.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-WxDO1r.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-WxDO1r.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha512.c: /tmp/cc-vn9glK.s: Assembler messages:
omdsha512.c: /tmp/cc-vn9glK.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-vn9glK.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-vn9glK.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-vn9glK.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-vn9glK.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-vn9glK.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-vn9glK.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-vn9glK.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-vn9glK.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-vn9glK.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-vn9glK.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-vn9glK.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-vn9glK.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-vn9glK.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-vn9glK.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-vn9glK.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-vn9glK.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-vn9glK.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-vn9glK.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-vn9glK.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-vn9glK.s:812: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-vn9glK.s:812: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k256n256tau256v1/ref
Compiler: clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-lHeFBj.s: Assembler messages:
encrypt.c: /tmp/cc-lHeFBj.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-lHeFBj.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-lHeFBj.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-lHeFBj.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha512.c: /tmp/cc-kh3s4F.s: Assembler messages:
omdsha512.c: /tmp/cc-kh3s4F.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-kh3s4F.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-kh3s4F.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-kh3s4F.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-kh3s4F.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-kh3s4F.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-kh3s4F.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-kh3s4F.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-kh3s4F.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-kh3s4F.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-kh3s4F.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-kh3s4F.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-kh3s4F.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-kh3s4F.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-kh3s4F.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-kh3s4F.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-kh3s4F.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-kh3s4F.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-kh3s4F.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-kh3s4F.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-kh3s4F.s:812: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-kh3s4F.s:812: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref