Implementation notes: mipso32, h1mips, crypto_aead/omdsha512k128n128tau128v1

Computer: h1mips
Architecture: mipso32
CPU ID: unknown CPU ID
SUPERCOP version: 20140622
Operation: crypto_aead
Primitive: omdsha512k128n128tau128v1

Time	Implementation	Compiler	Benchmark date	SUPERCOP version
1359408	`ref`	`gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer`	20140602	20140525
1360956	`ref`	`gcc -fno-schedule-insns -O3 -fomit-frame-pointer`	20140602	20140525
1452122	`ref`	`gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer`	20140602	20140525
1471474	`ref`	`gcc -fno-schedule-insns -O2 -fomit-frame-pointer`	20140602	20140525
1519952	`ref`	`gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer`	20140602	20140525
1521762	`ref`	`gcc -fno-schedule-insns -Os -fomit-frame-pointer`	20140602	20140525
1539802	`ref`	`gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer`	20140602	20140525
1540064	`ref`	`gcc -funroll-loops -O -fomit-frame-pointer`	20140602	20140525
1540178	`ref`	`gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer`	20140602	20140525
1556062	`ref`	`gcc -fno-schedule-insns -O -fomit-frame-pointer`	20140602	20140525
1556064	`ref`	`gcc -mabi=32 -O -fomit-frame-pointer`	20140602	20140525
1556148	`ref`	`gcc -O -fomit-frame-pointer`	20140602	20140525
1648986	`ref`	`gcc -funroll-loops -mabi=32 -O3 -fomit-frame-pointer`	20140602	20140525
1649476	`ref`	`gcc -funroll-loops -O3 -fomit-frame-pointer`	20140602	20140525
1650556	`ref`	`gcc -O3 -fomit-frame-pointer`	20140602	20140525
1650798	`ref`	`gcc -mabi=32 -O3 -fomit-frame-pointer`	20140602	20140525
1748386	`ref`	`gcc -funroll-loops -mabi=32 -O2 -fomit-frame-pointer`	20140602	20140525
1749376	`ref`	`gcc -funroll-loops -O2 -fomit-frame-pointer`	20140602	20140525
1769156	`ref`	`gcc -O2 -fomit-frame-pointer`	20140602	20140525
1779530	`ref`	`gcc -mabi=32 -O2 -fomit-frame-pointer`	20140602	20140525
1902654	`ref`	`gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer`	20140602	20140525
1904688	`ref`	`gcc -funroll-loops -Os -fomit-frame-pointer`	20140602	20140525
1904700	`ref`	`gcc -Os -fomit-frame-pointer`	20140602	20140525
1913456	`ref`	`gcc -mabi=32 -Os -fomit-frame-pointer`	20140602	20140525
4615980	`ref`	`gcc -funroll-loops`	20140602	20140525
4616028	`ref`	`gcc`	20140602	20140525
4616104	`ref`	`cc`	20140602	20140525

Compiler output

Implementation: crypto_aead/omdsha512k128n128tau128v1/ref
Compiler: cc

sha512.c: sha512.c: In function 'sha512_comp':
sha512.c: sha512.c:206: warning: initialization from incompatible pointer type

Number of similar (compiler,implementation) pairs: 27, namely:

Compiler	Implementations
cc	ref
gcc	ref
gcc -O2 -fomit-frame-pointer	ref
gcc -O3 -fomit-frame-pointer	ref
gcc -O -fomit-frame-pointer	ref
gcc -Os -fomit-frame-pointer	ref
gcc -fno-schedule-insns -O2 -fomit-frame-pointer	ref
gcc -fno-schedule-insns -O3 -fomit-frame-pointer	ref
gcc -fno-schedule-insns -O -fomit-frame-pointer	ref
gcc -fno-schedule-insns -Os -fomit-frame-pointer	ref
gcc -funroll-loops	ref
gcc -funroll-loops -O2 -fomit-frame-pointer	ref
gcc -funroll-loops -O3 -fomit-frame-pointer	ref
gcc -funroll-loops -O -fomit-frame-pointer	ref
gcc -funroll-loops -Os -fomit-frame-pointer	ref
gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer	ref
gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer	ref
gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer	ref
gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer	ref
gcc -funroll-loops -mabi=32 -O2 -fomit-frame-pointer	ref
gcc -funroll-loops -mabi=32 -O3 -fomit-frame-pointer	ref
gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer	ref
gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer	ref
gcc -mabi=32 -O2 -fomit-frame-pointer	ref
gcc -mabi=32 -O3 -fomit-frame-pointer	ref
gcc -mabi=32 -O -fomit-frame-pointer	ref
gcc -mabi=32 -Os -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k128n128tau128v1/ref
Compiler: clang -O3 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-x0sUoR.s: Assembler messages:
encrypt.c: /tmp/cc-x0sUoR.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-x0sUoR.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-x0sUoR.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-x0sUoR.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha512.c: /tmp/cc-oDh4ld.s: Assembler messages:
omdsha512.c: /tmp/cc-oDh4ld.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-oDh4ld.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-oDh4ld.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-oDh4ld.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-oDh4ld.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-oDh4ld.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-oDh4ld.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-oDh4ld.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-oDh4ld.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-oDh4ld.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-oDh4ld.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-oDh4ld.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-oDh4ld.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-oDh4ld.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-oDh4ld.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-oDh4ld.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-oDh4ld.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-oDh4ld.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-oDh4ld.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-oDh4ld.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-oDh4ld.s:812: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-oDh4ld.s:812: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k128n128tau128v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-9411ye.s: Assembler messages:
encrypt.c: /tmp/cc-9411ye.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-9411ye.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-9411ye.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-9411ye.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-zejHfs.s: Assembler messages:
omdsha512.c: /tmp/cc-zejHfs.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-zejHfs.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-zejHfs.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-zejHfs.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-zejHfs.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-zejHfs.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-zejHfs.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-zejHfs.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-zejHfs.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-zejHfs.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-zejHfs.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-zejHfs.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-zejHfs.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-zejHfs.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-zejHfs.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-zejHfs.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-zejHfs.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-zejHfs.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-zejHfs.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-zejHfs.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k128n128tau128v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-q2wXoP.s: Assembler messages:
encrypt.c: /tmp/cc-q2wXoP.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-q2wXoP.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-q2wXoP.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-q2wXoP.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-Zs7z06.s: Assembler messages:
omdsha512.c: /tmp/cc-Zs7z06.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Zs7z06.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Zs7z06.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Zs7z06.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Zs7z06.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Zs7z06.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Zs7z06.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Zs7z06.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Zs7z06.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Zs7z06.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Zs7z06.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Zs7z06.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Zs7z06.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Zs7z06.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Zs7z06.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Zs7z06.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Zs7z06.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Zs7z06.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Zs7z06.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Zs7z06.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha512k128n128tau128v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-diBgay.s: Assembler messages:
encrypt.c: /tmp/cc-diBgay.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-diBgay.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-diBgay.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-diBgay.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-gbLU2T.s: Assembler messages:
omdsha512.c: /tmp/cc-gbLU2T.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-gbLU2T.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-gbLU2T.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-gbLU2T.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-gbLU2T.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-gbLU2T.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-gbLU2T.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-gbLU2T.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-gbLU2T.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-gbLU2T.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-gbLU2T.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-gbLU2T.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-gbLU2T.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-gbLU2T.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-gbLU2T.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-gbLU2T.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-gbLU2T.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-gbLU2T.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-gbLU2T.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-gbLU2T.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k128n128tau128v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-IcLjCq.s: Assembler messages:
encrypt.c: /tmp/cc-IcLjCq.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-IcLjCq.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-IcLjCq.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-IcLjCq.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-bWX5VN.s: Assembler messages:
omdsha512.c: /tmp/cc-bWX5VN.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-bWX5VN.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-bWX5VN.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-bWX5VN.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-bWX5VN.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-bWX5VN.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-bWX5VN.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-bWX5VN.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-bWX5VN.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-bWX5VN.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-bWX5VN.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-bWX5VN.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-bWX5VN.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-bWX5VN.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-bWX5VN.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-bWX5VN.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-bWX5VN.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-bWX5VN.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-bWX5VN.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-bWX5VN.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha512k128n128tau128v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-Ji7jLW.s: Assembler messages:
encrypt.c: /tmp/cc-Ji7jLW.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-Ji7jLW.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-Ji7jLW.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-Ji7jLW.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-oHTgBe.s: Assembler messages:
omdsha512.c: /tmp/cc-oHTgBe.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-oHTgBe.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-oHTgBe.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-oHTgBe.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-oHTgBe.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-oHTgBe.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-oHTgBe.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-oHTgBe.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-oHTgBe.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-oHTgBe.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-oHTgBe.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-oHTgBe.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-oHTgBe.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-oHTgBe.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-oHTgBe.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-oHTgBe.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-oHTgBe.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-oHTgBe.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-oHTgBe.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-oHTgBe.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k128n128tau128v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-8uaWMY.s: Assembler messages:
encrypt.c: /tmp/cc-8uaWMY.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-8uaWMY.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-8uaWMY.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-8uaWMY.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-Ppocgh.s: Assembler messages:
omdsha512.c: /tmp/cc-Ppocgh.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Ppocgh.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Ppocgh.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Ppocgh.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Ppocgh.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Ppocgh.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Ppocgh.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Ppocgh.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Ppocgh.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Ppocgh.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Ppocgh.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Ppocgh.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Ppocgh.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Ppocgh.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Ppocgh.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Ppocgh.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Ppocgh.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Ppocgh.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Ppocgh.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Ppocgh.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha512k128n128tau128v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-0ueVha.s: Assembler messages:
encrypt.c: /tmp/cc-0ueVha.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-0ueVha.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-0ueVha.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-0ueVha.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-KrYtYk.s: Assembler messages:
omdsha512.c: /tmp/cc-KrYtYk.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-KrYtYk.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-KrYtYk.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-KrYtYk.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-KrYtYk.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-KrYtYk.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-KrYtYk.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-KrYtYk.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-KrYtYk.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-KrYtYk.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-KrYtYk.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-KrYtYk.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-KrYtYk.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-KrYtYk.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-KrYtYk.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-KrYtYk.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-KrYtYk.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-KrYtYk.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-KrYtYk.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-KrYtYk.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k128n128tau128v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-pAryoF.s: Assembler messages:
encrypt.c: /tmp/cc-pAryoF.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-pAryoF.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-pAryoF.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-pAryoF.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-qIPDJZ.s: Assembler messages:
omdsha512.c: /tmp/cc-qIPDJZ.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-qIPDJZ.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-qIPDJZ.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-qIPDJZ.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-qIPDJZ.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-qIPDJZ.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-qIPDJZ.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-qIPDJZ.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-qIPDJZ.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-qIPDJZ.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-qIPDJZ.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-qIPDJZ.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-qIPDJZ.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-qIPDJZ.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-qIPDJZ.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-qIPDJZ.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-qIPDJZ.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-qIPDJZ.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-qIPDJZ.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-qIPDJZ.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha512k128n128tau128v1/ref
Compiler: clang -O3 -fwrapv -march=native -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-sAdLjr.s: Assembler messages:
encrypt.c: /tmp/cc-sAdLjr.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-sAdLjr.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-sAdLjr.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-sAdLjr.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-Bpud2L.s: Assembler messages:
omdsha512.c: /tmp/cc-Bpud2L.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Bpud2L.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Bpud2L.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Bpud2L.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Bpud2L.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Bpud2L.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Bpud2L.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Bpud2L.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Bpud2L.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Bpud2L.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Bpud2L.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Bpud2L.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Bpud2L.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Bpud2L.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Bpud2L.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Bpud2L.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Bpud2L.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Bpud2L.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-Bpud2L.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-Bpud2L.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k128n128tau128v1/ref
Compiler: clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-YzH7p9.s: Assembler messages:
encrypt.c: /tmp/cc-YzH7p9.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-YzH7p9.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-YzH7p9.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-YzH7p9.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha512.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha512.c: /tmp/cc-CH8sqk.s: Assembler messages:
omdsha512.c: /tmp/cc-CH8sqk.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-CH8sqk.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-CH8sqk.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-CH8sqk.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-CH8sqk.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-CH8sqk.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-CH8sqk.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-CH8sqk.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-CH8sqk.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-CH8sqk.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-CH8sqk.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-CH8sqk.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-CH8sqk.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-CH8sqk.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-CH8sqk.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-CH8sqk.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-CH8sqk.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-CH8sqk.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-CH8sqk.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-CH8sqk.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k128n128tau128v1/ref
Compiler: clang -O3 -fwrapv -mavx2 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-Uw8AAa.s: Assembler messages:
encrypt.c: /tmp/cc-Uw8AAa.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-Uw8AAa.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-Uw8AAa.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-Uw8AAa.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha512.c: /tmp/cc-lPbLvx.s: Assembler messages:
omdsha512.c: /tmp/cc-lPbLvx.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lPbLvx.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lPbLvx.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lPbLvx.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lPbLvx.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lPbLvx.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lPbLvx.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lPbLvx.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lPbLvx.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lPbLvx.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lPbLvx.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lPbLvx.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lPbLvx.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lPbLvx.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lPbLvx.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lPbLvx.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lPbLvx.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lPbLvx.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lPbLvx.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lPbLvx.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-lPbLvx.s:812: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-lPbLvx.s:812: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k128n128tau128v1/ref
Compiler: clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-REuNt4.s: Assembler messages:
encrypt.c: /tmp/cc-REuNt4.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-REuNt4.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-REuNt4.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-REuNt4.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha512.c: /tmp/cc-9B0RYf.s: Assembler messages:
omdsha512.c: /tmp/cc-9B0RYf.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-9B0RYf.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-9B0RYf.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-9B0RYf.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-9B0RYf.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-9B0RYf.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-9B0RYf.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-9B0RYf.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-9B0RYf.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-9B0RYf.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-9B0RYf.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-9B0RYf.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-9B0RYf.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-9B0RYf.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-9B0RYf.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-9B0RYf.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-9B0RYf.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-9B0RYf.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-9B0RYf.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-9B0RYf.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-9B0RYf.s:812: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-9B0RYf.s:812: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k128n128tau128v1/ref
Compiler: clang -O3 -fwrapv -mavx -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-v3eYuK.s: Assembler messages:
encrypt.c: /tmp/cc-v3eYuK.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-v3eYuK.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-v3eYuK.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-v3eYuK.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha512.c: /tmp/cc-iYV2Z2.s: Assembler messages:
omdsha512.c: /tmp/cc-iYV2Z2.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-iYV2Z2.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-iYV2Z2.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-iYV2Z2.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-iYV2Z2.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-iYV2Z2.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-iYV2Z2.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-iYV2Z2.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-iYV2Z2.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-iYV2Z2.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-iYV2Z2.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-iYV2Z2.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-iYV2Z2.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-iYV2Z2.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-iYV2Z2.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-iYV2Z2.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-iYV2Z2.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-iYV2Z2.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-iYV2Z2.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-iYV2Z2.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-iYV2Z2.s:812: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-iYV2Z2.s:812: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha512k128n128tau128v1/ref
Compiler: clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-eNBwKk.s: Assembler messages:
encrypt.c: /tmp/cc-eNBwKk.s:41: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-eNBwKk.s:41: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-eNBwKk.s:96: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-eNBwKk.s:96: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha512.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha512.c: /tmp/cc-tFgJYC.s: Assembler messages:
omdsha512.c: /tmp/cc-tFgJYC.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-tFgJYC.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-tFgJYC.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-tFgJYC.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-tFgJYC.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-tFgJYC.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-tFgJYC.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-tFgJYC.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-tFgJYC.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-tFgJYC.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-tFgJYC.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-tFgJYC.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-tFgJYC.s:619: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-tFgJYC.s:619: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-tFgJYC.s:717: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-tFgJYC.s:717: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-tFgJYC.s:726: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-tFgJYC.s:726: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-tFgJYC.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-tFgJYC.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: /tmp/cc-tFgJYC.s:812: Warning: No .cprestore pseudo-op used in PIC code
omdsha512.c: /tmp/cc-tFgJYC.s:812: Warning: Macro instruction expanded into multiple instructions
omdsha512.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref