Implementation notes: mipso32, h1mips, crypto_aead/omdsha256k256n248tau256v1

Computer: h1mips
Architecture: mipso32
CPU ID: unknown CPU ID
SUPERCOP version: 20140622
Operation: crypto_aead
Primitive: omdsha256k256n248tau256v1

Time	Implementation	Compiler	Benchmark date	SUPERCOP version
920194	`ref`	`gcc -funroll-loops -mabi=32 -O3 -fomit-frame-pointer`	20140602	20140525
920346	`ref`	`gcc -funroll-loops -O3 -fomit-frame-pointer`	20140602	20140525
923574	`ref`	`gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer`	20140602	20140525
928712	`ref`	`gcc -fno-schedule-insns -O3 -fomit-frame-pointer`	20140602	20140525
934726	`ref`	`gcc -mabi=32 -O3 -fomit-frame-pointer`	20140602	20140525
934968	`ref`	`gcc -O3 -fomit-frame-pointer`	20140602	20140525
1027640	`ref`	`gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer`	20140602	20140525
1036750	`ref`	`gcc -funroll-loops -mabi=32 -O2 -fomit-frame-pointer`	20140602	20140525
1037294	`ref`	`gcc -funroll-loops -O2 -fomit-frame-pointer`	20140602	20140525
1088830	`ref`	`gcc -mabi=32 -O2 -fomit-frame-pointer`	20140602	20140525
1089294	`ref`	`gcc -O2 -fomit-frame-pointer`	20140602	20140525
1094384	`ref`	`gcc -fno-schedule-insns -O2 -fomit-frame-pointer`	20140602	20140525
1110436	`ref`	`gcc -funroll-loops -O -fomit-frame-pointer`	20140602	20140525
1110566	`ref`	`gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer`	20140602	20140525
1110568	`ref`	`gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer`	20140602	20140525
1158936	`ref`	`gcc -fno-schedule-insns -Os -fomit-frame-pointer`	20140602	20140525
1160654	`ref`	`gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer`	20140602	20140525
1182236	`ref`	`gcc -mabi=32 -O -fomit-frame-pointer`	20140602	20140525
1182240	`ref`	`gcc -fno-schedule-insns -O -fomit-frame-pointer`	20140602	20140525
1182242	`ref`	`gcc -O -fomit-frame-pointer`	20140602	20140525
1234062	`ref`	`gcc -funroll-loops -Os -fomit-frame-pointer`	20140602	20140525
1234628	`ref`	`gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer`	20140602	20140525
1235038	`ref`	`gcc -mabi=32 -Os -fomit-frame-pointer`	20140602	20140525
1235050	`ref`	`gcc -Os -fomit-frame-pointer`	20140602	20140525
2884144	`ref`	`gcc -funroll-loops`	20140602	20140525
2884210	`ref`	`cc`	20140602	20140525
2884306	`ref`	`gcc`	20140602	20140525

Compiler output

Implementation: crypto_aead/omdsha256k256n248tau256v1/ref
Compiler: clang -O3 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-AOufqU.s: Assembler messages:
encrypt.c: /tmp/cc-AOufqU.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-AOufqU.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-AOufqU.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-AOufqU.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-5FQXgc.s: Assembler messages:
omdsha256.c: /tmp/cc-5FQXgc.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-5FQXgc.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-5FQXgc.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-5FQXgc.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-5FQXgc.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-5FQXgc.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-5FQXgc.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-5FQXgc.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-5FQXgc.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-5FQXgc.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-5FQXgc.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-5FQXgc.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-5FQXgc.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-5FQXgc.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-5FQXgc.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-5FQXgc.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-5FQXgc.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-5FQXgc.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-5FQXgc.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-5FQXgc.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-5FQXgc.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-5FQXgc.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n248tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-WoK14E.s: Assembler messages:
encrypt.c: /tmp/cc-WoK14E.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-WoK14E.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-WoK14E.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-WoK14E.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-t9VsE1.s: Assembler messages:
omdsha256.c: /tmp/cc-t9VsE1.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-t9VsE1.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-t9VsE1.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-t9VsE1.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-t9VsE1.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-t9VsE1.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-t9VsE1.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-t9VsE1.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-t9VsE1.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-t9VsE1.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-t9VsE1.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-t9VsE1.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-t9VsE1.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-t9VsE1.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-t9VsE1.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-t9VsE1.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-t9VsE1.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-t9VsE1.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-t9VsE1.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-t9VsE1.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n248tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-TweoXe.s: Assembler messages:
encrypt.c: /tmp/cc-TweoXe.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-TweoXe.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-TweoXe.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-TweoXe.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-w9pqwA.s: Assembler messages:
omdsha256.c: /tmp/cc-w9pqwA.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-w9pqwA.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-w9pqwA.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-w9pqwA.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-w9pqwA.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-w9pqwA.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-w9pqwA.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-w9pqwA.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-w9pqwA.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-w9pqwA.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-w9pqwA.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-w9pqwA.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-w9pqwA.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-w9pqwA.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-w9pqwA.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-w9pqwA.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-w9pqwA.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-w9pqwA.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-w9pqwA.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-w9pqwA.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n248tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-n605Xb.s: Assembler messages:
encrypt.c: /tmp/cc-n605Xb.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-n605Xb.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-n605Xb.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-n605Xb.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-QvuRnx.s: Assembler messages:
omdsha256.c: /tmp/cc-QvuRnx.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-QvuRnx.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-QvuRnx.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-QvuRnx.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-QvuRnx.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-QvuRnx.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-QvuRnx.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-QvuRnx.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-QvuRnx.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-QvuRnx.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-QvuRnx.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-QvuRnx.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-QvuRnx.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-QvuRnx.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-QvuRnx.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-QvuRnx.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-QvuRnx.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-QvuRnx.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-QvuRnx.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-QvuRnx.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n248tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-B21d5V.s: Assembler messages:
encrypt.c: /tmp/cc-B21d5V.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-B21d5V.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-B21d5V.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-B21d5V.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-mt3och.s: Assembler messages:
omdsha256.c: /tmp/cc-mt3och.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mt3och.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mt3och.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mt3och.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mt3och.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mt3och.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mt3och.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mt3och.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mt3och.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mt3och.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mt3och.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mt3och.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mt3och.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mt3och.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mt3och.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mt3och.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mt3och.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mt3och.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mt3och.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mt3och.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n248tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-pyfPa0.s: Assembler messages:
encrypt.c: /tmp/cc-pyfPa0.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-pyfPa0.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-pyfPa0.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-pyfPa0.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-3evY0a.s: Assembler messages:
omdsha256.c: /tmp/cc-3evY0a.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-3evY0a.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-3evY0a.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-3evY0a.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-3evY0a.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-3evY0a.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-3evY0a.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-3evY0a.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-3evY0a.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-3evY0a.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-3evY0a.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-3evY0a.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-3evY0a.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-3evY0a.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-3evY0a.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-3evY0a.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-3evY0a.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-3evY0a.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-3evY0a.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-3evY0a.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n248tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-gdd0aC.s: Assembler messages:
encrypt.c: /tmp/cc-gdd0aC.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-gdd0aC.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-gdd0aC.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-gdd0aC.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-7zV8iW.s: Assembler messages:
omdsha256.c: /tmp/cc-7zV8iW.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-7zV8iW.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-7zV8iW.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-7zV8iW.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-7zV8iW.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-7zV8iW.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-7zV8iW.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-7zV8iW.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-7zV8iW.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-7zV8iW.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-7zV8iW.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-7zV8iW.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-7zV8iW.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-7zV8iW.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-7zV8iW.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-7zV8iW.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-7zV8iW.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-7zV8iW.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-7zV8iW.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-7zV8iW.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n248tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-exrMfb.s: Assembler messages:
encrypt.c: /tmp/cc-exrMfb.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-exrMfb.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-exrMfb.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-exrMfb.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-yu1pEj.s: Assembler messages:
omdsha256.c: /tmp/cc-yu1pEj.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-yu1pEj.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-yu1pEj.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-yu1pEj.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-yu1pEj.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-yu1pEj.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-yu1pEj.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-yu1pEj.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-yu1pEj.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-yu1pEj.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-yu1pEj.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-yu1pEj.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-yu1pEj.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-yu1pEj.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-yu1pEj.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-yu1pEj.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-yu1pEj.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-yu1pEj.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-yu1pEj.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-yu1pEj.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n248tau256v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-N0M1v7.s: Assembler messages:
encrypt.c: /tmp/cc-N0M1v7.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-N0M1v7.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-N0M1v7.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-N0M1v7.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-FMl7Ll.s: Assembler messages:
omdsha256.c: /tmp/cc-FMl7Ll.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-FMl7Ll.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-FMl7Ll.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-FMl7Ll.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-FMl7Ll.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-FMl7Ll.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-FMl7Ll.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-FMl7Ll.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-FMl7Ll.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-FMl7Ll.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-FMl7Ll.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-FMl7Ll.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-FMl7Ll.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-FMl7Ll.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-FMl7Ll.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-FMl7Ll.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-FMl7Ll.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-FMl7Ll.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-FMl7Ll.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-FMl7Ll.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n248tau256v1/ref
Compiler: clang -O3 -fwrapv -march=native -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-fUeKkk.s: Assembler messages:
encrypt.c: /tmp/cc-fUeKkk.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-fUeKkk.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-fUeKkk.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-fUeKkk.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-plabLt.s: Assembler messages:
omdsha256.c: /tmp/cc-plabLt.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-plabLt.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-plabLt.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-plabLt.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-plabLt.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-plabLt.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-plabLt.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-plabLt.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-plabLt.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-plabLt.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-plabLt.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-plabLt.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-plabLt.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-plabLt.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-plabLt.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-plabLt.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-plabLt.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-plabLt.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-plabLt.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-plabLt.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n248tau256v1/ref
Compiler: clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-kedEer.s: Assembler messages:
encrypt.c: /tmp/cc-kedEer.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-kedEer.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-kedEer.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-kedEer.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-bjEyHM.s: Assembler messages:
omdsha256.c: /tmp/cc-bjEyHM.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-bjEyHM.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-bjEyHM.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-bjEyHM.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-bjEyHM.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-bjEyHM.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-bjEyHM.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-bjEyHM.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-bjEyHM.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-bjEyHM.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-bjEyHM.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-bjEyHM.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-bjEyHM.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-bjEyHM.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-bjEyHM.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-bjEyHM.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-bjEyHM.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-bjEyHM.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-bjEyHM.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-bjEyHM.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n248tau256v1/ref
Compiler: clang -O3 -fwrapv -mavx2 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-cVUB5X.s: Assembler messages:
encrypt.c: /tmp/cc-cVUB5X.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-cVUB5X.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-cVUB5X.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-cVUB5X.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-sWhu6b.s: Assembler messages:
omdsha256.c: /tmp/cc-sWhu6b.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sWhu6b.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sWhu6b.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sWhu6b.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sWhu6b.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sWhu6b.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sWhu6b.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sWhu6b.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sWhu6b.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sWhu6b.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sWhu6b.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sWhu6b.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sWhu6b.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sWhu6b.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sWhu6b.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sWhu6b.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sWhu6b.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sWhu6b.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sWhu6b.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sWhu6b.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sWhu6b.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sWhu6b.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n248tau256v1/ref
Compiler: clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-bNw6I3.s: Assembler messages:
encrypt.c: /tmp/cc-bNw6I3.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-bNw6I3.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-bNw6I3.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-bNw6I3.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-XXtVPc.s: Assembler messages:
omdsha256.c: /tmp/cc-XXtVPc.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XXtVPc.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-XXtVPc.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XXtVPc.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-XXtVPc.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XXtVPc.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-XXtVPc.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XXtVPc.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-XXtVPc.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XXtVPc.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-XXtVPc.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XXtVPc.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-XXtVPc.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XXtVPc.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-XXtVPc.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XXtVPc.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-XXtVPc.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XXtVPc.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-XXtVPc.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XXtVPc.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-XXtVPc.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XXtVPc.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n248tau256v1/ref
Compiler: clang -O3 -fwrapv -mavx -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-UFti8o.s: Assembler messages:
encrypt.c: /tmp/cc-UFti8o.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-UFti8o.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-UFti8o.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-UFti8o.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-PA2hnJ.s: Assembler messages:
omdsha256.c: /tmp/cc-PA2hnJ.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PA2hnJ.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PA2hnJ.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PA2hnJ.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PA2hnJ.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PA2hnJ.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PA2hnJ.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PA2hnJ.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PA2hnJ.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PA2hnJ.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PA2hnJ.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PA2hnJ.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PA2hnJ.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PA2hnJ.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PA2hnJ.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PA2hnJ.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PA2hnJ.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PA2hnJ.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PA2hnJ.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PA2hnJ.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PA2hnJ.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PA2hnJ.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n248tau256v1/ref
Compiler: clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-xb710L.s: Assembler messages:
encrypt.c: /tmp/cc-xb710L.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-xb710L.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-xb710L.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-xb710L.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-CYcGf7.s: Assembler messages:
omdsha256.c: /tmp/cc-CYcGf7.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-CYcGf7.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-CYcGf7.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-CYcGf7.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-CYcGf7.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-CYcGf7.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-CYcGf7.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-CYcGf7.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-CYcGf7.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-CYcGf7.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-CYcGf7.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-CYcGf7.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-CYcGf7.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-CYcGf7.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-CYcGf7.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-CYcGf7.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-CYcGf7.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-CYcGf7.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-CYcGf7.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-CYcGf7.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-CYcGf7.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-CYcGf7.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref