Implementation notes: mipso32, h1mips, crypto_aead/omdsha256k256n104tau160v1

Computer: h1mips
Architecture: mipso32
CPU ID: unknown CPU ID
SUPERCOP version: 20140622
Operation: crypto_aead
Primitive: omdsha256k256n104tau160v1

Time	Implementation	Compiler	Benchmark date	SUPERCOP version
919568	`ref`	`gcc -funroll-loops -O3 -fomit-frame-pointer`	20140602	20140525
919826	`ref`	`gcc -funroll-loops -mabi=32 -O3 -fomit-frame-pointer`	20140602	20140525
923196	`ref`	`gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer`	20140602	20140525
927976	`ref`	`gcc -fno-schedule-insns -O3 -fomit-frame-pointer`	20140602	20140525
934396	`ref`	`gcc -O3 -fomit-frame-pointer`	20140602	20140525
934644	`ref`	`gcc -mabi=32 -O3 -fomit-frame-pointer`	20140602	20140525
1027068	`ref`	`gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer`	20140602	20140525
1036114	`ref`	`gcc -funroll-loops -mabi=32 -O2 -fomit-frame-pointer`	20140602	20140525
1037194	`ref`	`gcc -funroll-loops -O2 -fomit-frame-pointer`	20140602	20140525
1088482	`ref`	`gcc -mabi=32 -O2 -fomit-frame-pointer`	20140602	20140525
1088612	`ref`	`gcc -O2 -fomit-frame-pointer`	20140602	20140525
1094300	`ref`	`gcc -fno-schedule-insns -O2 -fomit-frame-pointer`	20140602	20140525
1109694	`ref`	`gcc -funroll-loops -O -fomit-frame-pointer`	20140602	20140525
1109728	`ref`	`gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer`	20140602	20140525
1109770	`ref`	`gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer`	20140602	20140525
1158866	`ref`	`gcc -fno-schedule-insns -Os -fomit-frame-pointer`	20140602	20140525
1160662	`ref`	`gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer`	20140602	20140525
1182142	`ref`	`gcc -mabi=32 -O -fomit-frame-pointer`	20140602	20140525
1182144	`ref`	`gcc -fno-schedule-insns -O -fomit-frame-pointer`	20140602	20140525
1182148	`ref`	`gcc -O -fomit-frame-pointer`	20140602	20140525
1234004	`ref`	`gcc -funroll-loops -Os -fomit-frame-pointer`	20140602	20140525
1234036	`ref`	`gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer`	20140602	20140525
1235906	`ref`	`gcc -Os -fomit-frame-pointer`	20140602	20140525
1235956	`ref`	`gcc -mabi=32 -Os -fomit-frame-pointer`	20140602	20140525
2884138	`ref`	`gcc`	20140602	20140525
2884242	`ref`	`cc`	20140602	20140525
2884380	`ref`	`gcc -funroll-loops`	20140602	20140525

Compiler output

Implementation: crypto_aead/omdsha256k256n104tau160v1/ref
Compiler: clang -O3 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-9aoHvW.s: Assembler messages:
encrypt.c: /tmp/cc-9aoHvW.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-9aoHvW.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-9aoHvW.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-9aoHvW.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-U4nLte.s: Assembler messages:
omdsha256.c: /tmp/cc-U4nLte.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U4nLte.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U4nLte.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U4nLte.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U4nLte.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U4nLte.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U4nLte.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U4nLte.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U4nLte.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U4nLte.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U4nLte.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U4nLte.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U4nLte.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U4nLte.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U4nLte.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U4nLte.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U4nLte.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U4nLte.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U4nLte.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U4nLte.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U4nLte.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U4nLte.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n104tau160v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-Ayb403.s: Assembler messages:
encrypt.c: /tmp/cc-Ayb403.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-Ayb403.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-Ayb403.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-Ayb403.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-WMrcvd.s: Assembler messages:
omdsha256.c: /tmp/cc-WMrcvd.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-WMrcvd.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-WMrcvd.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-WMrcvd.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-WMrcvd.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-WMrcvd.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-WMrcvd.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-WMrcvd.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-WMrcvd.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-WMrcvd.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-WMrcvd.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-WMrcvd.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-WMrcvd.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-WMrcvd.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-WMrcvd.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-WMrcvd.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-WMrcvd.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-WMrcvd.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-WMrcvd.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-WMrcvd.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n104tau160v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-STi7Po.s: Assembler messages:
encrypt.c: /tmp/cc-STi7Po.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-STi7Po.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-STi7Po.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-STi7Po.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-pxdyAJ.s: Assembler messages:
omdsha256.c: /tmp/cc-pxdyAJ.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-pxdyAJ.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-pxdyAJ.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-pxdyAJ.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-pxdyAJ.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-pxdyAJ.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-pxdyAJ.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-pxdyAJ.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-pxdyAJ.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-pxdyAJ.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-pxdyAJ.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-pxdyAJ.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-pxdyAJ.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-pxdyAJ.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-pxdyAJ.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-pxdyAJ.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-pxdyAJ.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-pxdyAJ.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-pxdyAJ.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-pxdyAJ.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n104tau160v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-TdF4yV.s: Assembler messages:
encrypt.c: /tmp/cc-TdF4yV.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-TdF4yV.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-TdF4yV.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-TdF4yV.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-uKM6tg.s: Assembler messages:
omdsha256.c: /tmp/cc-uKM6tg.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-uKM6tg.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-uKM6tg.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-uKM6tg.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-uKM6tg.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-uKM6tg.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-uKM6tg.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-uKM6tg.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-uKM6tg.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-uKM6tg.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-uKM6tg.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-uKM6tg.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-uKM6tg.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-uKM6tg.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-uKM6tg.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-uKM6tg.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-uKM6tg.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-uKM6tg.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-uKM6tg.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-uKM6tg.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n104tau160v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-qjQTYa.s: Assembler messages:
encrypt.c: /tmp/cc-qjQTYa.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-qjQTYa.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-qjQTYa.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-qjQTYa.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-QdNfCk.s: Assembler messages:
omdsha256.c: /tmp/cc-QdNfCk.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-QdNfCk.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-QdNfCk.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-QdNfCk.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-QdNfCk.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-QdNfCk.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-QdNfCk.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-QdNfCk.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-QdNfCk.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-QdNfCk.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-QdNfCk.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-QdNfCk.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-QdNfCk.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-QdNfCk.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-QdNfCk.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-QdNfCk.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-QdNfCk.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-QdNfCk.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-QdNfCk.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-QdNfCk.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n104tau160v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-iUkiZ9.s: Assembler messages:
encrypt.c: /tmp/cc-iUkiZ9.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-iUkiZ9.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-iUkiZ9.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-iUkiZ9.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-oMk35n.s: Assembler messages:
omdsha256.c: /tmp/cc-oMk35n.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-oMk35n.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-oMk35n.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-oMk35n.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-oMk35n.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-oMk35n.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-oMk35n.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-oMk35n.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-oMk35n.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-oMk35n.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-oMk35n.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-oMk35n.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-oMk35n.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-oMk35n.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-oMk35n.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-oMk35n.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-oMk35n.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-oMk35n.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-oMk35n.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-oMk35n.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n104tau160v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-OAGSek.s: Assembler messages:
encrypt.c: /tmp/cc-OAGSek.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-OAGSek.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-OAGSek.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-OAGSek.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-UmpmYs.s: Assembler messages:
omdsha256.c: /tmp/cc-UmpmYs.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-UmpmYs.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-UmpmYs.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-UmpmYs.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-UmpmYs.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-UmpmYs.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-UmpmYs.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-UmpmYs.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-UmpmYs.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-UmpmYs.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-UmpmYs.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-UmpmYs.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-UmpmYs.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-UmpmYs.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-UmpmYs.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-UmpmYs.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-UmpmYs.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-UmpmYs.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-UmpmYs.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-UmpmYs.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n104tau160v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-FFGv0J.s: Assembler messages:
encrypt.c: /tmp/cc-FFGv0J.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-FFGv0J.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-FFGv0J.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-FFGv0J.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-SDXpq5.s: Assembler messages:
omdsha256.c: /tmp/cc-SDXpq5.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-SDXpq5.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-SDXpq5.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-SDXpq5.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-SDXpq5.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-SDXpq5.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-SDXpq5.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-SDXpq5.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-SDXpq5.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-SDXpq5.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-SDXpq5.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-SDXpq5.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-SDXpq5.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-SDXpq5.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-SDXpq5.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-SDXpq5.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-SDXpq5.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-SDXpq5.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-SDXpq5.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-SDXpq5.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n104tau160v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-Ejcyvq.s: Assembler messages:
encrypt.c: /tmp/cc-Ejcyvq.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-Ejcyvq.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-Ejcyvq.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-Ejcyvq.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-JsthpL.s: Assembler messages:
omdsha256.c: /tmp/cc-JsthpL.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-JsthpL.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-JsthpL.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-JsthpL.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-JsthpL.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-JsthpL.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-JsthpL.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-JsthpL.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-JsthpL.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-JsthpL.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-JsthpL.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-JsthpL.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-JsthpL.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-JsthpL.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-JsthpL.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-JsthpL.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-JsthpL.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-JsthpL.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-JsthpL.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-JsthpL.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n104tau160v1/ref
Compiler: clang -O3 -fwrapv -march=native -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-MtYqbx.s: Assembler messages:
encrypt.c: /tmp/cc-MtYqbx.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-MtYqbx.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-MtYqbx.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-MtYqbx.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-VS20BS.s: Assembler messages:
omdsha256.c: /tmp/cc-VS20BS.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-VS20BS.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-VS20BS.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-VS20BS.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-VS20BS.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-VS20BS.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-VS20BS.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-VS20BS.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-VS20BS.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-VS20BS.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-VS20BS.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-VS20BS.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-VS20BS.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-VS20BS.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-VS20BS.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-VS20BS.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-VS20BS.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-VS20BS.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-VS20BS.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-VS20BS.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n104tau160v1/ref
Compiler: clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-IQ16Vg.s: Assembler messages:
encrypt.c: /tmp/cc-IQ16Vg.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-IQ16Vg.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-IQ16Vg.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-IQ16Vg.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-4mJrev.s: Assembler messages:
omdsha256.c: /tmp/cc-4mJrev.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-4mJrev.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-4mJrev.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-4mJrev.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-4mJrev.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-4mJrev.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-4mJrev.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-4mJrev.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-4mJrev.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-4mJrev.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-4mJrev.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-4mJrev.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-4mJrev.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-4mJrev.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-4mJrev.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-4mJrev.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-4mJrev.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-4mJrev.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-4mJrev.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-4mJrev.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n104tau160v1/ref
Compiler: clang -O3 -fwrapv -mavx2 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-Jfxdfk.s: Assembler messages:
encrypt.c: /tmp/cc-Jfxdfk.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-Jfxdfk.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-Jfxdfk.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-Jfxdfk.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-ssFmqF.s: Assembler messages:
omdsha256.c: /tmp/cc-ssFmqF.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ssFmqF.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-ssFmqF.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ssFmqF.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-ssFmqF.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ssFmqF.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-ssFmqF.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ssFmqF.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-ssFmqF.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ssFmqF.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-ssFmqF.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ssFmqF.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-ssFmqF.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ssFmqF.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-ssFmqF.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ssFmqF.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-ssFmqF.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ssFmqF.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-ssFmqF.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ssFmqF.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-ssFmqF.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ssFmqF.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n104tau160v1/ref
Compiler: clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-bZvGSB.s: Assembler messages:
encrypt.c: /tmp/cc-bZvGSB.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-bZvGSB.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-bZvGSB.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-bZvGSB.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-EXT3pV.s: Assembler messages:
omdsha256.c: /tmp/cc-EXT3pV.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-EXT3pV.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-EXT3pV.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-EXT3pV.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-EXT3pV.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-EXT3pV.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-EXT3pV.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-EXT3pV.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-EXT3pV.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-EXT3pV.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-EXT3pV.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-EXT3pV.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-EXT3pV.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-EXT3pV.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-EXT3pV.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-EXT3pV.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-EXT3pV.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-EXT3pV.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-EXT3pV.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-EXT3pV.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-EXT3pV.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-EXT3pV.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n104tau160v1/ref
Compiler: clang -O3 -fwrapv -mavx -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-X0PstU.s: Assembler messages:
encrypt.c: /tmp/cc-X0PstU.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-X0PstU.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-X0PstU.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-X0PstU.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-ivvvUf.s: Assembler messages:
omdsha256.c: /tmp/cc-ivvvUf.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ivvvUf.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-ivvvUf.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ivvvUf.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-ivvvUf.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ivvvUf.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-ivvvUf.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ivvvUf.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-ivvvUf.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ivvvUf.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-ivvvUf.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ivvvUf.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-ivvvUf.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ivvvUf.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-ivvvUf.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ivvvUf.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-ivvvUf.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ivvvUf.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-ivvvUf.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ivvvUf.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-ivvvUf.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-ivvvUf.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k256n104tau160v1/ref
Compiler: clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-4PdXMp.s: Assembler messages:
encrypt.c: /tmp/cc-4PdXMp.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-4PdXMp.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-4PdXMp.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-4PdXMp.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-vyOhGH.s: Assembler messages:
omdsha256.c: /tmp/cc-vyOhGH.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-vyOhGH.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-vyOhGH.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-vyOhGH.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-vyOhGH.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-vyOhGH.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-vyOhGH.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-vyOhGH.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-vyOhGH.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-vyOhGH.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-vyOhGH.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-vyOhGH.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-vyOhGH.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-vyOhGH.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-vyOhGH.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-vyOhGH.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-vyOhGH.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-vyOhGH.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-vyOhGH.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-vyOhGH.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-vyOhGH.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-vyOhGH.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref