Implementation notes: mipso32, h1mips, crypto_aead/omdsha256k128n96tau96v1

Computer: h1mips
Architecture: mipso32
CPU ID: unknown CPU ID
SUPERCOP version: 20140622
Operation: crypto_aead
Primitive: omdsha256k128n96tau96v1

Time	Implementation	Compiler	Benchmark date	SUPERCOP version
920032	`ref`	`gcc -funroll-loops -O3 -fomit-frame-pointer`	20140602	20140525
920038	`ref`	`gcc -funroll-loops -mabi=32 -O3 -fomit-frame-pointer`	20140602	20140525
923188	`ref`	`gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer`	20140602	20140525
928770	`ref`	`gcc -fno-schedule-insns -O3 -fomit-frame-pointer`	20140602	20140525
934706	`ref`	`gcc -O3 -fomit-frame-pointer`	20140602	20140525
934716	`ref`	`gcc -mabi=32 -O3 -fomit-frame-pointer`	20140602	20140525
1027120	`ref`	`gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer`	20140602	20140525
1036204	`ref`	`gcc -funroll-loops -O2 -fomit-frame-pointer`	20140602	20140525
1036204	`ref`	`gcc -funroll-loops -mabi=32 -O2 -fomit-frame-pointer`	20140602	20140525
1088532	`ref`	`gcc -mabi=32 -O2 -fomit-frame-pointer`	20140602	20140525
1088968	`ref`	`gcc -O2 -fomit-frame-pointer`	20140602	20140525
1094308	`ref`	`gcc -fno-schedule-insns -O2 -fomit-frame-pointer`	20140602	20140525
1109826	`ref`	`gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer`	20140602	20140525
1109948	`ref`	`gcc -funroll-loops -O -fomit-frame-pointer`	20140602	20140525
1110658	`ref`	`gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer`	20140602	20140525
1158946	`ref`	`gcc -fno-schedule-insns -Os -fomit-frame-pointer`	20140602	20140525
1160672	`ref`	`gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer`	20140602	20140525
1182526	`ref`	`gcc -O -fomit-frame-pointer`	20140602	20140525
1182646	`ref`	`gcc -mabi=32 -O -fomit-frame-pointer`	20140602	20140525
1182658	`ref`	`gcc -fno-schedule-insns -O -fomit-frame-pointer`	20140602	20140525
1234084	`ref`	`gcc -funroll-loops -Os -fomit-frame-pointer`	20140602	20140525
1235020	`ref`	`gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer`	20140602	20140525
1235706	`ref`	`gcc -mabi=32 -Os -fomit-frame-pointer`	20140602	20140525
1235722	`ref`	`gcc -Os -fomit-frame-pointer`	20140602	20140525
2884222	`ref`	`cc`	20140602	20140525
2884222	`ref`	`gcc -funroll-loops`	20140602	20140525
2884234	`ref`	`gcc`	20140602	20140525

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau96v1/ref
Compiler: clang -O3 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-gPAQjT.s: Assembler messages:
encrypt.c: /tmp/cc-gPAQjT.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-gPAQjT.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-gPAQjT.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-gPAQjT.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-v56AKe.s: Assembler messages:
omdsha256.c: /tmp/cc-v56AKe.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-v56AKe.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-v56AKe.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-v56AKe.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-v56AKe.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-v56AKe.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-v56AKe.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-v56AKe.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-v56AKe.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-v56AKe.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-v56AKe.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-v56AKe.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-v56AKe.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-v56AKe.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-v56AKe.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-v56AKe.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-v56AKe.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-v56AKe.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-v56AKe.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-v56AKe.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-v56AKe.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-v56AKe.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau96v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-RHwDN0.s: Assembler messages:
encrypt.c: /tmp/cc-RHwDN0.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-RHwDN0.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-RHwDN0.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-RHwDN0.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-L0OcCe.s: Assembler messages:
omdsha256.c: /tmp/cc-L0OcCe.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-L0OcCe.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-L0OcCe.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-L0OcCe.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-L0OcCe.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-L0OcCe.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-L0OcCe.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-L0OcCe.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-L0OcCe.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-L0OcCe.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-L0OcCe.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-L0OcCe.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-L0OcCe.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-L0OcCe.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-L0OcCe.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-L0OcCe.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-L0OcCe.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-L0OcCe.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-L0OcCe.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-L0OcCe.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau96v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-eUdWvG.s: Assembler messages:
encrypt.c: /tmp/cc-eUdWvG.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-eUdWvG.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-eUdWvG.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-eUdWvG.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-j9rkU1.s: Assembler messages:
omdsha256.c: /tmp/cc-j9rkU1.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-j9rkU1.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-j9rkU1.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-j9rkU1.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-j9rkU1.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-j9rkU1.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-j9rkU1.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-j9rkU1.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-j9rkU1.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-j9rkU1.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-j9rkU1.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-j9rkU1.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-j9rkU1.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-j9rkU1.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-j9rkU1.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-j9rkU1.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-j9rkU1.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-j9rkU1.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-j9rkU1.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-j9rkU1.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau96v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-c9FHA0.s: Assembler messages:
encrypt.c: /tmp/cc-c9FHA0.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-c9FHA0.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-c9FHA0.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-c9FHA0.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-sgjKLe.s: Assembler messages:
omdsha256.c: /tmp/cc-sgjKLe.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sgjKLe.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sgjKLe.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sgjKLe.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sgjKLe.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sgjKLe.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sgjKLe.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sgjKLe.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sgjKLe.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sgjKLe.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sgjKLe.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sgjKLe.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sgjKLe.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sgjKLe.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sgjKLe.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sgjKLe.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sgjKLe.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sgjKLe.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sgjKLe.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sgjKLe.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau96v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-VSGiQF.s: Assembler messages:
encrypt.c: /tmp/cc-VSGiQF.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-VSGiQF.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-VSGiQF.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-VSGiQF.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-U5Rpe1.s: Assembler messages:
omdsha256.c: /tmp/cc-U5Rpe1.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U5Rpe1.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U5Rpe1.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U5Rpe1.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U5Rpe1.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U5Rpe1.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U5Rpe1.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U5Rpe1.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U5Rpe1.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U5Rpe1.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U5Rpe1.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U5Rpe1.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U5Rpe1.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U5Rpe1.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U5Rpe1.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U5Rpe1.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U5Rpe1.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U5Rpe1.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U5Rpe1.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U5Rpe1.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau96v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-T3IJnj.s: Assembler messages:
encrypt.c: /tmp/cc-T3IJnj.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-T3IJnj.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-T3IJnj.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-T3IJnj.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-AZD8vE.s: Assembler messages:
omdsha256.c: /tmp/cc-AZD8vE.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-AZD8vE.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-AZD8vE.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-AZD8vE.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-AZD8vE.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-AZD8vE.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-AZD8vE.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-AZD8vE.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-AZD8vE.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-AZD8vE.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-AZD8vE.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-AZD8vE.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-AZD8vE.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-AZD8vE.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-AZD8vE.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-AZD8vE.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-AZD8vE.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-AZD8vE.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-AZD8vE.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-AZD8vE.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau96v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-JvKRJ2.s: Assembler messages:
encrypt.c: /tmp/cc-JvKRJ2.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-JvKRJ2.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-JvKRJ2.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-JvKRJ2.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-PQ808e.s: Assembler messages:
omdsha256.c: /tmp/cc-PQ808e.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PQ808e.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PQ808e.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PQ808e.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PQ808e.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PQ808e.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PQ808e.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PQ808e.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PQ808e.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PQ808e.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PQ808e.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PQ808e.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PQ808e.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PQ808e.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PQ808e.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PQ808e.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PQ808e.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PQ808e.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PQ808e.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PQ808e.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau96v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-IqQxhj.s: Assembler messages:
encrypt.c: /tmp/cc-IqQxhj.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-IqQxhj.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-IqQxhj.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-IqQxhj.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-1wJswD.s: Assembler messages:
omdsha256.c: /tmp/cc-1wJswD.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-1wJswD.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-1wJswD.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-1wJswD.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-1wJswD.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-1wJswD.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-1wJswD.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-1wJswD.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-1wJswD.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-1wJswD.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-1wJswD.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-1wJswD.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-1wJswD.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-1wJswD.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-1wJswD.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-1wJswD.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-1wJswD.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-1wJswD.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-1wJswD.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-1wJswD.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau96v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-uo9Sa6.s: Assembler messages:
encrypt.c: /tmp/cc-uo9Sa6.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-uo9Sa6.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-uo9Sa6.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-uo9Sa6.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-SX6LSg.s: Assembler messages:
omdsha256.c: /tmp/cc-SX6LSg.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-SX6LSg.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-SX6LSg.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-SX6LSg.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-SX6LSg.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-SX6LSg.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-SX6LSg.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-SX6LSg.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-SX6LSg.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-SX6LSg.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-SX6LSg.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-SX6LSg.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-SX6LSg.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-SX6LSg.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-SX6LSg.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-SX6LSg.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-SX6LSg.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-SX6LSg.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-SX6LSg.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-SX6LSg.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau96v1/ref
Compiler: clang -O3 -fwrapv -march=native -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-xEbbn2.s: Assembler messages:
encrypt.c: /tmp/cc-xEbbn2.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-xEbbn2.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-xEbbn2.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-xEbbn2.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-HlRTDd.s: Assembler messages:
omdsha256.c: /tmp/cc-HlRTDd.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-HlRTDd.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-HlRTDd.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-HlRTDd.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-HlRTDd.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-HlRTDd.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-HlRTDd.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-HlRTDd.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-HlRTDd.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-HlRTDd.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-HlRTDd.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-HlRTDd.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-HlRTDd.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-HlRTDd.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-HlRTDd.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-HlRTDd.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-HlRTDd.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-HlRTDd.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-HlRTDd.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-HlRTDd.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau96v1/ref
Compiler: clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-ifp5WE.s: Assembler messages:
encrypt.c: /tmp/cc-ifp5WE.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-ifp5WE.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-ifp5WE.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-ifp5WE.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-VD2PD1.s: Assembler messages:
omdsha256.c: /tmp/cc-VD2PD1.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-VD2PD1.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-VD2PD1.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-VD2PD1.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-VD2PD1.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-VD2PD1.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-VD2PD1.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-VD2PD1.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-VD2PD1.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-VD2PD1.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-VD2PD1.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-VD2PD1.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-VD2PD1.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-VD2PD1.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-VD2PD1.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-VD2PD1.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-VD2PD1.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-VD2PD1.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-VD2PD1.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-VD2PD1.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau96v1/ref
Compiler: clang -O3 -fwrapv -mavx2 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-s1VADc.s: Assembler messages:
encrypt.c: /tmp/cc-s1VADc.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-s1VADc.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-s1VADc.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-s1VADc.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-XRUYOx.s: Assembler messages:
omdsha256.c: /tmp/cc-XRUYOx.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XRUYOx.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-XRUYOx.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XRUYOx.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-XRUYOx.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XRUYOx.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-XRUYOx.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XRUYOx.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-XRUYOx.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XRUYOx.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-XRUYOx.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XRUYOx.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-XRUYOx.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XRUYOx.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-XRUYOx.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XRUYOx.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-XRUYOx.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XRUYOx.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-XRUYOx.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XRUYOx.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-XRUYOx.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-XRUYOx.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau96v1/ref
Compiler: clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-PtBWof.s: Assembler messages:
encrypt.c: /tmp/cc-PtBWof.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-PtBWof.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-PtBWof.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-PtBWof.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-mOLxRB.s: Assembler messages:
omdsha256.c: /tmp/cc-mOLxRB.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mOLxRB.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mOLxRB.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mOLxRB.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mOLxRB.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mOLxRB.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mOLxRB.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mOLxRB.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mOLxRB.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mOLxRB.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mOLxRB.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mOLxRB.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mOLxRB.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mOLxRB.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mOLxRB.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mOLxRB.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mOLxRB.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mOLxRB.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mOLxRB.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mOLxRB.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mOLxRB.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mOLxRB.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau96v1/ref
Compiler: clang -O3 -fwrapv -mavx -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-m7Kgbu.s: Assembler messages:
encrypt.c: /tmp/cc-m7Kgbu.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-m7Kgbu.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-m7Kgbu.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-m7Kgbu.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-PSOylP.s: Assembler messages:
omdsha256.c: /tmp/cc-PSOylP.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PSOylP.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PSOylP.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PSOylP.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PSOylP.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PSOylP.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PSOylP.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PSOylP.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PSOylP.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PSOylP.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PSOylP.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PSOylP.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PSOylP.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PSOylP.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PSOylP.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PSOylP.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PSOylP.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PSOylP.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PSOylP.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PSOylP.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-PSOylP.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-PSOylP.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau96v1/ref
Compiler: clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-ZbCgys.s: Assembler messages:
encrypt.c: /tmp/cc-ZbCgys.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-ZbCgys.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-ZbCgys.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-ZbCgys.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-K5H4YN.s: Assembler messages:
omdsha256.c: /tmp/cc-K5H4YN.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-K5H4YN.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-K5H4YN.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-K5H4YN.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-K5H4YN.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-K5H4YN.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-K5H4YN.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-K5H4YN.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-K5H4YN.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-K5H4YN.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-K5H4YN.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-K5H4YN.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-K5H4YN.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-K5H4YN.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-K5H4YN.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-K5H4YN.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-K5H4YN.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-K5H4YN.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-K5H4YN.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-K5H4YN.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-K5H4YN.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-K5H4YN.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref