Implementation notes: mipso32, h1mips, crypto_aead/omdsha256k128n96tau64v1

Computer: h1mips
Architecture: mipso32
CPU ID: unknown CPU ID
SUPERCOP version: 20140622
Operation: crypto_aead
Primitive: omdsha256k128n96tau64v1

Time	Implementation	Compiler	Benchmark date	SUPERCOP version
919996	`ref`	`gcc -funroll-loops -mabi=32 -O3 -fomit-frame-pointer`	20140602	20140525
920046	`ref`	`gcc -funroll-loops -O3 -fomit-frame-pointer`	20140602	20140525
923208	`ref`	`gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer`	20140602	20140525
928030	`ref`	`gcc -fno-schedule-insns -O3 -fomit-frame-pointer`	20140602	20140525
934816	`ref`	`gcc -mabi=32 -O3 -fomit-frame-pointer`	20140602	20140525
934912	`ref`	`gcc -O3 -fomit-frame-pointer`	20140602	20140525
1027368	`ref`	`gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer`	20140602	20140525
1036050	`ref`	`gcc -funroll-loops -O2 -fomit-frame-pointer`	20140602	20140525
1036138	`ref`	`gcc -funroll-loops -mabi=32 -O2 -fomit-frame-pointer`	20140602	20140525
1088512	`ref`	`gcc -mabi=32 -O2 -fomit-frame-pointer`	20140602	20140525
1088992	`ref`	`gcc -O2 -fomit-frame-pointer`	20140602	20140525
1094290	`ref`	`gcc -fno-schedule-insns -O2 -fomit-frame-pointer`	20140602	20140525
1109776	`ref`	`gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer`	20140602	20140525
1109776	`ref`	`gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer`	20140602	20140525
1110358	`ref`	`gcc -funroll-loops -O -fomit-frame-pointer`	20140602	20140525
1158918	`ref`	`gcc -fno-schedule-insns -Os -fomit-frame-pointer`	20140602	20140525
1161194	`ref`	`gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer`	20140602	20140525
1182476	`ref`	`gcc -O -fomit-frame-pointer`	20140602	20140525
1182476	`ref`	`gcc -fno-schedule-insns -O -fomit-frame-pointer`	20140602	20140525
1182482	`ref`	`gcc -mabi=32 -O -fomit-frame-pointer`	20140602	20140525
1234982	`ref`	`gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer`	20140602	20140525
1234988	`ref`	`gcc -funroll-loops -Os -fomit-frame-pointer`	20140602	20140525
1235024	`ref`	`gcc -mabi=32 -Os -fomit-frame-pointer`	20140602	20140525
1235668	`ref`	`gcc -Os -fomit-frame-pointer`	20140602	20140525
2884194	`ref`	`gcc`	20140602	20140525
2884194	`ref`	`gcc -funroll-loops`	20140602	20140525
2884490	`ref`	`cc`	20140602	20140525

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau64v1/ref
Compiler: clang -O3 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-l5mLkd.s: Assembler messages:
encrypt.c: /tmp/cc-l5mLkd.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-l5mLkd.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-l5mLkd.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-l5mLkd.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-U3YqIm.s: Assembler messages:
omdsha256.c: /tmp/cc-U3YqIm.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U3YqIm.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U3YqIm.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U3YqIm.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U3YqIm.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U3YqIm.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U3YqIm.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U3YqIm.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U3YqIm.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U3YqIm.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U3YqIm.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U3YqIm.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U3YqIm.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U3YqIm.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U3YqIm.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U3YqIm.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U3YqIm.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U3YqIm.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U3YqIm.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U3YqIm.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-U3YqIm.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-U3YqIm.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau64v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-YMaNrf.s: Assembler messages:
encrypt.c: /tmp/cc-YMaNrf.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-YMaNrf.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-YMaNrf.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-YMaNrf.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-sz1Mmo.s: Assembler messages:
omdsha256.c: /tmp/cc-sz1Mmo.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sz1Mmo.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sz1Mmo.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sz1Mmo.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sz1Mmo.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sz1Mmo.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sz1Mmo.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sz1Mmo.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sz1Mmo.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sz1Mmo.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sz1Mmo.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sz1Mmo.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sz1Mmo.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sz1Mmo.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sz1Mmo.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sz1Mmo.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sz1Mmo.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sz1Mmo.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sz1Mmo.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sz1Mmo.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau64v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-bR5EOK.s: Assembler messages:
encrypt.c: /tmp/cc-bR5EOK.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-bR5EOK.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-bR5EOK.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-bR5EOK.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-Y2kzN2.s: Assembler messages:
omdsha256.c: /tmp/cc-Y2kzN2.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Y2kzN2.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Y2kzN2.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Y2kzN2.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Y2kzN2.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Y2kzN2.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Y2kzN2.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Y2kzN2.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Y2kzN2.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Y2kzN2.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Y2kzN2.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Y2kzN2.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Y2kzN2.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Y2kzN2.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Y2kzN2.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Y2kzN2.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Y2kzN2.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Y2kzN2.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Y2kzN2.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Y2kzN2.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau64v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-rxDHsL.s: Assembler messages:
encrypt.c: /tmp/cc-rxDHsL.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-rxDHsL.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-rxDHsL.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-rxDHsL.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-oMBDF5.s: Assembler messages:
omdsha256.c: /tmp/cc-oMBDF5.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-oMBDF5.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-oMBDF5.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-oMBDF5.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-oMBDF5.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-oMBDF5.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-oMBDF5.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-oMBDF5.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-oMBDF5.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-oMBDF5.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-oMBDF5.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-oMBDF5.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-oMBDF5.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-oMBDF5.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-oMBDF5.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-oMBDF5.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-oMBDF5.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-oMBDF5.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-oMBDF5.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-oMBDF5.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau64v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-mQXPnm.s: Assembler messages:
encrypt.c: /tmp/cc-mQXPnm.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-mQXPnm.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-mQXPnm.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-mQXPnm.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-1cpg1G.s: Assembler messages:
omdsha256.c: /tmp/cc-1cpg1G.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-1cpg1G.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-1cpg1G.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-1cpg1G.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-1cpg1G.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-1cpg1G.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-1cpg1G.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-1cpg1G.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-1cpg1G.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-1cpg1G.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-1cpg1G.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-1cpg1G.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-1cpg1G.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-1cpg1G.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-1cpg1G.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-1cpg1G.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-1cpg1G.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-1cpg1G.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-1cpg1G.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-1cpg1G.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau64v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-kLXyEk.s: Assembler messages:
encrypt.c: /tmp/cc-kLXyEk.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-kLXyEk.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-kLXyEk.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-kLXyEk.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-BnXfSE.s: Assembler messages:
omdsha256.c: /tmp/cc-BnXfSE.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-BnXfSE.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-BnXfSE.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-BnXfSE.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-BnXfSE.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-BnXfSE.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-BnXfSE.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-BnXfSE.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-BnXfSE.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-BnXfSE.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-BnXfSE.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-BnXfSE.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-BnXfSE.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-BnXfSE.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-BnXfSE.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-BnXfSE.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-BnXfSE.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-BnXfSE.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-BnXfSE.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-BnXfSE.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau64v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-28D0W8.s: Assembler messages:
encrypt.c: /tmp/cc-28D0W8.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-28D0W8.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-28D0W8.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-28D0W8.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-krKegh.s: Assembler messages:
omdsha256.c: /tmp/cc-krKegh.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-krKegh.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-krKegh.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-krKegh.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-krKegh.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-krKegh.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-krKegh.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-krKegh.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-krKegh.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-krKegh.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-krKegh.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-krKegh.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-krKegh.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-krKegh.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-krKegh.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-krKegh.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-krKegh.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-krKegh.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-krKegh.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-krKegh.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau64v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-O9Daba.s: Assembler messages:
encrypt.c: /tmp/cc-O9Daba.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-O9Daba.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-O9Daba.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-O9Daba.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-sxfq9m.s: Assembler messages:
omdsha256.c: /tmp/cc-sxfq9m.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sxfq9m.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sxfq9m.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sxfq9m.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sxfq9m.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sxfq9m.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sxfq9m.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sxfq9m.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sxfq9m.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sxfq9m.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sxfq9m.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sxfq9m.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sxfq9m.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sxfq9m.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sxfq9m.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sxfq9m.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sxfq9m.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sxfq9m.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sxfq9m.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sxfq9m.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau64v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-7Jqpc7.s: Assembler messages:
encrypt.c: /tmp/cc-7Jqpc7.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-7Jqpc7.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-7Jqpc7.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-7Jqpc7.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-xPsxOh.s: Assembler messages:
omdsha256.c: /tmp/cc-xPsxOh.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-xPsxOh.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-xPsxOh.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-xPsxOh.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-xPsxOh.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-xPsxOh.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-xPsxOh.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-xPsxOh.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-xPsxOh.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-xPsxOh.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-xPsxOh.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-xPsxOh.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-xPsxOh.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-xPsxOh.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-xPsxOh.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-xPsxOh.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-xPsxOh.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-xPsxOh.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-xPsxOh.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-xPsxOh.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau64v1/ref
Compiler: clang -O3 -fwrapv -march=native -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-WHmQbO.s: Assembler messages:
encrypt.c: /tmp/cc-WHmQbO.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-WHmQbO.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-WHmQbO.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-WHmQbO.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-d2ekB9.s: Assembler messages:
omdsha256.c: /tmp/cc-d2ekB9.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-d2ekB9.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-d2ekB9.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-d2ekB9.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-d2ekB9.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-d2ekB9.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-d2ekB9.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-d2ekB9.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-d2ekB9.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-d2ekB9.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-d2ekB9.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-d2ekB9.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-d2ekB9.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-d2ekB9.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-d2ekB9.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-d2ekB9.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-d2ekB9.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-d2ekB9.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-d2ekB9.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-d2ekB9.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau64v1/ref
Compiler: clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-XZUZhu.s: Assembler messages:
encrypt.c: /tmp/cc-XZUZhu.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-XZUZhu.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-XZUZhu.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-XZUZhu.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-Sr0jEP.s: Assembler messages:
omdsha256.c: /tmp/cc-Sr0jEP.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Sr0jEP.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Sr0jEP.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Sr0jEP.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Sr0jEP.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Sr0jEP.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Sr0jEP.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Sr0jEP.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Sr0jEP.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Sr0jEP.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Sr0jEP.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Sr0jEP.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Sr0jEP.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Sr0jEP.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Sr0jEP.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Sr0jEP.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Sr0jEP.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Sr0jEP.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Sr0jEP.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Sr0jEP.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau64v1/ref
Compiler: clang -O3 -fwrapv -mavx2 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-1tzsTn.s: Assembler messages:
encrypt.c: /tmp/cc-1tzsTn.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-1tzsTn.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-1tzsTn.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-1tzsTn.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-2u91lH.s: Assembler messages:
omdsha256.c: /tmp/cc-2u91lH.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-2u91lH.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-2u91lH.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-2u91lH.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-2u91lH.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-2u91lH.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-2u91lH.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-2u91lH.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-2u91lH.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-2u91lH.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-2u91lH.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-2u91lH.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-2u91lH.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-2u91lH.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-2u91lH.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-2u91lH.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-2u91lH.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-2u91lH.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-2u91lH.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-2u91lH.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-2u91lH.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-2u91lH.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau64v1/ref
Compiler: clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-XoEcan.s: Assembler messages:
encrypt.c: /tmp/cc-XoEcan.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-XoEcan.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-XoEcan.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-XoEcan.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-sP3DkI.s: Assembler messages:
omdsha256.c: /tmp/cc-sP3DkI.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sP3DkI.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sP3DkI.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sP3DkI.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sP3DkI.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sP3DkI.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sP3DkI.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sP3DkI.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sP3DkI.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sP3DkI.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sP3DkI.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sP3DkI.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sP3DkI.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sP3DkI.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sP3DkI.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sP3DkI.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sP3DkI.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sP3DkI.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sP3DkI.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sP3DkI.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-sP3DkI.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-sP3DkI.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau64v1/ref
Compiler: clang -O3 -fwrapv -mavx -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-ttjQUf.s: Assembler messages:
encrypt.c: /tmp/cc-ttjQUf.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-ttjQUf.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-ttjQUf.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-ttjQUf.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-h3AX6o.s: Assembler messages:
omdsha256.c: /tmp/cc-h3AX6o.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-h3AX6o.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-h3AX6o.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-h3AX6o.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-h3AX6o.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-h3AX6o.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-h3AX6o.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-h3AX6o.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-h3AX6o.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-h3AX6o.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-h3AX6o.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-h3AX6o.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-h3AX6o.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-h3AX6o.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-h3AX6o.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-h3AX6o.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-h3AX6o.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-h3AX6o.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-h3AX6o.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-h3AX6o.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-h3AX6o.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-h3AX6o.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau64v1/ref
Compiler: clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-XA6IKO.s: Assembler messages:
encrypt.c: /tmp/cc-XA6IKO.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-XA6IKO.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-XA6IKO.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-XA6IKO.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-G4ZM1c.s: Assembler messages:
omdsha256.c: /tmp/cc-G4ZM1c.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-G4ZM1c.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-G4ZM1c.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-G4ZM1c.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-G4ZM1c.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-G4ZM1c.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-G4ZM1c.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-G4ZM1c.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-G4ZM1c.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-G4ZM1c.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-G4ZM1c.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-G4ZM1c.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-G4ZM1c.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-G4ZM1c.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-G4ZM1c.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-G4ZM1c.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-G4ZM1c.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-G4ZM1c.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-G4ZM1c.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-G4ZM1c.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-G4ZM1c.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-G4ZM1c.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref