Implementation notes: mipso32, h1mips, crypto_aead/omdsha256k128n96tau128v1

Computer: h1mips
Architecture: mipso32
CPU ID: unknown CPU ID
SUPERCOP version: 20140622
Operation: crypto_aead
Primitive: omdsha256k128n96tau128v1

Time	Implementation	Compiler	Benchmark date	SUPERCOP version
919630	`ref`	`gcc -funroll-loops -O3 -fomit-frame-pointer`	20140602	20140525
919630	`ref`	`gcc -funroll-loops -mabi=32 -O3 -fomit-frame-pointer`	20140602	20140525
923148	`ref`	`gcc -funroll-loops -fno-schedule-insns -O3 -fomit-frame-pointer`	20140602	20140525
928052	`ref`	`gcc -fno-schedule-insns -O3 -fomit-frame-pointer`	20140602	20140525
934654	`ref`	`gcc -O3 -fomit-frame-pointer`	20140602	20140525
934668	`ref`	`gcc -mabi=32 -O3 -fomit-frame-pointer`	20140602	20140525
1027866	`ref`	`gcc -funroll-loops -fno-schedule-insns -O2 -fomit-frame-pointer`	20140602	20140525
1036186	`ref`	`gcc -funroll-loops -mabi=32 -O2 -fomit-frame-pointer`	20140602	20140525
1036350	`ref`	`gcc -funroll-loops -O2 -fomit-frame-pointer`	20140602	20140525
1088760	`ref`	`gcc -O2 -fomit-frame-pointer`	20140602	20140525
1088800	`ref`	`gcc -mabi=32 -O2 -fomit-frame-pointer`	20140602	20140525
1094276	`ref`	`gcc -fno-schedule-insns -O2 -fomit-frame-pointer`	20140602	20140525
1109780	`ref`	`gcc -funroll-loops -O -fomit-frame-pointer`	20140602	20140525
1109862	`ref`	`gcc -funroll-loops -fno-schedule-insns -O -fomit-frame-pointer`	20140602	20140525
1110122	`ref`	`gcc -funroll-loops -mabi=32 -O -fomit-frame-pointer`	20140602	20140525
1158880	`ref`	`gcc -fno-schedule-insns -Os -fomit-frame-pointer`	20140602	20140525
1160626	`ref`	`gcc -funroll-loops -fno-schedule-insns -Os -fomit-frame-pointer`	20140602	20140525
1182566	`ref`	`gcc -O -fomit-frame-pointer`	20140602	20140525
1182584	`ref`	`gcc -mabi=32 -O -fomit-frame-pointer`	20140602	20140525
1182880	`ref`	`gcc -fno-schedule-insns -O -fomit-frame-pointer`	20140602	20140525
1234044	`ref`	`gcc -funroll-loops -Os -fomit-frame-pointer`	20140602	20140525
1234584	`ref`	`gcc -funroll-loops -mabi=32 -Os -fomit-frame-pointer`	20140602	20140525
1235648	`ref`	`gcc -Os -fomit-frame-pointer`	20140602	20140525
1235924	`ref`	`gcc -mabi=32 -Os -fomit-frame-pointer`	20140602	20140525
2884170	`ref`	`cc`	20140602	20140525
2884334	`ref`	`gcc -funroll-loops`	20140602	20140525
2885110	`ref`	`gcc`	20140602	20140525

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau128v1/ref
Compiler: clang -O3 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-x2UgTU.s: Assembler messages:
encrypt.c: /tmp/cc-x2UgTU.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-x2UgTU.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-x2UgTU.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-x2UgTU.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-gjSjzf.s: Assembler messages:
omdsha256.c: /tmp/cc-gjSjzf.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-gjSjzf.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-gjSjzf.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-gjSjzf.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-gjSjzf.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-gjSjzf.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-gjSjzf.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-gjSjzf.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-gjSjzf.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-gjSjzf.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-gjSjzf.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-gjSjzf.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-gjSjzf.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-gjSjzf.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-gjSjzf.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-gjSjzf.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-gjSjzf.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-gjSjzf.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-gjSjzf.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-gjSjzf.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-gjSjzf.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-gjSjzf.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau128v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-h1MtNH.s: Assembler messages:
encrypt.c: /tmp/cc-h1MtNH.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-h1MtNH.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-h1MtNH.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-h1MtNH.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-mpM6S5.s: Assembler messages:
omdsha256.c: /tmp/cc-mpM6S5.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mpM6S5.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mpM6S5.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mpM6S5.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mpM6S5.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mpM6S5.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mpM6S5.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mpM6S5.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mpM6S5.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mpM6S5.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mpM6S5.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mpM6S5.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mpM6S5.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mpM6S5.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mpM6S5.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mpM6S5.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mpM6S5.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mpM6S5.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mpM6S5.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mpM6S5.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau128v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-4Qb8YG.s: Assembler messages:
encrypt.c: /tmp/cc-4Qb8YG.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-4Qb8YG.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-4Qb8YG.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-4Qb8YG.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-Vwiug2.s: Assembler messages:
omdsha256.c: /tmp/cc-Vwiug2.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Vwiug2.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Vwiug2.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Vwiug2.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Vwiug2.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Vwiug2.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Vwiug2.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Vwiug2.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Vwiug2.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Vwiug2.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Vwiug2.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Vwiug2.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Vwiug2.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Vwiug2.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Vwiug2.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Vwiug2.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Vwiug2.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Vwiug2.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-Vwiug2.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-Vwiug2.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau128v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-7JBh1g.s: Assembler messages:
encrypt.c: /tmp/cc-7JBh1g.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-7JBh1g.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-7JBh1g.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-7JBh1g.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-F9AWWu.s: Assembler messages:
omdsha256.c: /tmp/cc-F9AWWu.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-F9AWWu.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-F9AWWu.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-F9AWWu.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-F9AWWu.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-F9AWWu.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-F9AWWu.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-F9AWWu.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-F9AWWu.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-F9AWWu.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-F9AWWu.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-F9AWWu.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-F9AWWu.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-F9AWWu.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-F9AWWu.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-F9AWWu.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-F9AWWu.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-F9AWWu.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-F9AWWu.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-F9AWWu.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau128v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-DSMvRs.s: Assembler messages:
encrypt.c: /tmp/cc-DSMvRs.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-DSMvRs.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-DSMvRs.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-DSMvRs.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-mxkRAN.s: Assembler messages:
omdsha256.c: /tmp/cc-mxkRAN.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mxkRAN.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mxkRAN.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mxkRAN.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mxkRAN.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mxkRAN.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mxkRAN.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mxkRAN.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mxkRAN.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mxkRAN.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mxkRAN.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mxkRAN.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mxkRAN.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mxkRAN.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mxkRAN.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mxkRAN.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mxkRAN.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mxkRAN.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-mxkRAN.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-mxkRAN.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau128v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-mawD7x.s: Assembler messages:
encrypt.c: /tmp/cc-mawD7x.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-mawD7x.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-mawD7x.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-mawD7x.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-3CkeHU.s: Assembler messages:
omdsha256.c: /tmp/cc-3CkeHU.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-3CkeHU.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-3CkeHU.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-3CkeHU.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-3CkeHU.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-3CkeHU.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-3CkeHU.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-3CkeHU.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-3CkeHU.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-3CkeHU.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-3CkeHU.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-3CkeHU.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-3CkeHU.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-3CkeHU.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-3CkeHU.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-3CkeHU.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-3CkeHU.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-3CkeHU.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-3CkeHU.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-3CkeHU.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau128v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-fPwx9v.s: Assembler messages:
encrypt.c: /tmp/cc-fPwx9v.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-fPwx9v.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-fPwx9v.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-fPwx9v.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-qy6ArQ.s: Assembler messages:
omdsha256.c: /tmp/cc-qy6ArQ.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-qy6ArQ.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-qy6ArQ.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-qy6ArQ.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-qy6ArQ.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-qy6ArQ.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-qy6ArQ.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-qy6ArQ.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-qy6ArQ.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-qy6ArQ.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-qy6ArQ.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-qy6ArQ.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-qy6ArQ.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-qy6ArQ.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-qy6ArQ.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-qy6ArQ.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-qy6ArQ.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-qy6ArQ.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-qy6ArQ.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-qy6ArQ.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=neon -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau128v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-wbdL0o.s: Assembler messages:
encrypt.c: /tmp/cc-wbdL0o.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-wbdL0o.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-wbdL0o.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-wbdL0o.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-TzckXJ.s: Assembler messages:
omdsha256.c: /tmp/cc-TzckXJ.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-TzckXJ.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-TzckXJ.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-TzckXJ.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-TzckXJ.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-TzckXJ.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-TzckXJ.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-TzckXJ.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-TzckXJ.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-TzckXJ.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-TzckXJ.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-TzckXJ.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-TzckXJ.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-TzckXJ.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-TzckXJ.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-TzckXJ.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-TzckXJ.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-TzckXJ.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-TzckXJ.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-TzckXJ.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau128v1/ref
Compiler: clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-YQ6txb.s: Assembler messages:
encrypt.c: /tmp/cc-YQ6txb.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-YQ6txb.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-YQ6txb.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-YQ6txb.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-CyCJTp.s: Assembler messages:
omdsha256.c: /tmp/cc-CyCJTp.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-CyCJTp.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-CyCJTp.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-CyCJTp.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-CyCJTp.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-CyCJTp.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-CyCJTp.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-CyCJTp.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-CyCJTp.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-CyCJTp.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-CyCJTp.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-CyCJTp.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-CyCJTp.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-CyCJTp.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-CyCJTp.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-CyCJTp.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-CyCJTp.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-CyCJTp.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-CyCJTp.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-CyCJTp.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -fomit-frame-pointer -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau128v1/ref
Compiler: clang -O3 -fwrapv -march=native -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-QA4Qbw.s: Assembler messages:
encrypt.c: /tmp/cc-QA4Qbw.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-QA4Qbw.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-QA4Qbw.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-QA4Qbw.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-5g3gtQ.s: Assembler messages:
omdsha256.c: /tmp/cc-5g3gtQ.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-5g3gtQ.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-5g3gtQ.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-5g3gtQ.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-5g3gtQ.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-5g3gtQ.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-5g3gtQ.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-5g3gtQ.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-5g3gtQ.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-5g3gtQ.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-5g3gtQ.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-5g3gtQ.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-5g3gtQ.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-5g3gtQ.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-5g3gtQ.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-5g3gtQ.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-5g3gtQ.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-5g3gtQ.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-5g3gtQ.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-5g3gtQ.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau128v1/ref
Compiler: clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: '+0' is not a recognized feature for this target (ignoring feature)
encrypt.c: '0' is not a recognized processor for this target (ignoring processor)
encrypt.c: /tmp/cc-FTd9nb.s: Assembler messages:
encrypt.c: /tmp/cc-FTd9nb.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-FTd9nb.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-FTd9nb.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-FTd9nb.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: '+0' is not a recognized feature for this target (ignoring feature)
omdsha256.c: '0' is not a recognized processor for this target (ignoring processor)
omdsha256.c: /tmp/cc-4FJQQw.s: Assembler messages:
omdsha256.c: /tmp/cc-4FJQQw.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-4FJQQw.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-4FJQQw.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-4FJQQw.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-4FJQQw.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-4FJQQw.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-4FJQQw.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-4FJQQw.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-4FJQQw.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-4FJQQw.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-4FJQQw.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-4FJQQw.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-4FJQQw.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-4FJQQw.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-4FJQQw.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-4FJQQw.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-4FJQQw.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-4FJQQw.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-4FJQQw.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-4FJQQw.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -march=native -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau128v1/ref
Compiler: clang -O3 -fwrapv -mavx2 -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-zmmhbk.s: Assembler messages:
encrypt.c: /tmp/cc-zmmhbk.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-zmmhbk.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-zmmhbk.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-zmmhbk.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-lXActt.s: Assembler messages:
omdsha256.c: /tmp/cc-lXActt.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-lXActt.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-lXActt.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-lXActt.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-lXActt.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-lXActt.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-lXActt.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-lXActt.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-lXActt.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-lXActt.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-lXActt.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-lXActt.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-lXActt.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-lXActt.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-lXActt.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-lXActt.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-lXActt.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-lXActt.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-lXActt.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-lXActt.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-lXActt.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-lXActt.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau128v1/ref
Compiler: clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-fbAcJA.s: Assembler messages:
encrypt.c: /tmp/cc-fbAcJA.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-fbAcJA.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-fbAcJA.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-fbAcJA.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-AX4PZY.s: Assembler messages:
omdsha256.c: /tmp/cc-AX4PZY.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-AX4PZY.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-AX4PZY.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-AX4PZY.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-AX4PZY.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-AX4PZY.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-AX4PZY.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-AX4PZY.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-AX4PZY.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-AX4PZY.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-AX4PZY.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-AX4PZY.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-AX4PZY.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-AX4PZY.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-AX4PZY.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-AX4PZY.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-AX4PZY.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-AX4PZY.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-AX4PZY.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-AX4PZY.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-AX4PZY.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-AX4PZY.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx2 -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau128v1/ref
Compiler: clang -O3 -fwrapv -mavx -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-hc6TsW.s: Assembler messages:
encrypt.c: /tmp/cc-hc6TsW.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-hc6TsW.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-hc6TsW.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-hc6TsW.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-OG9WQh.s: Assembler messages:
omdsha256.c: /tmp/cc-OG9WQh.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-OG9WQh.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-OG9WQh.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-OG9WQh.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-OG9WQh.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-OG9WQh.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-OG9WQh.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-OG9WQh.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-OG9WQh.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-OG9WQh.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-OG9WQh.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-OG9WQh.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-OG9WQh.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-OG9WQh.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-OG9WQh.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-OG9WQh.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-OG9WQh.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-OG9WQh.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-OG9WQh.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-OG9WQh.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-OG9WQh.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-OG9WQh.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fomit-frame-pointer	ref

Compiler output

Implementation: crypto_aead/omdsha256k128n96tau128v1/ref
Compiler: clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer

encrypt.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
encrypt.c: '+' is not a recognized feature for this target (ignoring feature)
encrypt.c: /tmp/cc-TZm2Py.s: Assembler messages:
encrypt.c: /tmp/cc-TZm2Py.s:40: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-TZm2Py.s:40: Warning: Macro instruction expanded into multiple instructions
encrypt.c: /tmp/cc-TZm2Py.s:107: Warning: No .cprestore pseudo-op used in PIC code
encrypt.c: /tmp/cc-TZm2Py.s:107: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: clang: warning: unknown platform, assuming -mfloat-abi=soft
omdsha256.c: '+' is not a recognized feature for this target (ignoring feature)
omdsha256.c: /tmp/cc-MM9UiU.s: Assembler messages:
omdsha256.c: /tmp/cc-MM9UiU.s:166: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-MM9UiU.s:166: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-MM9UiU.s:217: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-MM9UiU.s:217: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-MM9UiU.s:222: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-MM9UiU.s:222: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-MM9UiU.s:227: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-MM9UiU.s:227: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-MM9UiU.s:264: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-MM9UiU.s:264: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-MM9UiU.s:427: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-MM9UiU.s:427: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-MM9UiU.s:633: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-MM9UiU.s:633: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-MM9UiU.s:731: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-MM9UiU.s:731: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-MM9UiU.s:740: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-MM9UiU.s:740: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-MM9UiU.s:745: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-MM9UiU.s:745: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: /tmp/cc-MM9UiU.s:826: Warning: No .cprestore pseudo-op used in PIC code
omdsha256.c: /tmp/cc-MM9UiU.s:826: Warning: Macro instruction expanded into multiple instructions
omdsha256.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -O3 -fwrapv -mavx -fpolly -funroll-loops -fvectorize -fslp-vectorize -fslp-vectorize-aggressive -fomit-frame-pointer	ref