Implementation notes: armeabi, novena, crypto_aead/omdsha256k128n96tau128v1

Computer: novena
Architecture: armeabi
CPU ID: unknown CPU ID
SUPERCOP version: 20220506
Operation: crypto_aead
Primitive: omdsha256k128n96tau128v1

Checksum failure

Implementation: T:ref
Security model: timingleaks
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
2ea0302fbdb0f2b947d6dcf42130db0c1f427fc58e58d3b8619e459c974395ca
Number of similar (compiler,implementation) pairs: 9, namely:
CompilerImplementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:ref
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:ref
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:ref
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:ref
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:ref
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:ref
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:ref
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE T:ref
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE T:ref

Compiler output

Implementation: T:avx1
Security model: timingleaks
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
encrypt.c: <inline asm>:1:1: error: unknown directive
encrypt.c: .intel_syntax noprefix
encrypt.c: ^
encrypt.c: <inline asm>:3:12: error: invalid alignment value
encrypt.c: .align 32
encrypt.c: ^
encrypt.c: <inline asm>:5:6: error: invalid operand for instruction
encrypt.c: push rbx
encrypt.c: ^
encrypt.c: <inline asm>:6:10: error: invalid operand for instruction
encrypt.c: push rbp
encrypt.c: ^
encrypt.c: <inline asm>:7:10: error: invalid operand for instruction
encrypt.c: push r13
encrypt.c: ^
encrypt.c: <inline asm>:8:10: error: invalid operand for instruction
encrypt.c: push r14
encrypt.c: ^
encrypt.c: <inline asm>:9:10: error: invalid operand for instruction
encrypt.c: push r15
encrypt.c: ^
encrypt.c: <inline asm>:10:9: error: operand must be a register in range [r0, r15]
encrypt.c: sub rsp,32
encrypt.c: ^
encrypt.c: <inline asm>:11:5: error: invalid instruction, did you mean: lsl, sel?
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 8, namely:
CompilerImplementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:avx1
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:avx1
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:avx1
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:avx1
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:sse4
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:sse4
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:sse4
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:sse4

Compiler output

Implementation: T:avx1
Security model: timingleaks
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
encrypt.c: <inline asm>:1:1: error: unknown directive
encrypt.c: .intel_syntax noprefix
encrypt.c: ^
encrypt.c: <inline asm>:3:12: error: invalid alignment value
encrypt.c: .align 32
encrypt.c: ^
encrypt.c: <inline asm>:5:6: error: invalid operand for instruction
encrypt.c: push rbx
encrypt.c: ^
encrypt.c: <inline asm>:6:10: error: invalid operand for instruction
encrypt.c: push rbp
encrypt.c: ^
encrypt.c: <inline asm>:7:10: error: invalid operand for instruction
encrypt.c: push r13
encrypt.c: ^
encrypt.c: <inline asm>:8:10: error: invalid operand for instruction
encrypt.c: push r14
encrypt.c: ^
encrypt.c: <inline asm>:9:10: error: invalid operand for instruction
encrypt.c: push r15
encrypt.c: ^
encrypt.c: <inline asm>:10:9: error: operand must be a register in range [r0, r15]
encrypt.c: sub rsp,32
encrypt.c: ^
encrypt.c: <inline asm>:11:5: error: invalid instruction, did you mean: lsl, sel, vqshl, vrshl, vshl, vshll?
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 2, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:avx1 T:sse4

Compiler output

Implementation: T:avx1
Security model: timingleaks
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/ccGG6LiN.s: Assembler messages:
encrypt.c: /tmp/ccGG6LiN.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccGG6LiN.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccGG6LiN.s:23: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccGG6LiN.s:24: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccGG6LiN.s:25: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccGG6LiN.s:26: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccGG6LiN.s:27: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccGG6LiN.s:28: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccGG6LiN.s:29: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccGG6LiN.s:30: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccGG6LiN.s:31: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccGG6LiN.s:32: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccGG6LiN.s:33: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccGG6LiN.s:34: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccGG6LiN.s:35: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccGG6LiN.s:36: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccGG6LiN.s:37: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccGG6LiN.s:38: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccGG6LiN.s:39: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccGG6LiN.s:40: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccGG6LiN.s:41: Error: bad instruction `vmovdqa xmm13,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccGG6LiN.s:42: Error: bad instruction `vmovdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccGG6LiN.s:43: Error: bad instruction `vmovdqa xmm12,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccGG6LiN.s:45: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:avx1

Compiler output

Implementation: T:avx1
Security model: timingleaks
Compiler: gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/ccRikOqt.s: Assembler messages:
encrypt.c: /tmp/ccRikOqt.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccRikOqt.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccRikOqt.s:23: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccRikOqt.s:24: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccRikOqt.s:25: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccRikOqt.s:26: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccRikOqt.s:27: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccRikOqt.s:28: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccRikOqt.s:29: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccRikOqt.s:30: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccRikOqt.s:31: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccRikOqt.s:32: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccRikOqt.s:33: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccRikOqt.s:34: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccRikOqt.s:35: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccRikOqt.s:36: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccRikOqt.s:37: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccRikOqt.s:38: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccRikOqt.s:39: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccRikOqt.s:40: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccRikOqt.s:41: Error: bad instruction `vmovdqa xmm13,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccRikOqt.s:42: Error: bad instruction `vmovdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccRikOqt.s:43: Error: bad instruction `vmovdqa xmm12,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccRikOqt.s:45: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:avx1

Compiler output

Implementation: T:avx1
Security model: timingleaks
Compiler: gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/ccofLf5q.s: Assembler messages:
encrypt.c: /tmp/ccofLf5q.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccofLf5q.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccofLf5q.s:23: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccofLf5q.s:24: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccofLf5q.s:25: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccofLf5q.s:26: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccofLf5q.s:27: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccofLf5q.s:28: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccofLf5q.s:29: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccofLf5q.s:30: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccofLf5q.s:31: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccofLf5q.s:32: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccofLf5q.s:33: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccofLf5q.s:34: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccofLf5q.s:35: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccofLf5q.s:36: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccofLf5q.s:37: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccofLf5q.s:38: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccofLf5q.s:39: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccofLf5q.s:40: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccofLf5q.s:41: Error: bad instruction `vmovdqa xmm13,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccofLf5q.s:42: Error: bad instruction `vmovdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccofLf5q.s:43: Error: bad instruction `vmovdqa xmm12,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccofLf5q.s:45: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE T:avx1

Compiler output

Implementation: T:avx1
Security model: timingleaks
Compiler: gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/ccBvu1t2.s: Assembler messages:
encrypt.c: /tmp/ccBvu1t2.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccBvu1t2.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccBvu1t2.s:23: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccBvu1t2.s:24: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccBvu1t2.s:25: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccBvu1t2.s:26: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccBvu1t2.s:27: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccBvu1t2.s:28: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccBvu1t2.s:29: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccBvu1t2.s:30: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccBvu1t2.s:31: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccBvu1t2.s:32: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccBvu1t2.s:33: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccBvu1t2.s:34: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccBvu1t2.s:35: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccBvu1t2.s:36: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccBvu1t2.s:37: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccBvu1t2.s:38: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccBvu1t2.s:39: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccBvu1t2.s:40: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccBvu1t2.s:41: Error: bad instruction `vmovdqa xmm13,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccBvu1t2.s:42: Error: bad instruction `vmovdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccBvu1t2.s:43: Error: bad instruction `vmovdqa xmm12,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccBvu1t2.s:45: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE T:avx1

Compiler output

Implementation: T:sse4
Security model: timingleaks
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/ccpGiunw.s: Assembler messages:
encrypt.c: /tmp/ccpGiunw.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccpGiunw.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccpGiunw.s:22: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccpGiunw.s:23: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccpGiunw.s:24: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccpGiunw.s:25: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccpGiunw.s:26: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccpGiunw.s:27: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccpGiunw.s:28: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccpGiunw.s:29: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccpGiunw.s:30: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccpGiunw.s:31: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccpGiunw.s:32: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccpGiunw.s:33: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccpGiunw.s:34: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccpGiunw.s:35: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccpGiunw.s:36: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccpGiunw.s:37: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccpGiunw.s:38: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccpGiunw.s:39: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccpGiunw.s:40: Error: bad instruction `movdqa xmm12,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccpGiunw.s:41: Error: bad instruction `movdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccpGiunw.s:42: Error: bad instruction `movdqa xmm11,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccpGiunw.s:44: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:sse4

Compiler output

Implementation: T:sse4
Security model: timingleaks
Compiler: gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/ccabCn2m.s: Assembler messages:
encrypt.c: /tmp/ccabCn2m.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccabCn2m.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccabCn2m.s:22: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccabCn2m.s:23: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccabCn2m.s:24: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccabCn2m.s:25: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccabCn2m.s:26: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccabCn2m.s:27: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccabCn2m.s:28: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccabCn2m.s:29: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccabCn2m.s:30: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccabCn2m.s:31: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccabCn2m.s:32: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccabCn2m.s:33: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccabCn2m.s:34: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccabCn2m.s:35: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccabCn2m.s:36: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccabCn2m.s:37: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccabCn2m.s:38: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccabCn2m.s:39: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccabCn2m.s:40: Error: bad instruction `movdqa xmm12,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccabCn2m.s:41: Error: bad instruction `movdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccabCn2m.s:42: Error: bad instruction `movdqa xmm11,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccabCn2m.s:44: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE T:sse4

Compiler output

Implementation: T:sse4
Security model: timingleaks
Compiler: gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/cckvXAUB.s: Assembler messages:
encrypt.c: /tmp/cckvXAUB.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/cckvXAUB.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/cckvXAUB.s:22: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/cckvXAUB.s:23: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/cckvXAUB.s:24: Error: expression too complex -- `push r13'
encrypt.c: /tmp/cckvXAUB.s:25: Error: expression too complex -- `push r14'
encrypt.c: /tmp/cckvXAUB.s:26: Error: expression too complex -- `push r15'
encrypt.c: /tmp/cckvXAUB.s:27: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/cckvXAUB.s:28: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/cckvXAUB.s:29: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/cckvXAUB.s:30: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/cckvXAUB.s:31: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/cckvXAUB.s:32: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/cckvXAUB.s:33: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/cckvXAUB.s:34: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/cckvXAUB.s:35: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/cckvXAUB.s:36: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/cckvXAUB.s:37: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/cckvXAUB.s:38: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/cckvXAUB.s:39: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/cckvXAUB.s:40: Error: bad instruction `movdqa xmm12,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/cckvXAUB.s:41: Error: bad instruction `movdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/cckvXAUB.s:42: Error: bad instruction `movdqa xmm11,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/cckvXAUB.s:44: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE T:sse4

Compiler output

Implementation: T:sse4
Security model: timingleaks
Compiler: gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE
encrypt.c: /tmp/ccXaNxYA.s: Assembler messages:
encrypt.c: /tmp/ccXaNxYA.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccXaNxYA.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccXaNxYA.s:22: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccXaNxYA.s:23: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccXaNxYA.s:24: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccXaNxYA.s:25: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccXaNxYA.s:26: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccXaNxYA.s:27: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccXaNxYA.s:28: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccXaNxYA.s:29: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccXaNxYA.s:30: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccXaNxYA.s:31: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccXaNxYA.s:32: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccXaNxYA.s:33: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccXaNxYA.s:34: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccXaNxYA.s:35: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccXaNxYA.s:36: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccXaNxYA.s:37: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccXaNxYA.s:38: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccXaNxYA.s:39: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccXaNxYA.s:40: Error: bad instruction `movdqa xmm12,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccXaNxYA.s:41: Error: bad instruction `movdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccXaNxYA.s:42: Error: bad instruction `movdqa xmm11,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccXaNxYA.s:44: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE T:sse4