Implementation notes: armeabi, berry0, crypto_hash/asconhashabi32v12

Computer: berry0
Microarchitecture: armeabi; ARM1176 (410fb767)
Architecture: armeabi
CPU ID: unknown CPU ID
SUPERCOP version: 20240107
Operation: crypto_hash
Primitive: asconhashabi32v12

Time	Object size	Test size	Implementation	Compiler	Benchmark date	SUPERCOP version
94575	5044 0 0	13424 380 744	`bi32_armv6`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
94678	5064 0 0	15177 384 744	`bi32_armv6`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
94829	5064 0 0	15177 384 744	`bi32_armv6`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
94978	5064 0 0	15905 384 752	`bi32_armv6`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
95307	4964 0 0	12895 380 744	`bi32_armv6`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240122	20240107
95345	4968 0 0	14696 384 744	`bi32_armv6`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240122	20240107
95450	5088 0 0	15985 384 752	`bi32_armv6`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
96255	4964 0 0	12359 372 744	`bi32_armv6`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240122	20240107
99180	5200 0 0	13143 380 744	`bi32_armv6`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240122	20240107
133970	6612 0 0	16336 384 744	`bi32`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240122	20240107
134693	6608 0 0	14535 380 744	`bi32`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240122	20240107
142502	6984 0 0	17819 384 752	`bi32`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
142508	6984 0 0	17091 384 744	`bi32`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
142547	6964 0 0	15338 380 744	`bi32`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
142575	6984 0 0	17091 384 744	`bi32`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
145008	6900 0 0	14287 372 744	`bi32`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240122	20240107
150852	8816 0 0	18556 384 744	`ref`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240122	20240107
157939	7408 0 0	18299 384 752	`bi32`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
159979	7916 0 0	15879 380 744	`ref`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240122	20240107
163695	2244 0 0	12000 388 744	`bi32_lowreg`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240122	20240107
164320	2208 0 0	10167 384 744	`bi32_lowreg`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240122	20240107
171824	7116 0 0	15055 380 744	`bi32`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240122	20240107
172833	8792 0 0	16743 380 744	`ref`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240122	20240107
173275	940 0 0	8359 376 744	`bi32_lowsize`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240122	20240107
173513	980 0 0	8935 384 744	`bi32_lowsize`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240122	20240107
173637	984 0 0	10736 388 744	`bi32_lowsize`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240122	20240107
190720	1892 0 0	9311 376 744	`bi32_lowreg`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240122	20240107
203160	1980 0 0	12850 384 752	`ref`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
203270	1176 0 0	9143 384 744	`bi32_lowsize`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240122	20240107
203304	1980 0 0	12122 384 744	`ref`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
203490	1980 0 0	12122 384 744	`ref`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
209186	2360 0 0	12490 388 744	`bi32_lowreg`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
209298	2360 0 0	12490 388 744	`bi32_lowreg`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
209510	2360 0 0	10761 384 744	`bi32_lowreg`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
209663	2360 0 0	13218 388 752	`bi32_lowreg`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
210926	1140 0 0	9554 384 744	`bi32_lowsize`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
211030	1160 0 0	12035 388 752	`bi32_lowsize`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
211050	1160 0 0	11307 388 744	`bi32_lowsize`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
211323	1160 0 0	11307 388 744	`bi32_lowsize`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
211772	2252 0 0	10223 384 744	`bi32_lowreg`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240122	20240107
214285	2008 0 0	12930 384 752	`ref`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
221363	1168 0 0	8572 372 744	`ref`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240122	20240107
226905	1208 0 0	12139 388 752	`bi32_lowsize`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
231740	2540 0 0	13458 388 752	`bi32_lowreg`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107
235088	1656 0 0	10065 380 744	`ref`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240122	20240107

Compiler output

Implementation: bi32_armv6m
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

hash.c: In file included from hash.c:4:
hash.c: In file included from ./permutations.h:11:
hash.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
hash.c: "@.syntax_unified\n\t"
hash.c: ^
hash.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
hash.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
hash.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
hash.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
hash.c: 5 errors generated.

Number of similar (compiler,implementation) pairs: 4, namely:

Compiler	Implementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv6m
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv6m
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv6m
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv6m

Compiler output

Implementation: bi32_armv6m
Security model: constbranchindex
Compiler: clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv6m

Compiler output

Implementation: bi32_armv6m
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE

hash.c: In file included from permutations.h:11,
hash.c: from hash.c:4:
hash.c: hash.c: In function 'crypto_hash_asconhashabi32v12_bi32_armv6m_constbranchindex':
hash.c: round.h:13:3: error: impossible constraint in 'asm'
hash.c: __asm__ __volatile__(
hash.c: ^~~~~~~
hash.c: round.h:13:3: error: impossible constraint in 'asm'
hash.c: __asm__ __volatile__(
hash.c: ^~~~~~~
hash.c: round.h:13:3: error: impossible constraint in 'asm'
hash.c: __asm__ __volatile__(
hash.c: ^~~~~~~

Number of similar (compiler,implementation) pairs: 4, namely:

Compiler	Implementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv6m
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv6m
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv6m
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv6m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

hash.c: In file included from hash.c:4:
hash.c: ./permutations.h:58:3: error: instruction requires: thumb2
hash.c: ROUND5(x0, x1, x2, x3, x4, RC4);
hash.c: ^
hash.c: ./round.h:159:41: note: expanded from macro 'ROUND5'
hash.c: "eor %[tmp2], %[x3_l], %[x4_l]\n\t" \
hash.c: ^
hash.c: <inline asm>:5:2: note: instantiated into assembly here
hash.c: orn r5, r9, r5
hash.c: ^
hash.c: In file included from hash.c:4:
hash.c: ./permutations.h:58:3: error: instruction requires: thumb2
hash.c: ROUND5(x0, x1, x2, x3, x4, RC4);
hash.c: ^
hash.c: ./round.h:175:41: note: expanded from macro 'ROUND5'
hash.c: "eor %[tmp2], %[x3_h], %[x4_h]\n\t" \
hash.c: ^
hash.c: <inline asm>:21:2: note: instantiated into assembly here
hash.c: orn r8, lr, r8
hash.c: ^
hash.c: In file included from hash.c:4:
hash.c: ./permutations.h:59:3: error: instruction requires: thumb2
hash.c: ROUND5(x2, x3, x4, x0, x1, RC5);
hash.c: ^
hash.c: ./round.h:159:41: note: expanded from macro 'ROUND5'
hash.c: ...

Number of similar (compiler,implementation) pairs: 4, namely:

Compiler	Implementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv7m
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv7m
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv7m
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv7m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

hash.c: In file included from hash.c:4:
hash.c: ./permutations.h:58:3: error: instruction requires: thumb2
hash.c: ROUND5(x0, x1, x2, x3, x4, RC4);
hash.c: ^
hash.c: ./round.h:159:41: note: expanded from macro 'ROUND5'
hash.c: "eor %[tmp2], %[x3_l], %[x4_l]\n\t" \
hash.c: ^
hash.c: <inline asm>:5:2: note: instantiated into assembly here
hash.c: orn r5, r9, r5
hash.c: ^
hash.c: In file included from hash.c:4:
hash.c: ./permutations.h:58:3: error: instruction requires: thumb2
hash.c: ROUND5(x0, x1, x2, x3, x4, RC4);
hash.c: ^
hash.c: ./round.h:175:41: note: expanded from macro 'ROUND5'
hash.c: "eor %[tmp2], %[x3_h], %[x4_h]\n\t" \
hash.c: ^
hash.c: <inline asm>:21:2: note: instantiated into assembly here
hash.c: orn r10, lr, r10
hash.c: ^
hash.c: In file included from hash.c:4:
hash.c: ./permutations.h:59:3: error: instruction requires: thumb2
hash.c: ROUND5(x2, x3, x4, x0, x1, RC5);
hash.c: ^
hash.c: ./round.h:159:41: note: expanded from macro 'ROUND5'
hash.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv7m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE

hash.c: /tmp/ccHl0q40.s: Assembler messages:
hash.c: /tmp/ccHl0q40.s:77: Error: selected processor does not support `orn r0,lr,r0' in ARM mode
hash.c: /tmp/ccHl0q40.s:93: Error: selected processor does not support `orn r1,ip,r1' in ARM mode
hash.c: /tmp/ccHl0q40.s:132: Error: selected processor does not support `orn r7,r2,r7' in ARM mode
hash.c: /tmp/ccHl0q40.s:148: Error: selected processor does not support `orn r6,r3,r6' in ARM mode
hash.c: /tmp/ccHl0q40.s:187: Error: selected processor does not support `orn lr,r5,lr' in ARM mode
hash.c: /tmp/ccHl0q40.s:203: Error: selected processor does not support `orn ip,r4,ip' in ARM mode
hash.c: /tmp/ccHl0q40.s:242: Error: selected processor does not support `orn r2,r0,r2' in ARM mode
hash.c: /tmp/ccHl0q40.s:258: Error: selected processor does not support `orn r3,r1,r3' in ARM mode
hash.c: /tmp/ccHl0q40.s:297: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
hash.c: /tmp/ccHl0q40.s:313: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
hash.c: /tmp/ccHl0q40.s:351: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
hash.c: /tmp/ccHl0q40.s:355: Error: selected processor does not support `orn r10,lr,r0' in ARM mode
hash.c: /tmp/ccHl0q40.s:369: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
hash.c: /tmp/ccHl0q40.s:372: Error: selected processor does not support `orn r10,ip,r1' in ARM mode
hash.c: /tmp/ccHl0q40.s:408: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
hash.c: /tmp/ccHl0q40.s:412: Error: selected processor does not support `orn r10,lr,r0' in ARM mode
hash.c: /tmp/ccHl0q40.s:426: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
hash.c: /tmp/ccHl0q40.s:429: Error: selected processor does not support `orn r10,ip,r1' in ARM mode
hash.c: /tmp/ccHl0q40.s:465: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
hash.c: /tmp/ccHl0q40.s:469: Error: selected processor does not support `orn r10,lr,r0' in ARM mode
hash.c: /tmp/ccHl0q40.s:483: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
hash.c: /tmp/ccHl0q40.s:486: Error: selected processor does not support `orn r10,ip,r1' in ARM mode
hash.c: /tmp/ccHl0q40.s:594: Error: selected processor does not support `orn r0,lr,r0' in ARM mode
hash.c: /tmp/ccHl0q40.s:610: Error: selected processor does not support `orn r1,ip,r1' in ARM mode
hash.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv7m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE

hash.c: /tmp/ccIZjAn4.s: Assembler messages:
hash.c: /tmp/ccIZjAn4.s:78: Error: selected processor does not support `orn r0,lr,r0' in ARM mode
hash.c: /tmp/ccIZjAn4.s:94: Error: selected processor does not support `orn r1,ip,r1' in ARM mode
hash.c: /tmp/ccIZjAn4.s:133: Error: selected processor does not support `orn r7,r2,r7' in ARM mode
hash.c: /tmp/ccIZjAn4.s:149: Error: selected processor does not support `orn r6,r3,r6' in ARM mode
hash.c: /tmp/ccIZjAn4.s:188: Error: selected processor does not support `orn lr,r5,lr' in ARM mode
hash.c: /tmp/ccIZjAn4.s:204: Error: selected processor does not support `orn ip,r4,ip' in ARM mode
hash.c: /tmp/ccIZjAn4.s:243: Error: selected processor does not support `orn r2,r0,r2' in ARM mode
hash.c: /tmp/ccIZjAn4.s:259: Error: selected processor does not support `orn r3,r1,r3' in ARM mode
hash.c: /tmp/ccIZjAn4.s:298: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
hash.c: /tmp/ccIZjAn4.s:314: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
hash.c: /tmp/ccIZjAn4.s:352: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
hash.c: /tmp/ccIZjAn4.s:356: Error: selected processor does not support `orn r10,lr,r0' in ARM mode
hash.c: /tmp/ccIZjAn4.s:370: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
hash.c: /tmp/ccIZjAn4.s:373: Error: selected processor does not support `orn r10,ip,r1' in ARM mode
hash.c: /tmp/ccIZjAn4.s:409: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
hash.c: /tmp/ccIZjAn4.s:413: Error: selected processor does not support `orn r10,lr,r0' in ARM mode
hash.c: /tmp/ccIZjAn4.s:427: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
hash.c: /tmp/ccIZjAn4.s:430: Error: selected processor does not support `orn r10,ip,r1' in ARM mode
hash.c: /tmp/ccIZjAn4.s:466: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
hash.c: /tmp/ccIZjAn4.s:470: Error: selected processor does not support `orn r10,lr,r0' in ARM mode
hash.c: /tmp/ccIZjAn4.s:484: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
hash.c: /tmp/ccIZjAn4.s:487: Error: selected processor does not support `orn r10,ip,r1' in ARM mode
hash.c: /tmp/ccIZjAn4.s:595: Error: selected processor does not support `orn r0,lr,r0' in ARM mode
hash.c: /tmp/ccIZjAn4.s:611: Error: selected processor does not support `orn r1,ip,r1' in ARM mode
hash.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv7m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE

hash.c: /tmp/ccbtju4A.s: Assembler messages:
hash.c: /tmp/ccbtju4A.s:89: Error: selected processor does not support `orn r0,lr,r0' in ARM mode
hash.c: /tmp/ccbtju4A.s:105: Error: selected processor does not support `orn r1,ip,r1' in ARM mode
hash.c: /tmp/ccbtju4A.s:144: Error: selected processor does not support `orn r8,r2,r8' in ARM mode
hash.c: /tmp/ccbtju4A.s:160: Error: selected processor does not support `orn r6,r3,r6' in ARM mode
hash.c: /tmp/ccbtju4A.s:199: Error: selected processor does not support `orn lr,r5,lr' in ARM mode
hash.c: /tmp/ccbtju4A.s:215: Error: selected processor does not support `orn ip,r4,ip' in ARM mode
hash.c: /tmp/ccbtju4A.s:254: Error: selected processor does not support `orn r2,r0,r2' in ARM mode
hash.c: /tmp/ccbtju4A.s:270: Error: selected processor does not support `orn r3,r1,r3' in ARM mode
hash.c: /tmp/ccbtju4A.s:309: Error: selected processor does not support `orn r5,r8,r5' in ARM mode
hash.c: /tmp/ccbtju4A.s:325: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
hash.c: /tmp/ccbtju4A.s:363: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
hash.c: /tmp/ccbtju4A.s:367: Error: selected processor does not support `orn r10,lr,r0' in ARM mode
hash.c: /tmp/ccbtju4A.s:381: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
hash.c: /tmp/ccbtju4A.s:384: Error: selected processor does not support `orn r10,ip,r1' in ARM mode
hash.c: /tmp/ccbtju4A.s:420: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
hash.c: /tmp/ccbtju4A.s:424: Error: selected processor does not support `orn r10,lr,r0' in ARM mode
hash.c: /tmp/ccbtju4A.s:438: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
hash.c: /tmp/ccbtju4A.s:441: Error: selected processor does not support `orn r10,ip,r1' in ARM mode
hash.c: /tmp/ccbtju4A.s:477: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
hash.c: /tmp/ccbtju4A.s:481: Error: selected processor does not support `orn r10,lr,r0' in ARM mode
hash.c: /tmp/ccbtju4A.s:495: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
hash.c: /tmp/ccbtju4A.s:498: Error: selected processor does not support `orn r10,ip,r1' in ARM mode
hash.c: /tmp/ccbtju4A.s:621: Error: selected processor does not support `orn r0,lr,r0' in ARM mode
hash.c: /tmp/ccbtju4A.s:637: Error: selected processor does not support `orn r1,ip,r1' in ARM mode
hash.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv7m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE

hash.c: /tmp/ccgwv9iJ.s: Assembler messages:
hash.c: /tmp/ccgwv9iJ.s:113: Error: selected processor does not support `orn lr,r4,lr' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:129: Error: selected processor does not support `orn ip,r2,ip' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:168: Error: selected processor does not support `orn r8,fp,r8' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:184: Error: selected processor does not support `orn r7,r3,r7' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:223: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:239: Error: selected processor does not support `orn r2,r5,r2' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:278: Error: selected processor does not support `orn fp,lr,fp' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:294: Error: selected processor does not support `orn r3,ip,r3' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:333: Error: selected processor does not support `orn r6,r8,r6' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:349: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:388: Error: selected processor does not support `orn lr,r4,lr' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:404: Error: selected processor does not support `orn ip,r2,ip' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:443: Error: selected processor does not support `orn r8,fp,r8' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:459: Error: selected processor does not support `orn r7,r3,r7' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:498: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:514: Error: selected processor does not support `orn r2,r5,r2' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:553: Error: selected processor does not support `orn fp,lr,fp' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:569: Error: selected processor does not support `orn r3,ip,r3' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:608: Error: selected processor does not support `orn r6,r8,r6' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:624: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:662: Error: selected processor does not support `orn r1,lr,fp' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:666: Error: selected processor does not support `orn r0,r4,lr' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:680: Error: selected processor does not support `orn r1,ip,r3' in ARM mode
hash.c: /tmp/ccgwv9iJ.s:683: Error: selected processor does not support `orn r0,r2,ip' in ARM mode
hash.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv7m

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

permutations.c: In file included from permutations.c:1:
permutations.c: In file included from ./permutations.h:11:
permutations.c: ./round.h:18:39: error: instruction requires: thumb2
permutations.c: "eor %[x2_l], %[x2_l], %[x1_l]\n\t"
permutations.c: ^
permutations.c: <inline asm>:6:2: note: instantiated into assembly here
permutations.c: orn r1, r11, r4
permutations.c: ^
permutations.c: In file included from permutations.c:1:
permutations.c: In file included from ./permutations.h:11:
permutations.c: ./round.h:22:39: error: instruction requires: thumb2
permutations.c: "eor %[x0_l], %[x0_l], %[tmp1]\n\t"
permutations.c: ^
permutations.c: <inline asm>:10:2: note: instantiated into assembly here
permutations.c: orn r12, r9, r11
permutations.c: ^
permutations.c: In file included from permutations.c:1:
permutations.c: In file included from ./permutations.h:11:
permutations.c: ./round.h:37:39: error: instruction requires: thumb2
permutations.c: "eor %[x2_h], %[x2_h], %[x1_h]\n\t"
permutations.c: ^
permutations.c: <inline asm>:25:2: note: instantiated into assembly here
permutations.c: orn r1, r5, r0
permutations.c: ^
permutations.c: In file included from permutations.c:1:
permutations.c: ...

Number of similar (compiler,implementation) pairs: 4, namely:

Compiler	Implementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv7m_small
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv7m_small
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv7m_small
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv7m_small

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

permutations.c: In file included from permutations.c:1:
permutations.c: In file included from ./permutations.h:11:
permutations.c: ./round.h:18:39: error: instruction requires: thumb2
permutations.c: "eor %[x2_l], %[x2_l], %[x1_l]\n\t"
permutations.c: ^
permutations.c: <inline asm>:6:2: note: instantiated into assembly here
permutations.c: orn r2, r11, r0
permutations.c: ^
permutations.c: In file included from permutations.c:1:
permutations.c: In file included from ./permutations.h:11:
permutations.c: ./round.h:22:39: error: instruction requires: thumb2
permutations.c: "eor %[x0_l], %[x0_l], %[tmp1]\n\t"
permutations.c: ^
permutations.c: <inline asm>:10:2: note: instantiated into assembly here
permutations.c: orn lr, r7, r11
permutations.c: ^
permutations.c: In file included from permutations.c:1:
permutations.c: In file included from ./permutations.h:11:
permutations.c: ./round.h:37:39: error: instruction requires: thumb2
permutations.c: "eor %[x2_h], %[x2_h], %[x1_h]\n\t"
permutations.c: ^
permutations.c: <inline asm>:25:2: note: instantiated into assembly here
permutations.c: orn r2, r12, r4
permutations.c: ^
permutations.c: In file included from permutations.c:1:
permutations.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv7m_small

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE

permutations.c: /tmp/ccaAexsp.s: Assembler messages:
permutations.c: /tmp/ccaAexsp.s:52: Error: selected processor does not support `orn r10,r1,r9' in ARM mode
permutations.c: /tmp/ccaAexsp.s:56: Error: selected processor does not support `orn r0,lr,r1' in ARM mode
permutations.c: /tmp/ccaAexsp.s:71: Error: selected processor does not support `orn r10,r2,r8' in ARM mode
permutations.c: /tmp/ccaAexsp.s:74: Error: selected processor does not support `orn r0,ip,r2' in ARM mode

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv7m_small

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE

permutations.c: /tmp/ccoUcrOx.s: Assembler messages:
permutations.c: /tmp/ccoUcrOx.s:52: Error: selected processor does not support `orn r10,r1,r9' in ARM mode
permutations.c: /tmp/ccoUcrOx.s:56: Error: selected processor does not support `orn r0,lr,r1' in ARM mode
permutations.c: /tmp/ccoUcrOx.s:71: Error: selected processor does not support `orn r10,r2,r8' in ARM mode
permutations.c: /tmp/ccoUcrOx.s:74: Error: selected processor does not support `orn r0,ip,r2' in ARM mode

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv7m_small

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE

permutations.c: /tmp/cc1XDgbg.s: Assembler messages:
permutations.c: /tmp/cc1XDgbg.s:52: Error: selected processor does not support `orn r0,ip,r10' in ARM mode
permutations.c: /tmp/cc1XDgbg.s:56: Error: selected processor does not support `orn fp,r4,ip' in ARM mode
permutations.c: /tmp/cc1XDgbg.s:71: Error: selected processor does not support `orn r0,r2,r9' in ARM mode
permutations.c: /tmp/cc1XDgbg.s:74: Error: selected processor does not support `orn fp,lr,r2' in ARM mode

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv7m_small

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE

permutations.c: /tmp/ccRJ29cu.s: Assembler messages:
permutations.c: /tmp/ccRJ29cu.s:51: Error: selected processor does not support `orn r0,ip,r10' in ARM mode
permutations.c: /tmp/ccRJ29cu.s:55: Error: selected processor does not support `orn fp,r4,ip' in ARM mode
permutations.c: /tmp/ccRJ29cu.s:70: Error: selected processor does not support `orn r0,r2,r9' in ARM mode
permutations.c: /tmp/ccRJ29cu.s:73: Error: selected processor does not support `orn fp,lr,r2' in ARM mode

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv7m_small

Namespace violations

Implementation: bi32
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

constants.o constants R
permutations.o P12 T
permutations.o P8 T

Number of similar (compiler,implementation) pairs: 18, namely:

Compiler	Implementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv6
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv6
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv6
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv6
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv6
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv6
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv6
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv6
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv6

Namespace violations

Implementation: bi32_lowreg
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

constants.o constants R
hash.o ascon_absorb T
hash.o ascon_inithash T
hash.o ascon_squeeze T

Number of similar (compiler,implementation) pairs: 9, namely:

Compiler	Implementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_lowreg
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_lowreg
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_lowreg
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_lowreg
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_lowreg
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_lowreg
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_lowreg
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_lowreg
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_lowreg

Namespace violations

Implementation: bi32_lowsize
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

constants.o constants R
permutations.o P T

Number of similar (compiler,implementation) pairs: 9, namely:

Compiler	Implementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_lowsize
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_lowsize
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_lowsize
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_lowsize
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_lowsize
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_lowsize
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_lowsize
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_lowsize
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_lowsize