Implementation notes: armeabi, berry0, crypto_aead/ascon128abi32v12

Computer: berry0
Microarchitecture: armeabi; ARM1176 (410fb767)
Architecture: armeabi
CPU ID: unknown CPU ID
SUPERCOP version: 20240107
Operation: crypto_aead
Primitive: ascon128abi32v12
TimeObject sizeTest sizeImplementationCompilerBenchmark dateSUPERCOP version
1937487232 0 021391 380 816bi32_armv6clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
1938777232 0 023120 384 816bi32_armv6clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
1939157232 0 023120 384 816bi32_armv6clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
1942287248 0 022112 384 824bi32_armv6clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
1953737580 0 020568 396 816bi32_armv6gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012620240107
1955897296 0 022160 384 824bi32_armv6clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
1957307572 0 018771 392 816bi32_armv6gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012620240107
1982337564 0 018234 384 816bi32_armv6gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012620240107
2150649336 0 020907 392 816bi32_armv6gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012620240107
2734529216 0 020415 392 816bi32gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012620240107
2734609224 0 022204 396 816bi32gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012620240107
2894099152 0 025034 384 816bi32clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
2896089152 0 025034 384 816bi32clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
2897059168 0 024026 384 824bi32clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
2899579152 0 023305 380 816bi32clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
2951449500 0 020164 384 816bi32gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012620240107
3205649616 0 024474 384 824bi32clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
3293215616 0 018628 400 816bi32_lowreggcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012620240107
3293225620 0 016847 396 816bi32_lowreggcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012620240107
35575332764 0 045772 396 816refgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012620240107
3598402316 0 015332 400 816bi32_lowsizegcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012620240107
36032411252 0 022823 392 816bi32gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012620240107
3728811824 0 013055 396 816bi32_lowsizegcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012620240107
3759551772 0 012468 388 816bi32_lowsizegcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012620240107
4056425408 0 016099 388 816bi32_lowreggcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012620240107
4223107328 0 023241 384 816refclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
4225927328 0 023241 384 816refclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
4228087328 0 022217 384 824refclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
4246355724 0 020585 388 824bi32_lowregclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
4246775712 0 021593 388 816bi32_lowregclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
4249015712 0 019864 384 816bi32_lowregclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
4249505712 0 021593 388 816bi32_lowregclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
4383452212 0 017098 388 824bi32_lowsizeclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
4393222312 0 013911 396 816bi32_lowsizegcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012620240107
4416356816 0 018415 396 816bi32_lowreggcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012620240107
4432551996 0 017906 388 816bi32_lowsizeclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
4433351996 0 017906 388 816bi32_lowsizeclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
4436521792 0 015969 384 816bi32_lowsizeclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
4478837348 0 022241 384 824refclang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
45190527800 0 039391 392 816refgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012620240107
4722732256 0 017138 388 824bi32_lowsizeclang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
4727335844 0 020705 388 824bi32_lowregclang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107
47721031268 0 042487 392 816refgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012620240107
5571553692 0 014379 384 816refgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024012620240107
5667376976 0 021160 380 816refclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024012620240107

Compiler output

Implementation: bi32_armv6m
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
aead.c: In file included from aead.c:4:
aead.c: In file included from ./permutations.h:11:
aead.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
aead.c: "@.syntax_unified\n\t"
aead.c: ^
aead.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
aead.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
aead.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
aead.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
aead.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
aead.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
aead.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
aead.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
aead.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
aead.c: 10 errors generated.

Number of similar (compiler,implementation) pairs: 5, namely:
CompilerImplementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv6m
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv6m
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv6m
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv6m
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv6m

Compiler output

Implementation: bi32_armv6m
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE
aead.c: In file included from permutations.h:11,
aead.c: from aead.c:4:
aead.c: aead.c: In function 'crypto_aead_ascon128abi32v12_bi32_armv6m_constbranchindex_encrypt':
aead.c: round.h:13:3: error: impossible constraint in 'asm'
aead.c: __asm__ __volatile__(
aead.c: ^~~~~~~
aead.c: round.h:13:3: error: impossible constraint in 'asm'
aead.c: __asm__ __volatile__(
aead.c: ^~~~~~~
aead.c: round.h:13:3: error: impossible constraint in 'asm'
aead.c: __asm__ __volatile__(
aead.c: ^~~~~~~
aead.c: round.h:13:3: error: impossible constraint in 'asm'
aead.c: __asm__ __volatile__(
aead.c: ^~~~~~~
aead.c: round.h:13:3: error: impossible constraint in 'asm'
aead.c: __asm__ __volatile__(
aead.c: ^~~~~~~

Number of similar (compiler,implementation) pairs: 4, namely:
CompilerImplementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv6m
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv6m
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv6m
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv6m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
aead.c: In file included from aead.c:4:
aead.c: ./permutations.h:34:3: error: instruction requires: thumb2
aead.c: ROUND5(x0, x1, x2, x3, x4, RC0);
aead.c: ^
aead.c: ./round.h:159:41: note: expanded from macro 'ROUND5'
aead.c: "eor %[tmp2], %[x3_l], %[x4_l]\n\t" \
aead.c: ^
aead.c: <inline asm>:5:2: note: instantiated into assembly here
aead.c: orn r7, r12, r7
aead.c: ^
aead.c: In file included from aead.c:4:
aead.c: ./permutations.h:34:3: error: instruction requires: thumb2
aead.c: ROUND5(x0, x1, x2, x3, x4, RC0);
aead.c: ^
aead.c: ./round.h:175:41: note: expanded from macro 'ROUND5'
aead.c: "eor %[tmp2], %[x3_h], %[x4_h]\n\t" \
aead.c: ^
aead.c: <inline asm>:21:2: note: instantiated into assembly here
aead.c: orn r5, r2, r5
aead.c: ^
aead.c: In file included from aead.c:4:
aead.c: ./permutations.h:35:3: error: instruction requires: thumb2
aead.c: ROUND5(x2, x3, x4, x0, x1, RC1);
aead.c: ^
aead.c: ./round.h:159:41: note: expanded from macro 'ROUND5'
aead.c: ...

Number of similar (compiler,implementation) pairs: 4, namely:
CompilerImplementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv7m
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv7m
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv7m
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv7m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
aead.c: In file included from aead.c:4:
aead.c: ./permutations.h:34:3: error: instruction requires: thumb2
aead.c: ROUND5(x0, x1, x2, x3, x4, RC0);
aead.c: ^
aead.c: ./round.h:159:41: note: expanded from macro 'ROUND5'
aead.c: "eor %[tmp2], %[x3_l], %[x4_l]\n\t" \
aead.c: ^
aead.c: <inline asm>:5:2: note: instantiated into assembly here
aead.c: orn r3, r12, r3
aead.c: ^
aead.c: In file included from aead.c:4:
aead.c: ./permutations.h:34:3: error: instruction requires: thumb2
aead.c: ROUND5(x0, x1, x2, x3, x4, RC0);
aead.c: ^
aead.c: ./round.h:175:41: note: expanded from macro 'ROUND5'
aead.c: "eor %[tmp2], %[x3_h], %[x4_h]\n\t" \
aead.c: ^
aead.c: <inline asm>:21:2: note: instantiated into assembly here
aead.c: orn r5, r8, r5
aead.c: ^
aead.c: In file included from aead.c:4:
aead.c: ./permutations.h:35:3: error: instruction requires: thumb2
aead.c: ROUND5(x2, x3, x4, x0, x1, RC1);
aead.c: ^
aead.c: ./round.h:159:41: note: expanded from macro 'ROUND5'
aead.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv7m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE
aead.c: /tmp/ccMFCq5p.s: Assembler messages:
aead.c: /tmp/ccMFCq5p.s:71: Error: selected processor does not support `orn r2,r1,r2' in ARM mode
aead.c: /tmp/ccMFCq5p.s:87: Error: selected processor does not support `orn r3,ip,r3' in ARM mode
aead.c: /tmp/ccMFCq5p.s:126: Error: selected processor does not support `orn r7,lr,r7' in ARM mode
aead.c: /tmp/ccMFCq5p.s:142: Error: selected processor does not support `orn r6,r0,r6' in ARM mode
aead.c: /tmp/ccMFCq5p.s:181: Error: selected processor does not support `orn r1,r5,r1' in ARM mode
aead.c: /tmp/ccMFCq5p.s:197: Error: selected processor does not support `orn ip,r4,ip' in ARM mode
aead.c: /tmp/ccMFCq5p.s:236: Error: selected processor does not support `orn lr,r2,lr' in ARM mode
aead.c: /tmp/ccMFCq5p.s:252: Error: selected processor does not support `orn r0,r3,r0' in ARM mode
aead.c: /tmp/ccMFCq5p.s:291: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
aead.c: /tmp/ccMFCq5p.s:307: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
aead.c: /tmp/ccMFCq5p.s:346: Error: selected processor does not support `orn r2,r1,r2' in ARM mode
aead.c: /tmp/ccMFCq5p.s:362: Error: selected processor does not support `orn r3,ip,r3' in ARM mode
aead.c: /tmp/ccMFCq5p.s:401: Error: selected processor does not support `orn r7,lr,r7' in ARM mode
aead.c: /tmp/ccMFCq5p.s:417: Error: selected processor does not support `orn r6,r0,r6' in ARM mode
aead.c: /tmp/ccMFCq5p.s:456: Error: selected processor does not support `orn r1,r5,r1' in ARM mode
aead.c: /tmp/ccMFCq5p.s:472: Error: selected processor does not support `orn ip,r4,ip' in ARM mode
aead.c: /tmp/ccMFCq5p.s:511: Error: selected processor does not support `orn lr,r2,lr' in ARM mode
aead.c: /tmp/ccMFCq5p.s:527: Error: selected processor does not support `orn r0,r3,r0' in ARM mode
aead.c: /tmp/ccMFCq5p.s:566: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
aead.c: /tmp/ccMFCq5p.s:582: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
aead.c: /tmp/ccMFCq5p.s:620: Error: selected processor does not support `orn r8,r2,lr' in ARM mode
aead.c: /tmp/ccMFCq5p.s:624: Error: selected processor does not support `orn r9,r1,r2' in ARM mode
aead.c: /tmp/ccMFCq5p.s:638: Error: selected processor does not support `orn r8,r3,r0' in ARM mode
aead.c: /tmp/ccMFCq5p.s:641: Error: selected processor does not support `orn r9,ip,r3' in ARM mode
aead.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv7m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE
aead.c: /tmp/ccbiVz1R.s: Assembler messages:
aead.c: /tmp/ccbiVz1R.s:71: Error: selected processor does not support `orn r2,r1,r2' in ARM mode
aead.c: /tmp/ccbiVz1R.s:87: Error: selected processor does not support `orn r3,ip,r3' in ARM mode
aead.c: /tmp/ccbiVz1R.s:126: Error: selected processor does not support `orn r7,lr,r7' in ARM mode
aead.c: /tmp/ccbiVz1R.s:142: Error: selected processor does not support `orn r6,r0,r6' in ARM mode
aead.c: /tmp/ccbiVz1R.s:181: Error: selected processor does not support `orn r1,r5,r1' in ARM mode
aead.c: /tmp/ccbiVz1R.s:197: Error: selected processor does not support `orn ip,r4,ip' in ARM mode
aead.c: /tmp/ccbiVz1R.s:236: Error: selected processor does not support `orn lr,r2,lr' in ARM mode
aead.c: /tmp/ccbiVz1R.s:252: Error: selected processor does not support `orn r0,r3,r0' in ARM mode
aead.c: /tmp/ccbiVz1R.s:291: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
aead.c: /tmp/ccbiVz1R.s:307: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
aead.c: /tmp/ccbiVz1R.s:346: Error: selected processor does not support `orn r2,r1,r2' in ARM mode
aead.c: /tmp/ccbiVz1R.s:362: Error: selected processor does not support `orn r3,ip,r3' in ARM mode
aead.c: /tmp/ccbiVz1R.s:401: Error: selected processor does not support `orn r7,lr,r7' in ARM mode
aead.c: /tmp/ccbiVz1R.s:417: Error: selected processor does not support `orn r6,r0,r6' in ARM mode
aead.c: /tmp/ccbiVz1R.s:456: Error: selected processor does not support `orn r1,r5,r1' in ARM mode
aead.c: /tmp/ccbiVz1R.s:472: Error: selected processor does not support `orn ip,r4,ip' in ARM mode
aead.c: /tmp/ccbiVz1R.s:511: Error: selected processor does not support `orn lr,r2,lr' in ARM mode
aead.c: /tmp/ccbiVz1R.s:527: Error: selected processor does not support `orn r0,r3,r0' in ARM mode
aead.c: /tmp/ccbiVz1R.s:566: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
aead.c: /tmp/ccbiVz1R.s:582: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
aead.c: /tmp/ccbiVz1R.s:620: Error: selected processor does not support `orn r8,r2,lr' in ARM mode
aead.c: /tmp/ccbiVz1R.s:624: Error: selected processor does not support `orn r9,r1,r2' in ARM mode
aead.c: /tmp/ccbiVz1R.s:638: Error: selected processor does not support `orn r8,r3,r0' in ARM mode
aead.c: /tmp/ccbiVz1R.s:641: Error: selected processor does not support `orn r9,ip,r3' in ARM mode
aead.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv7m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE
aead.c: /tmp/ccHqf9KW.s: Assembler messages:
aead.c: /tmp/ccHqf9KW.s:120: Error: selected processor does not support `orn r3,r1,r3' in ARM mode
aead.c: /tmp/ccHqf9KW.s:136: Error: selected processor does not support `orn r2,r0,r2' in ARM mode
aead.c: /tmp/ccHqf9KW.s:175: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
aead.c: /tmp/ccHqf9KW.s:191: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
aead.c: /tmp/ccHqf9KW.s:230: Error: selected processor does not support `orn r1,lr,r1' in ARM mode
aead.c: /tmp/ccHqf9KW.s:246: Error: selected processor does not support `orn r0,ip,r0' in ARM mode
aead.c: /tmp/ccHqf9KW.s:285: Error: selected processor does not support `orn r7,r3,r7' in ARM mode
aead.c: /tmp/ccHqf9KW.s:301: Error: selected processor does not support `orn r6,r2,r6' in ARM mode
aead.c: /tmp/ccHqf9KW.s:340: Error: selected processor does not support `orn lr,r5,lr' in ARM mode
aead.c: /tmp/ccHqf9KW.s:356: Error: selected processor does not support `orn ip,r4,ip' in ARM mode
aead.c: /tmp/ccHqf9KW.s:395: Error: selected processor does not support `orn r3,r1,r3' in ARM mode
aead.c: /tmp/ccHqf9KW.s:411: Error: selected processor does not support `orn r2,r0,r2' in ARM mode
aead.c: /tmp/ccHqf9KW.s:450: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
aead.c: /tmp/ccHqf9KW.s:466: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
aead.c: /tmp/ccHqf9KW.s:505: Error: selected processor does not support `orn r1,lr,r1' in ARM mode
aead.c: /tmp/ccHqf9KW.s:521: Error: selected processor does not support `orn r0,ip,r0' in ARM mode
aead.c: /tmp/ccHqf9KW.s:560: Error: selected processor does not support `orn r7,r3,r7' in ARM mode
aead.c: /tmp/ccHqf9KW.s:576: Error: selected processor does not support `orn r6,r2,r6' in ARM mode
aead.c: /tmp/ccHqf9KW.s:615: Error: selected processor does not support `orn lr,r5,lr' in ARM mode
aead.c: /tmp/ccHqf9KW.s:631: Error: selected processor does not support `orn ip,r4,ip' in ARM mode
aead.c: /tmp/ccHqf9KW.s:669: Error: selected processor does not support `orn r8,r3,r7' in ARM mode
aead.c: /tmp/ccHqf9KW.s:673: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
aead.c: /tmp/ccHqf9KW.s:687: Error: selected processor does not support `orn r8,r2,r6' in ARM mode
aead.c: /tmp/ccHqf9KW.s:690: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
aead.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv7m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE
aead.c: /tmp/cceTSQoz.s: Assembler messages:
aead.c: /tmp/cceTSQoz.s:78: Error: selected processor does not support `orn r2,ip,r2' in ARM mode
aead.c: /tmp/cceTSQoz.s:94: Error: selected processor does not support `orn r3,r0,r3' in ARM mode
aead.c: /tmp/cceTSQoz.s:133: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
aead.c: /tmp/cceTSQoz.s:149: Error: selected processor does not support `orn r1,r6,r1' in ARM mode
aead.c: /tmp/cceTSQoz.s:188: Error: selected processor does not support `orn ip,r4,ip' in ARM mode
aead.c: /tmp/cceTSQoz.s:204: Error: selected processor does not support `orn r0,lr,r0' in ARM mode
aead.c: /tmp/cceTSQoz.s:243: Error: selected processor does not support `orn r7,r2,r7' in ARM mode
aead.c: /tmp/cceTSQoz.s:259: Error: selected processor does not support `orn r6,r3,r6' in ARM mode
aead.c: /tmp/cceTSQoz.s:298: Error: selected processor does not support `orn r4,r5,r4' in ARM mode
aead.c: /tmp/cceTSQoz.s:314: Error: selected processor does not support `orn lr,r1,lr' in ARM mode
aead.c: /tmp/cceTSQoz.s:353: Error: selected processor does not support `orn r2,ip,r2' in ARM mode
aead.c: /tmp/cceTSQoz.s:369: Error: selected processor does not support `orn r3,r0,r3' in ARM mode
aead.c: /tmp/cceTSQoz.s:408: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
aead.c: /tmp/cceTSQoz.s:424: Error: selected processor does not support `orn r1,r6,r1' in ARM mode
aead.c: /tmp/cceTSQoz.s:463: Error: selected processor does not support `orn ip,r4,ip' in ARM mode
aead.c: /tmp/cceTSQoz.s:479: Error: selected processor does not support `orn r0,lr,r0' in ARM mode
aead.c: /tmp/cceTSQoz.s:518: Error: selected processor does not support `orn r7,r2,r7' in ARM mode
aead.c: /tmp/cceTSQoz.s:534: Error: selected processor does not support `orn r6,r3,r6' in ARM mode
aead.c: /tmp/cceTSQoz.s:573: Error: selected processor does not support `orn r4,r5,r4' in ARM mode
aead.c: /tmp/cceTSQoz.s:589: Error: selected processor does not support `orn lr,r1,lr' in ARM mode
aead.c: /tmp/cceTSQoz.s:627: Error: selected processor does not support `orn r8,r2,r7' in ARM mode
aead.c: /tmp/cceTSQoz.s:631: Error: selected processor does not support `orn r9,ip,r2' in ARM mode
aead.c: /tmp/cceTSQoz.s:645: Error: selected processor does not support `orn r8,r3,r6' in ARM mode
aead.c: /tmp/cceTSQoz.s:648: Error: selected processor does not support `orn r9,r0,r3' in ARM mode
aead.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv7m

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
permutations.c: In file included from permutations.c:1:
permutations.c: In file included from ./permutations.h:11:
permutations.c: ./round.h:18:39: error: instruction requires: thumb2
permutations.c: "eor %[x2_l], %[x2_l], %[x1_l]\n\t"
permutations.c: ^
permutations.c: <inline asm>:6:2: note: instantiated into assembly here
permutations.c: orn r1, r11, r4
permutations.c: ^
permutations.c: In file included from permutations.c:1:
permutations.c: In file included from ./permutations.h:11:
permutations.c: ./round.h:22:39: error: instruction requires: thumb2
permutations.c: "eor %[x0_l], %[x0_l], %[tmp1]\n\t"
permutations.c: ^
permutations.c: <inline asm>:10:2: note: instantiated into assembly here
permutations.c: orn r12, r9, r11
permutations.c: ^
permutations.c: In file included from permutations.c:1:
permutations.c: In file included from ./permutations.h:11:
permutations.c: ./round.h:37:39: error: instruction requires: thumb2
permutations.c: "eor %[x2_h], %[x2_h], %[x1_h]\n\t"
permutations.c: ^
permutations.c: <inline asm>:25:2: note: instantiated into assembly here
permutations.c: orn r1, r5, r0
permutations.c: ^
permutations.c: In file included from permutations.c:1:
permutations.c: ...

Number of similar (compiler,implementation) pairs: 4, namely:
CompilerImplementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv7m_small
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv7m_small
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv7m_small
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv7m_small

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
permutations.c: In file included from permutations.c:1:
permutations.c: In file included from ./permutations.h:11:
permutations.c: ./round.h:18:39: error: instruction requires: thumb2
permutations.c: "eor %[x2_l], %[x2_l], %[x1_l]\n\t"
permutations.c: ^
permutations.c: <inline asm>:6:2: note: instantiated into assembly here
permutations.c: orn r2, r11, r0
permutations.c: ^
permutations.c: In file included from permutations.c:1:
permutations.c: In file included from ./permutations.h:11:
permutations.c: ./round.h:22:39: error: instruction requires: thumb2
permutations.c: "eor %[x0_l], %[x0_l], %[tmp1]\n\t"
permutations.c: ^
permutations.c: <inline asm>:10:2: note: instantiated into assembly here
permutations.c: orn lr, r7, r11
permutations.c: ^
permutations.c: In file included from permutations.c:1:
permutations.c: In file included from ./permutations.h:11:
permutations.c: ./round.h:37:39: error: instruction requires: thumb2
permutations.c: "eor %[x2_h], %[x2_h], %[x1_h]\n\t"
permutations.c: ^
permutations.c: <inline asm>:25:2: note: instantiated into assembly here
permutations.c: orn r2, r12, r4
permutations.c: ^
permutations.c: In file included from permutations.c:1:
permutations.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv7m_small

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE
permutations.c: /tmp/ccAKNa9L.s: Assembler messages:
permutations.c: /tmp/ccAKNa9L.s:52: Error: selected processor does not support `orn r10,r1,r9' in ARM mode
permutations.c: /tmp/ccAKNa9L.s:56: Error: selected processor does not support `orn r0,lr,r1' in ARM mode
permutations.c: /tmp/ccAKNa9L.s:71: Error: selected processor does not support `orn r10,r2,r8' in ARM mode
permutations.c: /tmp/ccAKNa9L.s:74: Error: selected processor does not support `orn r0,ip,r2' in ARM mode

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv7m_small

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE
permutations.c: /tmp/ccWu870e.s: Assembler messages:
permutations.c: /tmp/ccWu870e.s:52: Error: selected processor does not support `orn r10,r1,r9' in ARM mode
permutations.c: /tmp/ccWu870e.s:56: Error: selected processor does not support `orn r0,lr,r1' in ARM mode
permutations.c: /tmp/ccWu870e.s:71: Error: selected processor does not support `orn r10,r2,r8' in ARM mode
permutations.c: /tmp/ccWu870e.s:74: Error: selected processor does not support `orn r0,ip,r2' in ARM mode

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv7m_small

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE
permutations.c: /tmp/ccHz0wic.s: Assembler messages:
permutations.c: /tmp/ccHz0wic.s:52: Error: selected processor does not support `orn r0,ip,r10' in ARM mode
permutations.c: /tmp/ccHz0wic.s:56: Error: selected processor does not support `orn fp,r4,ip' in ARM mode
permutations.c: /tmp/ccHz0wic.s:71: Error: selected processor does not support `orn r0,r2,r9' in ARM mode
permutations.c: /tmp/ccHz0wic.s:74: Error: selected processor does not support `orn fp,lr,r2' in ARM mode

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv7m_small

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE
permutations.c: /tmp/ccboosyq.s: Assembler messages:
permutations.c: /tmp/ccboosyq.s:51: Error: selected processor does not support `orn r0,ip,r10' in ARM mode
permutations.c: /tmp/ccboosyq.s:55: Error: selected processor does not support `orn fp,r4,ip' in ARM mode
permutations.c: /tmp/ccboosyq.s:70: Error: selected processor does not support `orn r0,r2,r9' in ARM mode
permutations.c: /tmp/ccboosyq.s:73: Error: selected processor does not support `orn fp,lr,r2' in ARM mode

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv7m_small

Namespace violations

Implementation: bi32
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
constants.o constants R
permutations.o P12 T
permutations.o P8 T

Number of similar (compiler,implementation) pairs: 18, namely:
CompilerImplementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv6
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv6
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv6
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv6
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_armv6
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv6
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv6
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv6
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_armv6

Namespace violations

Implementation: bi32_lowreg
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
aead.o ascon_adata T
aead.o ascon_decrypt T
aead.o ascon_encrypt T
aead.o ascon_final T
aead.o ascon_initaead T
aead.o ascon_loadkey T
constants.o constants R

Number of similar (compiler,implementation) pairs: 9, namely:
CompilerImplementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_lowreg
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_lowreg
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_lowreg
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_lowreg
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_lowreg
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_lowreg
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_lowreg
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_lowreg
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_lowreg

Namespace violations

Implementation: bi32_lowsize
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
aead.o ascon_aead T
constants.o constants R
permutations.o P T
update.o ascon_update T

Number of similar (compiler,implementation) pairs: 9, namely:
CompilerImplementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_lowsize
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_lowsize
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_lowsize
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_lowsize
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE bi32_lowsize
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_lowsize
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_lowsize
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_lowsize
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE bi32_lowsize