Test results for armeabi, bblack, crypto_aead/omdsha512k256n256tau256v1

[Page version: 20241101 10:17:42]

Measurements for armeabi, bblack, crypto_aead Test results for armeabi, bblack, crypto_aead Test results for crypto_aead/omdsha512k256n256tau256v1
Computer: bblack
Microarchitecture: armeabi; Cortex-A8 (413fc082)
Architecture: armeabi
CPU ID: unknown CPU ID
SUPERCOP version: 20240716
Operation: crypto_aead
Primitive: omdsha512k256n256tau256v1

Checksum failure

e3a2f34e62ecf97016b2a04d2d71c1fa474898d3c225673854ca299aacf82517
Number of similar (implementation,compiler) pairs: 9, namely:
ImplementationCompiler
T:refclang -march=native -O2 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:refclang -march=native -O3 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:refclang -march=native -O -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:refclang -march=native -Os -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:refclang -mcpu=native -O3 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:refgcc -march=native -mtune=native -O2 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)
T:refgcc -march=native -mtune=native -O3 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)
T:refgcc -march=native -mtune=native -O -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)
T:refgcc -march=native -mtune=native -Os -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)

Compiler output

encrypt.c: <inline asm>:1:1: error: unknown directive
encrypt.c: .intel_syntax noprefix
encrypt.c: ^
encrypt.c: <inline asm>:4:5: error: operand must be a register in range [r0, r15]
encrypt.c: cmp rdx, 0
encrypt.c:     ^
encrypt.c: <inline asm>:5:1: error: invalid instruction
encrypt.c: je .nowork
encrypt.c: ^
encrypt.c: <inline asm>:6:5: error: operand must be a register in range [r0, r15]
encrypt.c: sub rsp, 696
encrypt.c:     ^
encrypt.c: <inline asm>:7:6: error: register expected
encrypt.c: mov [rsp + 656 + 8 * 0], rbx
encrypt.c:      ^
encrypt.c: <inline asm>:8:6: error: register expected
encrypt.c: mov [rsp + 656 + 8 * 1], r12
encrypt.c:      ^
encrypt.c: <inline asm>:9:6: error: register expected
encrypt.c: mov [rsp + 656 + 8 * 2], r13
encrypt.c:      ^
encrypt.c: <inline asm>:10:6: error: register expected
encrypt.c: mov [rsp + 656 + 8 * 3], r14
encrypt.c:      ^
encrypt.c: <inline asm>:11:6: error: register expected
encrypt.c: ...
Number of similar (implementation,compiler) pairs: 5, namely:
ImplementationCompiler
T:avx1clang -march=native -O2 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:avx1clang -march=native -O3 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:avx1clang -march=native -O -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:avx1clang -march=native -Os -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:avx1clang -mcpu=native -O3 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))

Compiler output

encrypt.c: /tmp/ccDelXOj.s: Assembler messages:
encrypt.c: /tmp/ccDelXOj.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccDelXOj.s:21: Error: ARM register expected -- `cmp rdx,0'
encrypt.c: /tmp/ccDelXOj.s:22: Error: bad instruction `je .nowork'
encrypt.c: /tmp/ccDelXOj.s:23: Error: ARM register expected -- `sub rsp,696'
encrypt.c: /tmp/ccDelXOj.s:24: Error: ARM register expected -- `mov [rsp+656+8*0],rbx'
encrypt.c: /tmp/ccDelXOj.s:25: Error: ARM register expected -- `mov [rsp+656+8*1],r12'
encrypt.c: /tmp/ccDelXOj.s:26: Error: ARM register expected -- `mov [rsp+656+8*2],r13'
encrypt.c: /tmp/ccDelXOj.s:27: Error: ARM register expected -- `mov [rsp+656+8*3],r14'
encrypt.c: /tmp/ccDelXOj.s:28: Error: ARM register expected -- `mov [rsp+656+8*4],r15'
encrypt.c: /tmp/ccDelXOj.s:37: Error: ARM register expected -- `mov rbx,[rsi+8*(7)]'
encrypt.c: /tmp/ccDelXOj.s:38: Error: bad instruction `vmovdqa xmm1,XMMWORD PTR [XMM_QWORD_BSWAP+rip]'
encrypt.c: /tmp/ccDelXOj.s:39: Error: bad instruction `vmovdqu xmm0,[rdi+8*(0)]'
encrypt.c: /tmp/ccDelXOj.s:40: Error: bad instruction `vpshufb xmm0,xmm0,xmm1'
encrypt.c: /tmp/ccDelXOj.s:41: Error: bad instruction `vmovdqa [rsp+0+8*(0)],xmm0'
encrypt.c: /tmp/ccDelXOj.s:42: Error: bad instruction `vpaddq xmm0,xmm0,XMMWORD PTR [K512+8*(0)+rip]'
encrypt.c: /tmp/ccDelXOj.s:43: Error: bad instruction `vmovdqa [rsp+640+8*(0)],xmm0'
encrypt.c: /tmp/ccDelXOj.s:44: Error: bad instruction `vmovdqu xmm0,[rdi+8*(2)]'
encrypt.c: /tmp/ccDelXOj.s:45: Error: bad instruction `vpshufb xmm0,xmm0,xmm1'
encrypt.c: /tmp/ccDelXOj.s:46: Error: ARM register expected -- `mov rcx,r14'
encrypt.c: /tmp/ccDelXOj.s:47: Error: ARM register expected -- `mov rax,r13'
encrypt.c: /tmp/ccDelXOj.s:48: Error: bad instruction `xor rcx,r15'
encrypt.c: /tmp/ccDelXOj.s:49: Error: bad instruction `shld rax,rax,(64-23)'
encrypt.c: /tmp/ccDelXOj.s:50: Error: ARM register expected -- `and rcx,r13'
encrypt.c: /tmp/ccDelXOj.s:51: Error: bad instruction `xor rax,r13'
encrypt.c: ...
Number of similar (implementation,compiler) pairs: 1, namely:
ImplementationCompiler
T:avx1gcc -march=native -mtune=native -O2 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)

Compiler output

encrypt.c: /tmp/ccywXXZO.s: Assembler messages:
encrypt.c: /tmp/ccywXXZO.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccywXXZO.s:21: Error: ARM register expected -- `cmp rdx,0'
encrypt.c: /tmp/ccywXXZO.s:22: Error: bad instruction `je .nowork'
encrypt.c: /tmp/ccywXXZO.s:23: Error: ARM register expected -- `sub rsp,696'
encrypt.c: /tmp/ccywXXZO.s:24: Error: ARM register expected -- `mov [rsp+656+8*0],rbx'
encrypt.c: /tmp/ccywXXZO.s:25: Error: ARM register expected -- `mov [rsp+656+8*1],r12'
encrypt.c: /tmp/ccywXXZO.s:26: Error: ARM register expected -- `mov [rsp+656+8*2],r13'
encrypt.c: /tmp/ccywXXZO.s:27: Error: ARM register expected -- `mov [rsp+656+8*3],r14'
encrypt.c: /tmp/ccywXXZO.s:28: Error: ARM register expected -- `mov [rsp+656+8*4],r15'
encrypt.c: /tmp/ccywXXZO.s:37: Error: ARM register expected -- `mov rbx,[rsi+8*(7)]'
encrypt.c: /tmp/ccywXXZO.s:38: Error: bad instruction `vmovdqa xmm1,XMMWORD PTR [XMM_QWORD_BSWAP+rip]'
encrypt.c: /tmp/ccywXXZO.s:39: Error: bad instruction `vmovdqu xmm0,[rdi+8*(0)]'
encrypt.c: /tmp/ccywXXZO.s:40: Error: bad instruction `vpshufb xmm0,xmm0,xmm1'
encrypt.c: /tmp/ccywXXZO.s:41: Error: bad instruction `vmovdqa [rsp+0+8*(0)],xmm0'
encrypt.c: /tmp/ccywXXZO.s:42: Error: bad instruction `vpaddq xmm0,xmm0,XMMWORD PTR [K512+8*(0)+rip]'
encrypt.c: /tmp/ccywXXZO.s:43: Error: bad instruction `vmovdqa [rsp+640+8*(0)],xmm0'
encrypt.c: /tmp/ccywXXZO.s:44: Error: bad instruction `vmovdqu xmm0,[rdi+8*(2)]'
encrypt.c: /tmp/ccywXXZO.s:45: Error: bad instruction `vpshufb xmm0,xmm0,xmm1'
encrypt.c: /tmp/ccywXXZO.s:46: Error: ARM register expected -- `mov rcx,r14'
encrypt.c: /tmp/ccywXXZO.s:47: Error: ARM register expected -- `mov rax,r13'
encrypt.c: /tmp/ccywXXZO.s:48: Error: bad instruction `xor rcx,r15'
encrypt.c: /tmp/ccywXXZO.s:49: Error: bad instruction `shld rax,rax,(64-23)'
encrypt.c: /tmp/ccywXXZO.s:50: Error: ARM register expected -- `and rcx,r13'
encrypt.c: /tmp/ccywXXZO.s:51: Error: bad instruction `xor rax,r13'
encrypt.c: ...
Number of similar (implementation,compiler) pairs: 1, namely:
ImplementationCompiler
T:avx1gcc -march=native -mtune=native -O3 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)

Compiler output

encrypt.c: /tmp/cc9JtJS0.s: Assembler messages:
encrypt.c: /tmp/cc9JtJS0.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/cc9JtJS0.s:21: Error: ARM register expected -- `cmp rdx,0'
encrypt.c: /tmp/cc9JtJS0.s:22: Error: bad instruction `je .nowork'
encrypt.c: /tmp/cc9JtJS0.s:23: Error: ARM register expected -- `sub rsp,696'
encrypt.c: /tmp/cc9JtJS0.s:24: Error: ARM register expected -- `mov [rsp+656+8*0],rbx'
encrypt.c: /tmp/cc9JtJS0.s:25: Error: ARM register expected -- `mov [rsp+656+8*1],r12'
encrypt.c: /tmp/cc9JtJS0.s:26: Error: ARM register expected -- `mov [rsp+656+8*2],r13'
encrypt.c: /tmp/cc9JtJS0.s:27: Error: ARM register expected -- `mov [rsp+656+8*3],r14'
encrypt.c: /tmp/cc9JtJS0.s:28: Error: ARM register expected -- `mov [rsp+656+8*4],r15'
encrypt.c: /tmp/cc9JtJS0.s:37: Error: ARM register expected -- `mov rbx,[rsi+8*(7)]'
encrypt.c: /tmp/cc9JtJS0.s:38: Error: bad instruction `vmovdqa xmm1,XMMWORD PTR [XMM_QWORD_BSWAP+rip]'
encrypt.c: /tmp/cc9JtJS0.s:39: Error: bad instruction `vmovdqu xmm0,[rdi+8*(0)]'
encrypt.c: /tmp/cc9JtJS0.s:40: Error: bad instruction `vpshufb xmm0,xmm0,xmm1'
encrypt.c: /tmp/cc9JtJS0.s:41: Error: bad instruction `vmovdqa [rsp+0+8*(0)],xmm0'
encrypt.c: /tmp/cc9JtJS0.s:42: Error: bad instruction `vpaddq xmm0,xmm0,XMMWORD PTR [K512+8*(0)+rip]'
encrypt.c: /tmp/cc9JtJS0.s:43: Error: bad instruction `vmovdqa [rsp+640+8*(0)],xmm0'
encrypt.c: /tmp/cc9JtJS0.s:44: Error: bad instruction `vmovdqu xmm0,[rdi+8*(2)]'
encrypt.c: /tmp/cc9JtJS0.s:45: Error: bad instruction `vpshufb xmm0,xmm0,xmm1'
encrypt.c: /tmp/cc9JtJS0.s:46: Error: ARM register expected -- `mov rcx,r14'
encrypt.c: /tmp/cc9JtJS0.s:47: Error: ARM register expected -- `mov rax,r13'
encrypt.c: /tmp/cc9JtJS0.s:48: Error: bad instruction `xor rcx,r15'
encrypt.c: /tmp/cc9JtJS0.s:49: Error: bad instruction `shld rax,rax,(64-23)'
encrypt.c: /tmp/cc9JtJS0.s:50: Error: ARM register expected -- `and rcx,r13'
encrypt.c: /tmp/cc9JtJS0.s:51: Error: bad instruction `xor rax,r13'
encrypt.c: ...
Number of similar (implementation,compiler) pairs: 1, namely:
ImplementationCompiler
T:avx1gcc -march=native -mtune=native -O -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)

Compiler output

encrypt.c: /tmp/ccmIctwu.s: Assembler messages:
encrypt.c: /tmp/ccmIctwu.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccmIctwu.s:21: Error: ARM register expected -- `cmp rdx,0'
encrypt.c: /tmp/ccmIctwu.s:22: Error: bad instruction `je .nowork'
encrypt.c: /tmp/ccmIctwu.s:23: Error: ARM register expected -- `sub rsp,696'
encrypt.c: /tmp/ccmIctwu.s:24: Error: ARM register expected -- `mov [rsp+656+8*0],rbx'
encrypt.c: /tmp/ccmIctwu.s:25: Error: ARM register expected -- `mov [rsp+656+8*1],r12'
encrypt.c: /tmp/ccmIctwu.s:26: Error: ARM register expected -- `mov [rsp+656+8*2],r13'
encrypt.c: /tmp/ccmIctwu.s:27: Error: ARM register expected -- `mov [rsp+656+8*3],r14'
encrypt.c: /tmp/ccmIctwu.s:28: Error: ARM register expected -- `mov [rsp+656+8*4],r15'
encrypt.c: /tmp/ccmIctwu.s:37: Error: ARM register expected -- `mov rbx,[rsi+8*(7)]'
encrypt.c: /tmp/ccmIctwu.s:38: Error: bad instruction `vmovdqa xmm1,XMMWORD PTR [XMM_QWORD_BSWAP+rip]'
encrypt.c: /tmp/ccmIctwu.s:39: Error: bad instruction `vmovdqu xmm0,[rdi+8*(0)]'
encrypt.c: /tmp/ccmIctwu.s:40: Error: bad instruction `vpshufb xmm0,xmm0,xmm1'
encrypt.c: /tmp/ccmIctwu.s:41: Error: bad instruction `vmovdqa [rsp+0+8*(0)],xmm0'
encrypt.c: /tmp/ccmIctwu.s:42: Error: bad instruction `vpaddq xmm0,xmm0,XMMWORD PTR [K512+8*(0)+rip]'
encrypt.c: /tmp/ccmIctwu.s:43: Error: bad instruction `vmovdqa [rsp+640+8*(0)],xmm0'
encrypt.c: /tmp/ccmIctwu.s:44: Error: bad instruction `vmovdqu xmm0,[rdi+8*(2)]'
encrypt.c: /tmp/ccmIctwu.s:45: Error: bad instruction `vpshufb xmm0,xmm0,xmm1'
encrypt.c: /tmp/ccmIctwu.s:46: Error: ARM register expected -- `mov rcx,r14'
encrypt.c: /tmp/ccmIctwu.s:47: Error: ARM register expected -- `mov rax,r13'
encrypt.c: /tmp/ccmIctwu.s:48: Error: bad instruction `xor rcx,r15'
encrypt.c: /tmp/ccmIctwu.s:49: Error: bad instruction `shld rax,rax,(64-23)'
encrypt.c: /tmp/ccmIctwu.s:50: Error: ARM register expected -- `and rcx,r13'
encrypt.c: /tmp/ccmIctwu.s:51: Error: bad instruction `xor rax,r13'
encrypt.c: ...
Number of similar (implementation,compiler) pairs: 1, namely:
ImplementationCompiler
T:avx1gcc -march=native -mtune=native -Os -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)

Compiler output

sha512.c: sha512.c:206:18: warning: incompatible pointer types initializing 'const uint64_t *' (aka 'const unsigned long long *') with an expression of type 'const unsigned char *' [-Wincompatible-pointer-types]
sha512.c:         const uint64_t *W=in;
sha512.c:                         ^ ~~
sha512.c: 1 warning generated.
Number of similar (implementation,compiler) pairs: 5, namely:
ImplementationCompiler
T:refclang -march=native -O2 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:refclang -march=native -O3 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:refclang -march=native -O -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:refclang -march=native -Os -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:refclang -mcpu=native -O3 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))

Compiler output

sha512.c: sha512.c: In function 'sha512_comp':
sha512.c: sha512.c:206:20: warning: initialization of 'const uint64_t *' {aka 'const long long unsigned int *'} from incompatible pointer type 'const unsigned char *' [-Wincompatible-pointer-types]
sha512.c:   const uint64_t *W=in;
sha512.c:                     ^~
Number of similar (implementation,compiler) pairs: 4, namely:
ImplementationCompiler
T:refgcc -march=native -mtune=native -O2 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)
T:refgcc -march=native -mtune=native -O3 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)
T:refgcc -march=native -mtune=native -O -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)
T:refgcc -march=native -mtune=native -Os -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)

Compiler output

encrypt.c: <inline asm>:1:1: error: unknown directive
encrypt.c: .intel_syntax noprefix
encrypt.c: ^
encrypt.c: <inline asm>:4:5: error: operand must be a register in range [r0, r15]
encrypt.c: cmp rdx, 0
encrypt.c:     ^
encrypt.c: <inline asm>:5:2: error: invalid instruction
encrypt.c:  je .nowork
encrypt.c:  ^
encrypt.c: <inline asm>:6:6: error: operand must be a register in range [r0, r15]
encrypt.c:  sub rsp, 696
encrypt.c:      ^
encrypt.c: <inline asm>:7:7: error: register expected
encrypt.c:  mov [rsp + 656 + 8 * 0], rbx
encrypt.c:       ^
encrypt.c: <inline asm>:8:7: error: register expected
encrypt.c:  mov [rsp + 656 + 8 * 1], r12
encrypt.c:       ^
encrypt.c: <inline asm>:9:7: error: register expected
encrypt.c:  mov [rsp + 656 + 8 * 2], r13
encrypt.c:       ^
encrypt.c: <inline asm>:10:7: error: register expected
encrypt.c:  mov [rsp + 656 + 8 * 3], r14
encrypt.c:       ^
encrypt.c: <inline asm>:11:7: error: register expected
encrypt.c: ...
Number of similar (implementation,compiler) pairs: 5, namely:
ImplementationCompiler
T:sse4clang -march=native -O2 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:sse4clang -march=native -O3 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:sse4clang -march=native -O -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:sse4clang -march=native -Os -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:sse4clang -mcpu=native -O3 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))

Compiler output

encrypt.c: /tmp/ccqNFltg.s: Assembler messages:
encrypt.c: /tmp/ccqNFltg.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccqNFltg.s:20: Error: ARM register expected -- `cmp rdx,0'
encrypt.c: /tmp/ccqNFltg.s:21: Error: bad instruction `je .nowork'
encrypt.c: /tmp/ccqNFltg.s:22: Error: ARM register expected -- `sub rsp,696'
encrypt.c: /tmp/ccqNFltg.s:23: Error: ARM register expected -- `mov [rsp+656+8*0],rbx'
encrypt.c: /tmp/ccqNFltg.s:24: Error: ARM register expected -- `mov [rsp+656+8*1],r12'
encrypt.c: /tmp/ccqNFltg.s:25: Error: ARM register expected -- `mov [rsp+656+8*2],r13'
encrypt.c: /tmp/ccqNFltg.s:26: Error: ARM register expected -- `mov [rsp+656+8*3],r14'
encrypt.c: /tmp/ccqNFltg.s:27: Error: ARM register expected -- `mov [rsp+656+8*4],r15'
encrypt.c: /tmp/ccqNFltg.s:36: Error: ARM register expected -- `mov rbx,[rsi+8*(7)]'
encrypt.c: /tmp/ccqNFltg.s:37: Error: bad instruction `movdqa xmm1,XMMWORD PTR [XMM_QWORD_BSWAP+rip]'
encrypt.c: /tmp/ccqNFltg.s:38: Error: bad instruction `movdqu xmm0,[rdi+8*(0)]'
encrypt.c: /tmp/ccqNFltg.s:39: Error: bad instruction `pshufb xmm0,xmm1'
encrypt.c: /tmp/ccqNFltg.s:40: Error: bad instruction `movdqa [rsp+0+8*(0)],xmm0'
encrypt.c: /tmp/ccqNFltg.s:41: Error: bad instruction `paddq xmm0,XMMWORD PTR [K512+8*(0)+rip]'
encrypt.c: /tmp/ccqNFltg.s:42: Error: bad instruction `movdqa [rsp+640+8*(0)],xmm0'
encrypt.c: /tmp/ccqNFltg.s:43: Error: bad instruction `movdqu xmm0,[rdi+8*(2)]'
encrypt.c: /tmp/ccqNFltg.s:44: Error: bad instruction `pshufb xmm0,xmm1'
encrypt.c: /tmp/ccqNFltg.s:45: Error: ARM register expected -- `mov rcx,r14'
encrypt.c: /tmp/ccqNFltg.s:46: Error: ARM register expected -- `mov rax,r13'
encrypt.c: /tmp/ccqNFltg.s:47: Error: bad instruction `xor rcx,r15'
encrypt.c: /tmp/ccqNFltg.s:48: Error: ARM register expected -- `ror rax,23'
encrypt.c: /tmp/ccqNFltg.s:49: Error: ARM register expected -- `and rcx,r13'
encrypt.c: /tmp/ccqNFltg.s:50: Error: bad instruction `xor rax,r13'
encrypt.c: ...
Number of similar (implementation,compiler) pairs: 1, namely:
ImplementationCompiler
T:sse4gcc -march=native -mtune=native -O2 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)

Compiler output

encrypt.c: /tmp/cc3qzvSU.s: Assembler messages:
encrypt.c: /tmp/cc3qzvSU.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/cc3qzvSU.s:20: Error: ARM register expected -- `cmp rdx,0'
encrypt.c: /tmp/cc3qzvSU.s:21: Error: bad instruction `je .nowork'
encrypt.c: /tmp/cc3qzvSU.s:22: Error: ARM register expected -- `sub rsp,696'
encrypt.c: /tmp/cc3qzvSU.s:23: Error: ARM register expected -- `mov [rsp+656+8*0],rbx'
encrypt.c: /tmp/cc3qzvSU.s:24: Error: ARM register expected -- `mov [rsp+656+8*1],r12'
encrypt.c: /tmp/cc3qzvSU.s:25: Error: ARM register expected -- `mov [rsp+656+8*2],r13'
encrypt.c: /tmp/cc3qzvSU.s:26: Error: ARM register expected -- `mov [rsp+656+8*3],r14'
encrypt.c: /tmp/cc3qzvSU.s:27: Error: ARM register expected -- `mov [rsp+656+8*4],r15'
encrypt.c: /tmp/cc3qzvSU.s:36: Error: ARM register expected -- `mov rbx,[rsi+8*(7)]'
encrypt.c: /tmp/cc3qzvSU.s:37: Error: bad instruction `movdqa xmm1,XMMWORD PTR [XMM_QWORD_BSWAP+rip]'
encrypt.c: /tmp/cc3qzvSU.s:38: Error: bad instruction `movdqu xmm0,[rdi+8*(0)]'
encrypt.c: /tmp/cc3qzvSU.s:39: Error: bad instruction `pshufb xmm0,xmm1'
encrypt.c: /tmp/cc3qzvSU.s:40: Error: bad instruction `movdqa [rsp+0+8*(0)],xmm0'
encrypt.c: /tmp/cc3qzvSU.s:41: Error: bad instruction `paddq xmm0,XMMWORD PTR [K512+8*(0)+rip]'
encrypt.c: /tmp/cc3qzvSU.s:42: Error: bad instruction `movdqa [rsp+640+8*(0)],xmm0'
encrypt.c: /tmp/cc3qzvSU.s:43: Error: bad instruction `movdqu xmm0,[rdi+8*(2)]'
encrypt.c: /tmp/cc3qzvSU.s:44: Error: bad instruction `pshufb xmm0,xmm1'
encrypt.c: /tmp/cc3qzvSU.s:45: Error: ARM register expected -- `mov rcx,r14'
encrypt.c: /tmp/cc3qzvSU.s:46: Error: ARM register expected -- `mov rax,r13'
encrypt.c: /tmp/cc3qzvSU.s:47: Error: bad instruction `xor rcx,r15'
encrypt.c: /tmp/cc3qzvSU.s:48: Error: ARM register expected -- `ror rax,23'
encrypt.c: /tmp/cc3qzvSU.s:49: Error: ARM register expected -- `and rcx,r13'
encrypt.c: /tmp/cc3qzvSU.s:50: Error: bad instruction `xor rax,r13'
encrypt.c: ...
Number of similar (implementation,compiler) pairs: 1, namely:
ImplementationCompiler
T:sse4gcc -march=native -mtune=native -O3 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)

Compiler output

encrypt.c: /tmp/cc6G4jAX.s: Assembler messages:
encrypt.c: /tmp/cc6G4jAX.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/cc6G4jAX.s:20: Error: ARM register expected -- `cmp rdx,0'
encrypt.c: /tmp/cc6G4jAX.s:21: Error: bad instruction `je .nowork'
encrypt.c: /tmp/cc6G4jAX.s:22: Error: ARM register expected -- `sub rsp,696'
encrypt.c: /tmp/cc6G4jAX.s:23: Error: ARM register expected -- `mov [rsp+656+8*0],rbx'
encrypt.c: /tmp/cc6G4jAX.s:24: Error: ARM register expected -- `mov [rsp+656+8*1],r12'
encrypt.c: /tmp/cc6G4jAX.s:25: Error: ARM register expected -- `mov [rsp+656+8*2],r13'
encrypt.c: /tmp/cc6G4jAX.s:26: Error: ARM register expected -- `mov [rsp+656+8*3],r14'
encrypt.c: /tmp/cc6G4jAX.s:27: Error: ARM register expected -- `mov [rsp+656+8*4],r15'
encrypt.c: /tmp/cc6G4jAX.s:36: Error: ARM register expected -- `mov rbx,[rsi+8*(7)]'
encrypt.c: /tmp/cc6G4jAX.s:37: Error: bad instruction `movdqa xmm1,XMMWORD PTR [XMM_QWORD_BSWAP+rip]'
encrypt.c: /tmp/cc6G4jAX.s:38: Error: bad instruction `movdqu xmm0,[rdi+8*(0)]'
encrypt.c: /tmp/cc6G4jAX.s:39: Error: bad instruction `pshufb xmm0,xmm1'
encrypt.c: /tmp/cc6G4jAX.s:40: Error: bad instruction `movdqa [rsp+0+8*(0)],xmm0'
encrypt.c: /tmp/cc6G4jAX.s:41: Error: bad instruction `paddq xmm0,XMMWORD PTR [K512+8*(0)+rip]'
encrypt.c: /tmp/cc6G4jAX.s:42: Error: bad instruction `movdqa [rsp+640+8*(0)],xmm0'
encrypt.c: /tmp/cc6G4jAX.s:43: Error: bad instruction `movdqu xmm0,[rdi+8*(2)]'
encrypt.c: /tmp/cc6G4jAX.s:44: Error: bad instruction `pshufb xmm0,xmm1'
encrypt.c: /tmp/cc6G4jAX.s:45: Error: ARM register expected -- `mov rcx,r14'
encrypt.c: /tmp/cc6G4jAX.s:46: Error: ARM register expected -- `mov rax,r13'
encrypt.c: /tmp/cc6G4jAX.s:47: Error: bad instruction `xor rcx,r15'
encrypt.c: /tmp/cc6G4jAX.s:48: Error: ARM register expected -- `ror rax,23'
encrypt.c: /tmp/cc6G4jAX.s:49: Error: ARM register expected -- `and rcx,r13'
encrypt.c: /tmp/cc6G4jAX.s:50: Error: bad instruction `xor rax,r13'
encrypt.c: ...
Number of similar (implementation,compiler) pairs: 1, namely:
ImplementationCompiler
T:sse4gcc -march=native -mtune=native -O -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)

Compiler output

encrypt.c: /tmp/ccb2Umfr.s: Assembler messages:
encrypt.c: /tmp/ccb2Umfr.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccb2Umfr.s:20: Error: ARM register expected -- `cmp rdx,0'
encrypt.c: /tmp/ccb2Umfr.s:21: Error: bad instruction `je .nowork'
encrypt.c: /tmp/ccb2Umfr.s:22: Error: ARM register expected -- `sub rsp,696'
encrypt.c: /tmp/ccb2Umfr.s:23: Error: ARM register expected -- `mov [rsp+656+8*0],rbx'
encrypt.c: /tmp/ccb2Umfr.s:24: Error: ARM register expected -- `mov [rsp+656+8*1],r12'
encrypt.c: /tmp/ccb2Umfr.s:25: Error: ARM register expected -- `mov [rsp+656+8*2],r13'
encrypt.c: /tmp/ccb2Umfr.s:26: Error: ARM register expected -- `mov [rsp+656+8*3],r14'
encrypt.c: /tmp/ccb2Umfr.s:27: Error: ARM register expected -- `mov [rsp+656+8*4],r15'
encrypt.c: /tmp/ccb2Umfr.s:36: Error: ARM register expected -- `mov rbx,[rsi+8*(7)]'
encrypt.c: /tmp/ccb2Umfr.s:37: Error: bad instruction `movdqa xmm1,XMMWORD PTR [XMM_QWORD_BSWAP+rip]'
encrypt.c: /tmp/ccb2Umfr.s:38: Error: bad instruction `movdqu xmm0,[rdi+8*(0)]'
encrypt.c: /tmp/ccb2Umfr.s:39: Error: bad instruction `pshufb xmm0,xmm1'
encrypt.c: /tmp/ccb2Umfr.s:40: Error: bad instruction `movdqa [rsp+0+8*(0)],xmm0'
encrypt.c: /tmp/ccb2Umfr.s:41: Error: bad instruction `paddq xmm0,XMMWORD PTR [K512+8*(0)+rip]'
encrypt.c: /tmp/ccb2Umfr.s:42: Error: bad instruction `movdqa [rsp+640+8*(0)],xmm0'
encrypt.c: /tmp/ccb2Umfr.s:43: Error: bad instruction `movdqu xmm0,[rdi+8*(2)]'
encrypt.c: /tmp/ccb2Umfr.s:44: Error: bad instruction `pshufb xmm0,xmm1'
encrypt.c: /tmp/ccb2Umfr.s:45: Error: ARM register expected -- `mov rcx,r14'
encrypt.c: /tmp/ccb2Umfr.s:46: Error: ARM register expected -- `mov rax,r13'
encrypt.c: /tmp/ccb2Umfr.s:47: Error: bad instruction `xor rcx,r15'
encrypt.c: /tmp/ccb2Umfr.s:48: Error: ARM register expected -- `ror rax,23'
encrypt.c: /tmp/ccb2Umfr.s:49: Error: ARM register expected -- `and rcx,r13'
encrypt.c: /tmp/ccb2Umfr.s:50: Error: bad instruction `xor rax,r13'
encrypt.c: ...
Number of similar (implementation,compiler) pairs: 1, namely:
ImplementationCompiler
T:sse4gcc -march=native -mtune=native -Os -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)