Implementation notes: amd64, wolfdale, crypto_aead/led80n6t4silcv3

Computer: wolfdale
Microarchitecture: amd64; Core 2 45nm (1067a)
Architecture: amd64
CPU ID: GenuineIntel-0001067a-bfebfbff
SUPERCOP version: 20240107
Operation: crypto_aead
Primitive: led80n6t4silcv3

Time	Object size	Test size	Implementation	Compiler	Benchmark date	SUPERCOP version
956214	7483 0 32	23040 780 1112	`T:vperm`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20231214	20231212
1021746	6359 0 32	20984 780 1112	`T:vperm`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20231214	20231212
1623503	5584 0 32	19767 772 1112	`T:vperm`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20231214	20231212
1721874	4990 0 32	17947 756 1080	`T:vperm`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20231214	20231212
39572869	6023 4 4	21704 816 1016	`T:ref`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20231214	20231212
40307409	6453 4 4	22936 816 1016	`T:ref`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20231214	20231212
40382805	6375 4 4	22744 816 1016	`T:ref`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20231214	20231212
68708290	7312 4 4	22890 792 1112	`T:ref`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20231214	20231212
116271094	3760 4 4	17887 776 1112	`T:ref`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20231214	20231212
119436769	3382 4 4	16790 808 1016	`T:ref`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20231214	20231212
119999154	3928 4 4	18570 792 1112	`T:ref`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20231214	20231212
121885168	3607 4 4	17582 808 1016	`T:ref`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20231214	20231212
322192983	3152 4 4	16133 768 1080	`T:ref`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20231214	20231212

Compiler output

Implementation: T:vperm
Security model: timingleaks
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

silc.c: silc.c:174:34: warning: implicit conversion from 'int' to 'char' changes value from 128 to -128 [-Wconstant-conversion]
silc.c: state = XORDQW(tmpState, SHR(state, 8));
silc.c: ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~
silc.c: ./common.h:30:126: note: expanded from macro 'SHR'
silc.c: #define SHR(x,n) _mm_shuffle_epi8((x), _mm_set_epi8(127+(n), 126+(n), 125+(n), 124+(n), 123+(n), 122+(n), 121+(n), 120+(n), 119+(n), 118+(n), 117+(n), 116+(n), 115+(n), 114+(n), 113+(n), 112+(n))) // shift to the right
silc.c: ~~~~~~~~~~~~ ^
silc.c: ./common.h:18:43: note: expanded from macro 'XORDQW'
silc.c: #define XORDQW(x, y) _mm_xor_si128((x), (y))
silc.c: ^
silc.c: silc.c:174:34: warning: implicit conversion from 'int' to 'char' changes value from 129 to -127 [-Wconstant-conversion]
silc.c: state = XORDQW(tmpState, SHR(state, 8));
silc.c: ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~
silc.c: ./common.h:30:117: note: expanded from macro 'SHR'
silc.c: #define SHR(x,n) _mm_shuffle_epi8((x), _mm_set_epi8(127+(n), 126+(n), 125+(n), 124+(n), 123+(n), 122+(n), 121+(n), 120+(n), 119+(n), 118+(n), 117+(n), 116+(n), 115+(n), 114+(n), 113+(n), 112+(n))) // shift to the right
silc.c: ~~~~~~~~~~~~ ^
silc.c: ./common.h:18:43: note: expanded from macro 'XORDQW'
silc.c: #define XORDQW(x, y) _mm_xor_si128((x), (y))
silc.c: ^
silc.c: silc.c:174:34: warning: implicit conversion from 'int' to 'char' changes value from 130 to -126 [-Wconstant-conversion]
silc.c: state = XORDQW(tmpState, SHR(state, 8));
silc.c: ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~
silc.c: ./common.h:30:108: note: expanded from macro 'SHR'
silc.c: #define SHR(x,n) _mm_shuffle_epi8((x), _mm_set_epi8(127+(n), 126+(n), 125+(n), 124+(n), 123+(n), 122+(n), 121+(n), 120+(n), 119+(n), 118+(n), 117+(n), 116+(n), 115+(n), 114+(n), 113+(n), 112+(n))) // shift to the right
silc.c: ~~~~~~~~~~~~ ^
silc.c: ./common.h:18:43: note: expanded from macro 'XORDQW'
silc.c: ...

Number of similar (compiler,implementation) pairs: 4, namely:

Compiler	Implementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	T:vperm
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	T:vperm
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	T:vperm
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	T:vperm

Compiler output

Implementation: T:vperm
Security model: timingleaks
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

led.c: led.c:172:16: error: always_inline function '_mm_shuffle_epi8' requires target feature 'ssse3', but would be inlined into function 'MixColumnWithSbox' that is compiled without support for 'ssse3'
led.c: dqword tmp1 = PSHUFB(LOAD(Mbox1), sum);
led.c: ^
led.c: ./common.h:42:22: note: expanded from macro 'PSHUFB'
led.c: #define PSHUFB(s, x) _mm_shuffle_epi8((s), (x)) /*return s(x)*/
led.c: ^
led.c: led.c:174:16: error: always_inline function '_mm_shuffle_epi8' requires target feature 'ssse3', but would be inlined into function 'MixColumnWithSbox' that is compiled without support for 'ssse3'
led.c: dqword tmp2 = PSHUFB(LOAD(Mbox2), sum);
led.c: ^
led.c: ./common.h:42:22: note: expanded from macro 'PSHUFB'
led.c: #define PSHUFB(s, x) _mm_shuffle_epi8((s), (x)) /*return s(x)*/
led.c: ^
led.c: led.c:181:9: error: always_inline function '_mm_shuffle_epi8' requires target feature 'ssse3', but would be inlined into function 'MixColumnWithSbox' that is compiled without support for 'ssse3'
led.c: tmp1 = PSHUFB(LOAD(Mbox3), tmp3);
led.c: ^
led.c: ./common.h:42:22: note: expanded from macro 'PSHUFB'
led.c: #define PSHUFB(s, x) _mm_shuffle_epi8((s), (x)) /*return s(x)*/
led.c: ^
led.c: led.c:182:9: error: always_inline function '_mm_shuffle_epi8' requires target feature 'ssse3', but would be inlined into function 'MixColumnWithSbox' that is compiled without support for 'ssse3'
led.c: tmp2 = PSHUFB(LOAD(Mbox4), tmp3);
led.c: ^
led.c: ./common.h:42:22: note: expanded from macro 'PSHUFB'
led.c: #define PSHUFB(s, x) _mm_shuffle_epi8((s), (x)) /*return s(x)*/
led.c: ^
led.c: led.c:190:9: error: always_inline function '_mm_shuffle_epi8' requires target feature 'ssse3', but would be inlined into function 'MixColumnWithSbox' that is compiled without support for 'ssse3'
led.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	T:vperm