Implementation notes: amd64, titan0, crypto_sign/mqdss64

Computer: titan0
Microarchitecture: amd64; Haswell+AES (306c3)
Architecture: amd64
CPU ID: GenuineIntel-000306c3-bfebfbff
SUPERCOP version: 20240425
Operation: crypto_sign
Primitive: mqdss64

Time	Object size	Test size	Implementation	Compiler	Benchmark date	SUPERCOP version
20983451	26895 0 0	51258 884 1760	`T:avx2`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240428	20240425
22341356	25687 0 0	49770 884 1760	`T:avx2`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240428	20240425
26081004	34071 0 0	57503 828 1792	`T:avx2`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240428	20240425
29968066	12099 0 0	33308 876 1792	`T:avx2`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240428	20240425
31083861	12804 0 0	33082 884 1728	`T:avx2`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240428	20240425
32164690	14068 0 0	35551 828 1792	`T:avx2`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240428	20240425
34382108	12881 0 0	33927 828 1792	`T:avx2`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240428	20240425
35465636	11477 0 0	31255 820 1760	`T:avx2`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240428	20240425
108084875	15551 0 0	39714 884 1760	`T:ref`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240428	20240425
108197024	19130 0 0	43602 884 1760	`T:ref`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240428	20240425
121092686	10173 0 0	31380 876 1792	`T:ref`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240428	20240425
142074587	25320 0 0	48847 828 1792	`T:ref`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240428	20240425
294184906	14306 0 0	37314 884 1728	`T:ref`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240428	20240425
344840209	10338 0 0	30770 884 1728	`T:ref`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240428	20240425
359741692	9165 0 0	28975 820 1760	`T:ref`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240428	20240425
383491535	11684 0 0	33199 828 1792	`T:ref`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240428	20240425
442110189	10303 0 0	31399 828 1792	`T:ref`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240428	20240425

Compiler output

Implementation: T:avx2
Security model: timingleaks
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

gf31.c: gf31.c:14:20: error: always_inline function '_mm256_set1_epi16' requires target feature 'avx', but would be inlined into function 'vgf31_unique' that is compiled without support for 'avx'
gf31.c: __m256i _w31 = _mm256_set1_epi16(31);
gf31.c: ^
gf31.c: gf31.c:14:20: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
gf31.c: gf31.c:18:13: error: always_inline function '_mm256_loadu_si256' requires target feature 'avx', but would be inlined into function 'vgf31_unique' that is compiled without support for 'avx'
gf31.c: x = _mm256_loadu_si256((__m256i const *) (in + 16*i));
gf31.c: ^
gf31.c: gf31.c:18:13: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
gf31.c: gf31.c:19:56: error: always_inline function '_mm256_cmpeq_epi16' requires target feature 'avx2', but would be inlined into function 'vgf31_unique' that is compiled without support for 'avx2'
gf31.c: x = _mm256_xor_si256(x, _mm256_and_si256(_w31, _mm256_cmpeq_epi16(x, _w31)));
gf31.c: ^
gf31.c: gf31.c:19:56: error: AVX vector argument of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
gf31.c: gf31.c:19:33: error: always_inline function '_mm256_and_si256' requires target feature 'avx2', but would be inlined into function 'vgf31_unique' that is compiled without support for 'avx2'
gf31.c: x = _mm256_xor_si256(x, _mm256_and_si256(_w31, _mm256_cmpeq_epi16(x, _w31)));
gf31.c: ^
gf31.c: gf31.c:19:33: error: AVX vector argument of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
gf31.c: gf31.c:19:13: error: always_inline function '_mm256_xor_si256' requires target feature 'avx2', but would be inlined into function 'vgf31_unique' that is compiled without support for 'avx2'
gf31.c: x = _mm256_xor_si256(x, _mm256_and_si256(_w31, _mm256_cmpeq_epi16(x, _w31)));
gf31.c: ^
gf31.c: gf31.c:19:13: error: AVX vector argument of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
gf31.c: gf31.c:20:9: error: always_inline function '_mm256_storeu_si256' requires target feature 'avx', but would be inlined into function 'vgf31_unique' that is compiled without support for 'avx'
gf31.c: _mm256_storeu_si256((__m256i*)(out + i*16), x);
gf31.c: ^
gf31.c: gf31.c:20:9: error: AVX vector argument of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
gf31.c: 12 errors generated.

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	T:avx2