Implementation notes: amd64, titan0, crypto_encode/761x3

Computer: titan0
Microarchitecture: amd64; Haswell+AES (306c3)
Architecture: amd64
CPU ID: GenuineIntel-000306c3-bfebfbff
SUPERCOP version: 20240107
Operation: crypto_encode
Primitive: 761x3
TimeObject sizeTest sizeImplementationCompilerBenchmark dateSUPERCOP version
1231225 0 015296 860 928avxclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121320231212
124511 0 011653 804 960avxgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121320231212
124501 0 011308 796 960avxgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121320231212
125500 0 010328 780 928avxgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121320231212
1261357 0 014517 804 960avxgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121320231212
127457 0 014248 860 928avxclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121320231212
128354 0 011146 852 960avxclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121320231212
130441 0 010496 860 896avxclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121320231212
2262594 0 015765 804 960refgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121320231212
4603158 0 016952 860 928refclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121320231212
4613158 0 017232 860 928refclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121320231212
677167 0 012560 860 896refclang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121320231212
766123 0 010160 860 896refclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121320231212
814151 0 09944 780 928refgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121320231212
823178 0 011301 804 960refgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121320231212
833169 0 010956 796 960refgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121320231212
1190106 0 010890 852 960refclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121320231212

Compiler output

Implementation: avx
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
encode.c: encode.c:26:18: error: always_inline function '_mm256_loadu_si256' requires target feature 'avx', but would be inlined into function 'crypto_encode_761x3_avx_constbranchindex' that is compiled without support for 'avx'
encode.c: __m256i f0 = _mm256_loadu_si256((const __m256i *) (f+0));
encode.c: ^
encode.c: encode.c:26:18: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
encode.c: encode.c:27:18: error: always_inline function '_mm256_loadu_si256' requires target feature 'avx', but would be inlined into function 'crypto_encode_761x3_avx_constbranchindex' that is compiled without support for 'avx'
encode.c: __m256i f1 = _mm256_loadu_si256((const __m256i *) (f+32));
encode.c: ^
encode.c: encode.c:27:18: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
encode.c: encode.c:28:18: error: always_inline function '_mm256_loadu_si256' requires target feature 'avx', but would be inlined into function 'crypto_encode_761x3_avx_constbranchindex' that is compiled without support for 'avx'
encode.c: __m256i f2 = _mm256_loadu_si256((const __m256i *) (f+64));
encode.c: ^
encode.c: encode.c:28:18: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
encode.c: encode.c:29:18: error: always_inline function '_mm256_loadu_si256' requires target feature 'avx', but would be inlined into function 'crypto_encode_761x3_avx_constbranchindex' that is compiled without support for 'avx'
encode.c: __m256i f3 = _mm256_loadu_si256((const __m256i *) (f+96));
encode.c: ^
encode.c: encode.c:29:18: error: AVX vector return of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
encode.c: encode.c:33:18: error: always_inline function '_mm256_packus_epi16' requires target feature 'avx2', but would be inlined into function 'crypto_encode_761x3_avx_constbranchindex' that is compiled without support for 'avx2'
encode.c: __m256i a0 = _mm256_packus_epi16(f0&lobytes,f1&lobytes);
encode.c: ^
encode.c: encode.c:33:18: error: AVX vector argument of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
encode.c: encode.c:36:38: error: always_inline function '_mm256_srli_epi16' requires target feature 'avx2', but would be inlined into function 'crypto_encode_761x3_avx_constbranchindex' that is compiled without support for 'avx2'
encode.c: __m256i a1 = _mm256_packus_epi16(_mm256_srli_epi16(f0,8),_mm256_srli_epi16(f1,8));
encode.c: ^
encode.c: encode.c:36:38: error: AVX vector argument of type '__m256i' (vector of 4 'long long' values) without 'avx' enabled changes the ABI
encode.c: encode.c:36:62: error: always_inline function '_mm256_srli_epi16' requires target feature 'avx2', but would be inlined into function 'crypto_encode_761x3_avx_constbranchindex' that is compiled without support for 'avx2'
encode.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE avx