Implementation notes: amd64, margaux, crypto_core/rainbowcalsecret683248

Computer: margaux
Architecture: amd64
CPU ID: GenuineIntel-000006fb-bfebfbff
SUPERCOP version: 20201130
Operation: crypto_core
Primitive: rainbowcalsecret683248

Time	Object size	Test size	Implementation	Compiler	Benchmark date	SUPERCOP version
43096563	53454 8 0	65938 816 760	`ssse3`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20201019	20201018
43474104	50282 8 0	61926 760 832	`ssse3`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20201019	20201018
44392005	51506 8 0	63454 760 832	`ssse3`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20201019	20201018
44444736	44494 8 0	56026 816 760	`ssse3`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20201019	20201018
44446599	44494 8 0	56026 816 760	`ssse3`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20201019	20201018
44502318	38411 8 0	49168 808 760	`ssse3`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20201019	20201018
44558001	66310 8 0	79958 760 832	`ssse3`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20201019	20201018
58943511	25238 8 0	36129 736 800	`ssse3`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20201019	20201018
215065791	40074 0 0	52616 792 760	`amd64`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20201019	20201018
215326098	38682 0 0	51096 792 760	`amd64`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20201019	20201018
216080235	38982 0 0	50592 792 760	`amd64`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20201019	20201018
216085050	38982 0 0	50592 792 760	`amd64`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20201019	20201018
235439406	41567 0 0	52576 792 760	`ref`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20201019	20201018
235446903	41567 0 0	52576 792 760	`ref`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20201019	20201018
235532268	41151 0 0	52968 792 760	`ref`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20201019	20201018
235662687	42543 0 0	54488 792 760	`ref`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20201019	20201018
243813204	21954 0 0	32694 784 760	`amd64`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20201019	20201018
244658709	38042 0 0	49748 736 832	`amd64`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20201019	20201018
245358504	39640 0 0	53116 736 832	`amd64`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20201019	20201018
252546462	38707 0 0	50108 736 832	`amd64`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20201019	20201018
460059876	11101 0 0	21679 712 800	`amd64`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20201019	20201018
466317360	20282 0 0	31062 784 760	`ref`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20201019	20201018
481945149	22911 0 0	36412 736 832	`ref`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20201019	20201018
483049503	21242 0 0	32980 736 832	`ref`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20201019	20201018
507047544	21539 0 0	33004 736 832	`ref`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20201019	20201018
1045652634	10098 0 0	20663 712 800	`ref`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20201019	20201018

Compiler output

Implementation: avx2
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

blas_comm.c: In file included from blas_comm.c:6:
blas_comm.c: In file included from ./blas.h:25:
blas_comm.c: ./blas_avx2.h:88:17: error: always_inline function '_mm256_loadu_si256' requires target feature 'xsave', but would be inlined into function 'gf256v_add_avx2' that is compiled without support for 'xsave'
blas_comm.c: __m256i inp = _mm256_loadu_si256( (__m256i*) (a+i*32) );
blas_comm.c: ^
blas_comm.c: ./blas_avx2.h:89:17: error: always_inline function '_mm256_loadu_si256' requires target feature 'xsave', but would be inlined into function 'gf256v_add_avx2' that is compiled without support for 'xsave'
blas_comm.c: __m256i out = _mm256_loadu_si256( (__m256i*) (accu_b+i*32) );
blas_comm.c: ^
blas_comm.c: ./blas_avx2.h:91:3: error: always_inline function '_mm256_storeu_si256' requires target feature 'xsave', but would be inlined into function 'gf256v_add_avx2' that is compiled without support for 'xsave'
blas_comm.c: _mm256_storeu_si256( (__m256i*) (accu_b+i*32) , out );
blas_comm.c: ^
blas_comm.c: fatal error: error in backend: Do not know how to split this operator's operand!
blas_comm.c:
blas_comm.c: clang: error: clang frontend command failed with exit code 70 (use -v to see invocation)
blas_comm.c: clang version 3.8.0-2ubuntu4 (tags/RELEASE_380/final)
blas_comm.c: Target: x86_64-pc-linux-gnu
blas_comm.c: Thread model: posix
blas_comm.c: InstalledDir: /usr/bin
blas_comm.c: clang: note: diagnostic msg: PLEASE submit a bug report to http://llvm.org/bugs/ and include the crash backtrace, preprocessed source, and associated run script.
blas_comm.c: clang: note: diagnostic msg:
blas_comm.c: ********************
blas_comm.c:
blas_comm.c: PLEASE ATTACH THE FOLLOWING FILES TO THE BUG REPORT:
blas_comm.c: Preprocessed source(s) and associated run script(s) are located at:
blas_comm.c: clang: note: diagnostic msg: /tmp/blas_comm-6a30cc.c
blas_comm.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx2

Compiler output

Implementation: avx2
Security model: constbranchindex
Compiler: clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx2

Compiler output

Implementation: avx2
Security model: constbranchindex
Compiler: clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx2

Compiler output

Implementation: avx2
Security model: constbranchindex
Compiler: clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx2

Compiler output

Implementation: avx2
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

blas_comm.c: In file included from blas_comm.c:6:
blas_comm.c: In file included from ./blas.h:25:
blas_comm.c: ./blas_avx2.h:88:17: error: always_inline function '_mm256_loadu_si256' requires target feature 'sse4.2', but would be inlined into function 'gf256v_add_avx2' that is compiled without support for 'sse4.2'
blas_comm.c: __m256i inp = _mm256_loadu_si256( (__m256i*) (a+i*32) );
blas_comm.c: ^
blas_comm.c: ./blas_avx2.h:89:17: error: always_inline function '_mm256_loadu_si256' requires target feature 'sse4.2', but would be inlined into function 'gf256v_add_avx2' that is compiled without support for 'sse4.2'
blas_comm.c: __m256i out = _mm256_loadu_si256( (__m256i*) (accu_b+i*32) );
blas_comm.c: ^
blas_comm.c: ./blas_avx2.h:91:3: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'gf256v_add_avx2' that is compiled without support for 'sse4.2'
blas_comm.c: _mm256_storeu_si256( (__m256i*) (accu_b+i*32) , out );
blas_comm.c: ^
blas_comm.c: fatal error: error in backend: Do not know how to split this operator's operand!
blas_comm.c:
blas_comm.c: clang: error: clang frontend command failed with exit code 70 (use -v to see invocation)
blas_comm.c: clang version 3.8.0-2ubuntu4 (tags/RELEASE_380/final)
blas_comm.c: Target: x86_64-pc-linux-gnu
blas_comm.c: Thread model: posix
blas_comm.c: InstalledDir: /usr/bin
blas_comm.c: clang: note: diagnostic msg: PLEASE submit a bug report to http://llvm.org/bugs/ and include the crash backtrace, preprocessed source, and associated run script.
blas_comm.c: clang: note: diagnostic msg:
blas_comm.c: ********************
blas_comm.c:
blas_comm.c: PLEASE ATTACH THE FOLLOWING FILES TO THE BUG REPORT:
blas_comm.c: Preprocessed source(s) and associated run script(s) are located at:
blas_comm.c: clang: note: diagnostic msg: /tmp/blas_comm-c15d66.c
blas_comm.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx2

Compiler output

Implementation: avx2
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE

blas_comm.c: In file included from blas_avx2.h:15:0,
blas_comm.c: from blas.h:25,
blas_comm.c: from blas_comm.c:6:
blas_comm.c: gf16_avx2.h: In function 'linear_transform_8x8_256b':
blas_comm.c: gf16_avx2.h:28:1: warning: AVX vector return without AVX enabled changes the ABI [-Wpsabi]
blas_comm.c: {
blas_comm.c: ^
blas_comm.c: In file included from /usr/lib/gcc/x86_64-linux-gnu/5/include/immintrin.h:41:0,
blas_comm.c: from blas_avx2.h:10,
blas_comm.c: from blas.h:25,
blas_comm.c: from blas_comm.c:6:
blas_comm.c: blas_avx2.h: In function 'gf256v_add_avx2':
blas_comm.c: /usr/lib/gcc/x86_64-linux-gnu/5/include/avxintrin.h:900:1: error: inlining failed in call to always_inline '_mm256_storeu_si256': target specific option mismatch
blas_comm.c: _mm256_storeu_si256 (__m256i *__P, __m256i __A)
blas_comm.c: ^
blas_comm.c: In file included from blas.h:25:0,
blas_comm.c: from blas_comm.c:6:
blas_comm.c: blas_avx2.h:91:3: error: called from here
blas_comm.c: _mm256_storeu_si256( (__m256i*) (accu_b+i*32) , out );
blas_comm.c: ^
blas_comm.c: In file included from /usr/lib/gcc/x86_64-linux-gnu/5/include/immintrin.h:41:0,
blas_comm.c: from blas_avx2.h:10,
blas_comm.c: from blas.h:25,
blas_comm.c: from blas_comm.c:6:
blas_comm.c: /usr/lib/gcc/x86_64-linux-gnu/5/include/avxintrin.h:894:1: error: inlining failed in call to always_inline '_mm256_loadu_si256': target specific option mismatch
blas_comm.c: ...

Number of similar (compiler,implementation) pairs: 4, namely:

Compiler	Implementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE	avx2
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE	avx2
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE	avx2
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE	avx2

Compiler output

Implementation: ssse3
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

parallel_matrix_op.c: In file included from parallel_matrix_op.c:8:
parallel_matrix_op.c: In file included from ./blas.h:25:
parallel_matrix_op.c: In file included from ./blas_sse.h:16:
parallel_matrix_op.c: ./gf16_sse.h:34:9: error: always_inline function '_mm_shuffle_epi8' requires target feature 'ssse3', but would be inlined into function 'linear_transform_8x8_128b' that is compiled without support for 'ssse3'
parallel_matrix_op.c: return _mm_shuffle_epi8(tab_l,v&mask_f)^_mm_shuffle_epi8(tab_h,_mm_srli_epi16(v,4)&mask_f);
parallel_matrix_op.c: ^
parallel_matrix_op.c: ./gf16_sse.h:34:42: error: always_inline function '_mm_shuffle_epi8' requires target feature 'ssse3', but would be inlined into function 'linear_transform_8x8_128b' that is compiled without support for 'ssse3'
parallel_matrix_op.c: return _mm_shuffle_epi8(tab_l,v&mask_f)^_mm_shuffle_epi8(tab_h,_mm_srli_epi16(v,4)&mask_f);
parallel_matrix_op.c: ^
parallel_matrix_op.c: fatal error: error in backend: Cannot select: 0x3078db0: v16i8 = X86ISD::PSHUFB 0x3078430, 0x30a6390
parallel_matrix_op.c: 0x3078430: v16i8,ch = CopyFromReg 0x2f6ca30, Register:v16i8 %vreg35
parallel_matrix_op.c: 0x3095ad0: v16i8 = Register %vreg35
parallel_matrix_op.c: 0x30a6390: v16i8 = bitcast 0x3094e50
parallel_matrix_op.c: 0x3094e50: v2i64 = and 0x30b21d0, 0x30b2300
parallel_matrix_op.c: 0x30b21d0: v2i64 = bitcast 0x3097d50
parallel_matrix_op.c: 0x3097d50: v8i16 = X86ISD::VSRLI 0x3071a20, Constant:i8<4>
parallel_matrix_op.c: 0x3071a20: v8i16 = bitcast 0x3079270
parallel_matrix_op.c: 0x3079270: v2i64,ch = load<LD16[%uglygep4243](align=1)(tbaa=<0x2d45718>)> 0x2f6ca30, 0x307e200, undef:i64
parallel_matrix_op.c: 0x307e200: i64 = add 0x30b3440, 0x30b3310
parallel_matrix_op.c: 0x30b3440: i64,ch = CopyFromReg 0x2f6ca30, Register:i64 %vreg32
parallel_matrix_op.c: 0x30701c0: i64 = Register %vreg32
parallel_matrix_op.c: 0x30b3310: i64,ch = CopyFromReg 0x2f6ca30, Register:i64 %vreg37
parallel_matrix_op.c: 0x3095570: i64 = Register %vreg37
parallel_matrix_op.c: 0x307cf90: i64 = undef
parallel_matrix_op.c: 0x30a5aa0: i8 = Constant<4>
parallel_matrix_op.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	ssse3