Implementation notes: amd64, intelnuci7, crypto_core/mult3sntrup857

Computer: intelnuci7
Architecture: amd64
CPU ID: GenuineIntel-000806e9-bfebfbff
SUPERCOP version: 20211108
Operation: crypto_core
Primitive: mult3sntrup857

Time	Object size	Test size	Implementation	Compiler	Benchmark date	SUPERCOP version
10132	22279 0 0	34201 776 776	`avx`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
10140	19475 0 0	31401 776 776	`avx`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
10170	19475 0 0	31401 776 776	`avx`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
10216	17121 0 0	31401 776 776	`avx800`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
10234	17121 0 0	31401 776 776	`avx800`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
10240	19909 0 0	34185 776 776	`avx800`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
10696	14910 0 0	30214 776 832	`avx800`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
10702	17399 0 0	30337 776 776	`round2`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
10732	17399 0 0	30337 776 776	`round2`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
10750	20187 0 0	33121 776 776	`round2`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
11738	16614 0 0	31926 776 832	`avx`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
13182	15021 0 0	30350 776 832	`round2`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
16016	15748 0 0	24343 768 760	`avx`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
16064	14010 0 0	24631 768 760	`avx800`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
16612	11811 0 0	21887 768 760	`round2`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
21272	14837 0 0	26685 768 832	`avx800`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
22332	16734 0 0	28589 768 832	`avx`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
23328	14526 0 0	26461 768 832	`avx800`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
23880	13343 0 0	25213 768 832	`round2`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
24466	16230 0 0	28173 768 832	`avx`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
24908	13181 0 0	25141 768 832	`round2`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
26260	14942 0 0	25761 752 800	`avx800`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
26530	14934 0 0	25753 752 800	`avx`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
29154	14134 0 0	24969 752 800	`round2`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
277182	4158 0 0	18433 776 776	`ref`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
278980	1902 0 0	16177 776 776	`ref`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
279122	1902 0 0	16177 776 776	`ref`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
370564	2820 0 0	18158 776 832	`ref`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
704696	2706 0 0	16273 776 760	`ref`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
1184568	452 0 0	11071 768 760	`ref`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
1600024	591 0 0	12517 768 832	`ref`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
3223442	658 0 0	12501 768 832	`ref`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
3269896	546 0 0	11321 752 800	`ref`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108

Compiler output

Implementation: avx
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

mult1024.c: mult1024.c:212:7: error: always_inline function '_mm256_set1_epi16' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_mult3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: x = const_x16(0);
mult1024.c: ^
mult1024.c: mult1024.c:10:19: note: expanded from macro 'const_x16'
mult1024.c: #define const_x16 _mm256_set1_epi16
mult1024.c: ^
mult1024.c: mult1024.c:213:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_mult3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: for (i = p&~15;i < 1024;i += 16) store_x16(&f[i],x);
mult1024.c: ^
mult1024.c: mult1024.c:9:24: note: expanded from macro 'store_x16'
mult1024.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1024.c: ^
mult1024.c: mult1024.c:214:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_mult3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: for (i = p&~15;i < 1024;i += 16) store_x16(&g[i],x);
mult1024.c: ^
mult1024.c: mult1024.c:9:24: note: expanded from macro 'store_x16'
mult1024.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1024.c: ^
mult1024.c: mult1024.c:231:20: error: always_inline function '_mm256_loadu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_mult3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: int16x16 fgi = load_x16(&fg[i]);
mult1024.c: ^
mult1024.c: mult1024.c:8:21: note: expanded from macro 'load_x16'
mult1024.c: #define load_x16(p) _mm256_loadu_si256((int16x16 *) (p))
mult1024.c: ^
mult1024.c: mult1024.c:232:21: error: always_inline function '_mm256_loadu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_mult3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx

Compiler output

Implementation: avx800
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

mult1024.c: mult1024.c:212:7: error: always_inline function '_mm256_set1_epi16' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_mult3sntrup857_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: x = const_x16(0);
mult1024.c: ^
mult1024.c: mult1024.c:10:19: note: expanded from macro 'const_x16'
mult1024.c: #define const_x16 _mm256_set1_epi16
mult1024.c: ^
mult1024.c: mult1024.c:213:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_mult3sntrup857_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: for (i = p&~15;i < 1024;i += 16) store_x16(&f[i],x);
mult1024.c: ^
mult1024.c: mult1024.c:9:24: note: expanded from macro 'store_x16'
mult1024.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1024.c: ^
mult1024.c: mult1024.c:214:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_mult3sntrup857_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: for (i = p&~15;i < 1024;i += 16) store_x16(&g[i],x);
mult1024.c: ^
mult1024.c: mult1024.c:9:24: note: expanded from macro 'store_x16'
mult1024.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1024.c: ^
mult1024.c: mult1024.c:231:20: error: always_inline function '_mm256_loadu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_mult3sntrup857_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: int16x16 fgi = load_x16(&fg[i]);
mult1024.c: ^
mult1024.c: mult1024.c:8:21: note: expanded from macro 'load_x16'
mult1024.c: #define load_x16(p) _mm256_loadu_si256((int16x16 *) (p))
mult1024.c: ^
mult1024.c: mult1024.c:232:21: error: always_inline function '_mm256_loadu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_mult3sntrup857_avx800_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx800

Compiler output

Implementation: round2
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

mult1024.c: mult1024.c:212:7: error: always_inline function '_mm256_set1_epi16' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_mult3sntrup857_round2_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: x = const_x16(0);
mult1024.c: ^
mult1024.c: mult1024.c:10:19: note: expanded from macro 'const_x16'
mult1024.c: #define const_x16 _mm256_set1_epi16
mult1024.c: ^
mult1024.c: mult1024.c:213:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_mult3sntrup857_round2_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: for (i = p&~15;i < 1024;i += 16) store_x16(&f[i],x);
mult1024.c: ^
mult1024.c: mult1024.c:9:24: note: expanded from macro 'store_x16'
mult1024.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1024.c: ^
mult1024.c: mult1024.c:214:36: error: always_inline function '_mm256_storeu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_mult3sntrup857_round2_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: for (i = p&~15;i < 1024;i += 16) store_x16(&g[i],x);
mult1024.c: ^
mult1024.c: mult1024.c:9:24: note: expanded from macro 'store_x16'
mult1024.c: #define store_x16(p,v) _mm256_storeu_si256((int16x16 *) (p),(v))
mult1024.c: ^
mult1024.c: mult1024.c:231:20: error: always_inline function '_mm256_loadu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_mult3sntrup857_round2_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: int16x16 fgi = load_x16(&fg[i]);
mult1024.c: ^
mult1024.c: mult1024.c:8:21: note: expanded from macro 'load_x16'
mult1024.c: #define load_x16(p) _mm256_loadu_si256((int16x16 *) (p))
mult1024.c: ^
mult1024.c: mult1024.c:232:21: error: always_inline function '_mm256_loadu_si256' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_mult3sntrup857_round2_constbranchindex' that is compiled without support for 'sse4.2'
mult1024.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	round2