Implementation notes: amd64, intelnuci7, crypto_core/inv3sntrup857

Computer: intelnuci7
Architecture: amd64
CPU ID: GenuineIntel-000806e9-bfebfbff
SUPERCOP version: 20211108
Operation: crypto_core
Primitive: inv3sntrup857

Time	Object size	Test size	Implementation	Compiler	Benchmark date	SUPERCOP version
158840	17165 0 0	32374 776 832	`avx`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
168484	23424 0 0	37649 776 776	`avx`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
168942	18653 0 0	32881 776 776	`avx`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
169288	18653 0 0	32881 776 776	`avx`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
173964	10980 0 0	21567 768 760	`avx`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
198616	11810 0 0	23685 768 832	`avx`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
206068	11342 0 0	23157 768 832	`avx`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
267338	6239 0 0	17081 752 800	`avx`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
5455798	2507 0 0	17832 784 832	`ref`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
13412550	7644 0 0	21865 776 776	`ref`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
13491304	3633 0 0	17801 776 776	`ref`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
13544472	3633 0 0	17801 776 776	`ref`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
21715450	5393 0 0	18889 776 760	`ref`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
24378924	676 0 0	11223 768 760	`ref`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
55228370	860 0 0	12637 768 832	`ref`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
56408760	862 0 0	12701 768 832	`ref`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
66112600	740 0 0	11465 752 800	`ref`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108

Compiler output

Implementation: avx
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

r3_recip.c: r3_recip.c:418:11: error: always_inline function '_mm256_set_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F0[0] = _mm256_set_epi32(0,0,0,0,0,0,0,1);
r3_recip.c: ^
r3_recip.c: r3_recip.c:419:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F0[1] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:420:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F0[2] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:421:11: error: always_inline function '_mm256_set_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F0[3] = _mm256_set_epi32(0,0,0,0,0,4194304,0,4194304);
r3_recip.c: ^
r3_recip.c: r3_recip.c:422:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F1[0] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:423:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F1[1] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:424:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F1[2] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:425:11: error: always_inline function '_mm256_set_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F1[3] = _mm256_set_epi32(0,0,0,0,0,4194304,0,4194304);
r3_recip.c: ^
r3_recip.c: r3_recip.c:427:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx