Implementation notes: amd64, intelnuci7, crypto_core/inv3sntrup653

Computer: intelnuci7
Architecture: amd64
CPU ID: GenuineIntel-000806e9-bfebfbff
SUPERCOP version: 20211108
Operation: crypto_core
Primitive: inv3sntrup653

Time	Object size	Test size	Implementation	Compiler	Benchmark date	SUPERCOP version
93418	10468 0 0	25686 776 832	`avx`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
102994	14171 0 0	28385 776 776	`avx`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
103380	11522 0 0	25745 776 776	`avx`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
103418	11522 0 0	25745 776 776	`avx`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
107114	7427 0 0	17999 768 760	`avx`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
115284	8536 0 0	20405 768 832	`avx`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
124546	7656 0 0	19469 768 832	`avx`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
170158	4856 0 0	15681 752 800	`avx`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
2786436	5766 0 0	21080 784 832	`ref`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
7597400	7544 0 0	21769 776 776	`ref`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
7619104	6294 0 0	20473 776 776	`ref`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
7643536	6294 0 0	20473 776 776	`ref`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
12580010	5198 0 0	18697 776 760	`ref`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
14243358	676 0 0	11223 768 760	`ref`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20211109	20211108
32087030	860 0 0	12637 768 832	`ref`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
32744880	862 0 0	12701 768 832	`ref`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108
38368838	740 0 0	11465 752 800	`ref`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20211109	20211108

Compiler output

Implementation: avx
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

r3_recip.c: r3_recip.c:362:11: error: always_inline function '_mm256_set_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup653_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F0[0] = _mm256_set_epi32(0,0,0,0,0,0,0,1);
r3_recip.c: ^
r3_recip.c: r3_recip.c:363:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup653_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F0[1] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:364:11: error: always_inline function '_mm256_set_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup653_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F0[2] = _mm256_set_epi32(0,0,0,0,8,0,8,0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:365:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup653_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F1[0] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:366:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup653_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F1[1] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:367:11: error: always_inline function '_mm256_set_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup653_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F1[2] = _mm256_set_epi32(0,0,0,0,8,0,8,0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:369:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup653_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: V0[0] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:370:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup653_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: V1[0] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:371:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup653_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx