Implementation notes: amd64, h8atom, crypto_aead/present80n6t4silcv3

Computer: h8atom
Microarchitecture: amd64; Bonnell (30661)
Architecture: amd64
CPU ID: GenuineIntel-00030661-bfebfbff
SUPERCOP version: 20240107
Operation: crypto_aead
Primitive: present80n6t4silcv3
TimeObject sizeTest sizeImplementationCompilerBenchmark dateSUPERCOP version
10115425735 752 51221981 1544 1440T:vpermgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121620231212
10281465405 752 51220325 1544 1440T:vpermgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121620231212
24115074469 752 51217624 1520 1408T:vpermgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121620231212
24321224939 752 51219412 1536 1440T:vpermgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121620231212
728137763413 0 019444 816 856T:refclang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121620231212
728472503322 0 018188 816 856T:refclang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121620231212
757579202401 0 015278 808 856T:refclang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121620231212
932752384023 0 019988 816 856T:refclang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121620231212
962738004623 0 020784 784 928T:refgcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121620231212
1030597542630 0 016332 816 856T:refclang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2023121620231212
1044228363178 0 018008 784 928T:refgcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121620231212
1152201473084 0 017333 768 928T:refgcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121620231212
2209342732688 0 015731 760 896T:refgcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2023121620231212

Compiler output

Implementation: T:vperm
Security model: timingleaks
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
silc.c: silc.c:170:34: warning: implicit conversion from 'int' to 'char' changes value from 128 to -128 [-Wconstant-conversion]
silc.c: state = XORDQW(tmpState, SHR(state, 8));
silc.c: ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~
silc.c: ./common.h:30:126: note: expanded from macro 'SHR'
silc.c: #define SHR(x,n) _mm_shuffle_epi8((x), _mm_set_epi8(127+(n), 126+(n), 125+(n), 124+(n), 123+(n), 122+(n), 121+(n), 120+(n), 119+(n), 118+(n), 117+(n), 116+(n), 115+(n), 114+(n), 113+(n), 112+(n))) // shift to the right
silc.c: ~~~~~~~~~~~~ ^
silc.c: ./common.h:17:43: note: expanded from macro 'XORDQW'
silc.c: #define XORDQW(x, y) _mm_xor_si128((x), (y))
silc.c: ^
silc.c: silc.c:170:34: warning: implicit conversion from 'int' to 'char' changes value from 129 to -127 [-Wconstant-conversion]
silc.c: state = XORDQW(tmpState, SHR(state, 8));
silc.c: ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~
silc.c: ./common.h:30:117: note: expanded from macro 'SHR'
silc.c: #define SHR(x,n) _mm_shuffle_epi8((x), _mm_set_epi8(127+(n), 126+(n), 125+(n), 124+(n), 123+(n), 122+(n), 121+(n), 120+(n), 119+(n), 118+(n), 117+(n), 116+(n), 115+(n), 114+(n), 113+(n), 112+(n))) // shift to the right
silc.c: ~~~~~~~~~~~~ ^
silc.c: ./common.h:17:43: note: expanded from macro 'XORDQW'
silc.c: #define XORDQW(x, y) _mm_xor_si128((x), (y))
silc.c: ^
silc.c: silc.c:170:34: warning: implicit conversion from 'int' to 'char' changes value from 130 to -126 [-Wconstant-conversion]
silc.c: state = XORDQW(tmpState, SHR(state, 8));
silc.c: ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~
silc.c: ./common.h:30:108: note: expanded from macro 'SHR'
silc.c: #define SHR(x,n) _mm_shuffle_epi8((x), _mm_set_epi8(127+(n), 126+(n), 125+(n), 124+(n), 123+(n), 122+(n), 121+(n), 120+(n), 119+(n), 118+(n), 117+(n), 116+(n), 115+(n), 114+(n), 113+(n), 112+(n))) // shift to the right
silc.c: ~~~~~~~~~~~~ ^
silc.c: ./common.h:17:43: note: expanded from macro 'XORDQW'
silc.c: ...

Number of similar (compiler,implementation) pairs: 4, namely:
CompilerImplementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:vperm
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:vperm
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:vperm
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:vperm

Compiler output

Implementation: T:vperm
Security model: timingleaks
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE
present.c: present.c:112:15: error: always_inline function '_mm_shuffle_epi8' requires target feature 'ssse3', but would be inlined into function 'format_input' that is compiled without support for 'ssse3'
present.c: dqword tmp = PSHUFB(*state, LOAD(PRESENTInShuffleU));
present.c: ^
present.c: ./common.h:40:22: note: expanded from macro 'PSHUFB'
present.c: #define PSHUFB(s, x) _mm_shuffle_epi8((s), (x)) /*return s(x)*/
present.c: ^
present.c: present.c:113:11: error: always_inline function '_mm_shuffle_epi8' requires target feature 'ssse3', but would be inlined into function 'format_input' that is compiled without support for 'ssse3'
present.c: *state = PSHUFB(*state, LOAD(PRESENTInShuffleL));
present.c: ^
present.c: ./common.h:40:22: note: expanded from macro 'PSHUFB'
present.c: #define PSHUFB(s, x) _mm_shuffle_epi8((s), (x)) /*return s(x)*/
present.c: ^
present.c: 2 errors generated.

Number of similar (compiler,implementation) pairs: 1, namely:
CompilerImplementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE T:vperm