Implementation notes: amd64, gcc14, crypto_core/inv3sntrup857

Computer: gcc14
Architecture: amd64
CPU ID: GenuineIntel-00010676-bfebfbff
SUPERCOP version: 20220506
Operation: crypto_core
Primitive: inv3sntrup857

Time	Object size	Test size	Implementation	Compiler	Benchmark date	SUPERCOP version
8315486	4484 0 0	18824 852 944	`ref`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210114	20210114
26233094	1929 0 0	14195 820 912	`ref`	`clang_-march=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210114	20210114
26234079	1929 0 0	14195 820 912	`ref`	`clang_-march=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210114	20210114
26257221	1929 0 0	15131 820 912	`ref`	`clang_-march=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210114	20210114
29313113	3064 0 0	16123 820 912	`ref`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210114	20210114
36258748	684 0 0	11781 812 912	`ref`	`clang_-march=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20210114	20210114
59118731	837 0 0	13157 836 944	`ref`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210114	20210114
59408432	808 0 0	12869 836 944	`ref`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210114	20210114
61538403	722 0 0	11681 820 944	`ref`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20210114	20210114

Compiler output

Implementation: avx
Security model: constbranchindex
Compiler: clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

r3_recip.c: r3_recip.c:418:11: error: always_inline function '_mm256_set_epi32' requires target feature 'xsave', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'xsave'
r3_recip.c: F0[0] = _mm256_set_epi32(0,0,0,0,0,0,0,1);
r3_recip.c: ^
r3_recip.c: r3_recip.c:419:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'xsave', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'xsave'
r3_recip.c: F0[1] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:420:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'xsave', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'xsave'
r3_recip.c: F0[2] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:421:11: error: always_inline function '_mm256_set_epi32' requires target feature 'xsave', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'xsave'
r3_recip.c: F0[3] = _mm256_set_epi32(0,0,0,0,0,4194304,0,4194304);
r3_recip.c: ^
r3_recip.c: r3_recip.c:422:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'xsave', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'xsave'
r3_recip.c: F1[0] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:423:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'xsave', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'xsave'
r3_recip.c: F1[1] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:424:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'xsave', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'xsave'
r3_recip.c: F1[2] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:425:11: error: always_inline function '_mm256_set_epi32' requires target feature 'xsave', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'xsave'
r3_recip.c: F1[3] = _mm256_set_epi32(0,0,0,0,0,4194304,0,4194304);
r3_recip.c: ^
r3_recip.c: r3_recip.c:427:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'xsave', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'xsave'
r3_recip.c: ...

Number of similar (compiler,implementation) pairs: 4, namely:

Compiler	Implementations
clang -march=native -O2 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx
clang -march=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx
clang -march=native -O -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx
clang -march=native -Os -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx

Compiler output

Implementation: avx
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

r3_recip.c: r3_recip.c:418:11: error: always_inline function '_mm256_set_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F0[0] = _mm256_set_epi32(0,0,0,0,0,0,0,1);
r3_recip.c: ^
r3_recip.c: r3_recip.c:419:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F0[1] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:420:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F0[2] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:421:11: error: always_inline function '_mm256_set_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F0[3] = _mm256_set_epi32(0,0,0,0,0,4194304,0,4194304);
r3_recip.c: ^
r3_recip.c: r3_recip.c:422:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F1[0] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:423:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F1[1] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:424:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F1[2] = _mm256_set1_epi32(0);
r3_recip.c: ^
r3_recip.c: r3_recip.c:425:11: error: always_inline function '_mm256_set_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: F1[3] = _mm256_set_epi32(0,0,0,0,0,4194304,0,4194304);
r3_recip.c: ^
r3_recip.c: r3_recip.c:427:11: error: always_inline function '_mm256_set1_epi32' requires target feature 'sse4.2', but would be inlined into function 'crypto_core_inv3sntrup857_avx_constbranchindex' that is compiled without support for 'sse4.2'
r3_recip.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	avx

Compiler output

Implementation: avx
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE

r3_recip.c: r3_recip.c: In function 'crypto_core_inv3sntrup857_avx_constbranchindex':
r3_recip.c: r3_recip.c:418:9: warning: AVX vector return without AVX enabled changes the ABI [-Wpsabi]
r3_recip.c: F0[0] = _mm256_set_epi32(0,0,0,0,0,0,0,1);
r3_recip.c: ~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
r3_recip.c: r3_recip.c: In function 'vec256_swap':
r3_recip.c: r3_recip.c:178:20: note: The ABI for passing parameters with 32-byte alignment has changed in GCC 4.6
r3_recip.c: static inline void vec256_swap(vec256 *f,vec256 *g,int len,vec256 mask)
r3_recip.c: ^~~~~~~~~~~
r3_recip.c: In file included from /usr/lib/gcc/x86_64-linux-gnu/6/include/immintrin.h:43:0,
r3_recip.c: from r3_recip.c:3:
r3_recip.c: r3_recip.c: In function 'vec256_frombits':
r3_recip.c: /usr/lib/gcc/x86_64-linux-gnu/6/include/avx2intrin.h:597:1: error: inlining failed in call to always_inline '_mm256_shuffle_epi32': target specific option mismatch
r3_recip.c: _mm256_shuffle_epi32 (__m256i __A, const int __mask)
r3_recip.c: ^~~~~~~~~~~~~~~~~~~~
r3_recip.c: r3_recip.c:69:7: note: called from here
r3_recip.c: h = _mm256_shuffle_epi32(h,0xd8);
r3_recip.c: ~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
r3_recip.c: In file included from /usr/lib/gcc/x86_64-linux-gnu/6/include/immintrin.h:43:0,
r3_recip.c: from r3_recip.c:3:
r3_recip.c: /usr/lib/gcc/x86_64-linux-gnu/6/include/avx2intrin.h:1068:1: error: inlining failed in call to always_inline '_mm256_permute4x64_epi64': target specific option mismatch
r3_recip.c: _mm256_permute4x64_epi64 (__m256i __X, const int __M)
r3_recip.c: ^~~~~~~~~~~~~~~~~~~~~~~~
r3_recip.c: r3_recip.c:68:7: note: called from here
r3_recip.c: h = _mm256_permute4x64_epi64(h,0xd8);
r3_recip.c: ~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
r3_recip.c: ...

Number of similar (compiler,implementation) pairs: 4, namely:

Compiler	Implementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE	avx
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE	avx
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE	avx
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE	avx